1. Support member expressions in bugprone-bool-pointer-implicit-conversion. (details)
  2. [obj2yaml] Add support for dumping the .debug_aranges section. (details)
  3. [mlir] Fix convert-to-llvmir.mlir test broken due to syntax change (details)
  4. DWARFVerifier.h - remove unnecessary forward declarations and includes. NFCI. (details)
  5. [ARM][CostModel] Implement getCFInstrCost (details)
  6. [CUDA][HIP] Support accessing static device variable in host code for -fno-gpu-rdc (details)
Commit a44161692ae879068d4086a7e568a348800ba01d by aaron
Support member expressions in bugprone-bool-pointer-implicit-conversion.

This addresses PR45189.
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/bugprone-bool-pointer-implicit-conversion.cpp (diff)
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BoolPointerImplicitConversionCheck.cpp (diff)
Commit bd7f3f8a3ed70586f2b6a68b267b83d18e6fbdb4 by Xing
[obj2yaml] Add support for dumping the .debug_aranges section.

This patch adds support for dumping DWARF sections to obj2yaml. The
.debug_aranges section is used to illustrate the basic idea.

Reviewed By: jhenderson

Differential Revision:
The file was addedllvm/test/tools/obj2yaml/ELF/DWARF/debug-aranges.yaml
The file was modifiedllvm/tools/obj2yaml/obj2yaml.h (diff)
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp (diff)
Commit bdb9295664aa2ea0ee195505a0ca78ea8e34e657 by zinenko
[mlir] Fix convert-to-llvmir.mlir test broken due to syntax change

The syntax of the LLVM dialect types changed between the time the code
was written and it was submitted, leading to a test failure. Update the
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir (diff)
Commit 7b993903e0448a1f804882c97f3071e799cbe99e by llvm-dev
DWARFVerifier.h - remove unnecessary forward declarations and includes. NFCI.
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFVerifier.h (diff)
Commit f2675ab45fbb41bb7c1e1b0b86533fc83e877b6b by sam.parker
[ARM][CostModel] Implement getCFInstrCost

As with other targets, set the throughput cost of control-flow
instructions to free so that we don't miss out of vectorization

Differential Revision:
The file was modifiedllvm/test/Analysis/CostModel/ARM/memcpy.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/select.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/control-flow.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/load_store.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/reduce-smin.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/divrem.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/sub-cast-vect.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/fparith.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/shl-cast-vect.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/mul-cast-vect.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/reduce-smax.ll (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/reduce-umin.ll (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/mve-gather-scatter-cost.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/shuffle.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/cast_ldst.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/reduce-add.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/reduce-umax.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-ssat.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-overflow.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/cast.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/gep.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith-usat.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/ARM/cmps.ll (diff)
Commit 45f2a56856e29b8cb038b2e559289b91fb98fedf by Yaxun.Liu
[CUDA][HIP] Support accessing static device variable in host code for -fno-gpu-rdc

nvcc supports accessing file-scope static device variables in host code by host APIs
like cudaMemcpyToSymbol etc.

CUDA/HIP let users access device variables in host code by shadow variables. In host compilation,
clang emits a shadow variable for each device variable, and calls __*RegisterVariable to
register it in init function. The address of the shadow variable and the device side mangled
name of the device variable is passed to __*RegisterVariable. Runtime looks up the symbol
by name in the device binary  to find the address of the device variable.

The problem with static device variables is that they have internal linkage, therefore their
name may be changed by the linker if there are multiple symbols with the same name. Also
they end up as local symbols in the elf file, whereas the runtime only looks up the global symbols.

Another reason for making the static device variables external linkage is that they may be
initialized externally by host code and their final value may be accessed by host code
after kernel execution, therefore they actually have external linkage. Giving them internal
linkage will cause incorrect optimizations on them.

To support accessing static device var in host code for -fno-gpu-rdc mode, change the intnernal
linkage to external linkage. The name does not need change since there is only one TU for
-fno-gpu-rdc mode. Also the externalization is done only if the device static var is referenced
by host code.

Differential Revision:
The file was modifiedclang/include/clang/AST/ASTContext.h (diff)
The file was modifiedclang/lib/Sema/SemaExpr.cpp (diff)
The file was addedclang/test/CodeGenCUDA/
The file was modifiedclang/lib/AST/ASTContext.cpp (diff)
The file was modifiedclang/test/CodeGenCUDA/ (diff)