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FailedChanges

Summary

  1. Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces" This broke some PPC prefetching tests. This reverts commit 9fdfb045ae8bb643ab0d0455dcf9ecaea3b1eb3c.
  2. Move three folds for FADD, FSUB and FMUL in the DAG combiner away from Unsafe to more aligned checks that reflect context Summary: Unsafe does not map well alone for each of these three cases as it is missing NoNan context when accessed directly with clang. I have migrated the fold guards to reflect the expectations of handing nan and zero contexts directly (NoNan, NSZ) and some tests with it. Unsafe does include NSZ, however there is already precedent for using the target option directly to reflect that context. Reviewers: spatel, wristow, hfinkel, craig.topper, arsenm Reviewed By: arsenm Subscribers: michele.scandale, wdng, javed.absar Differential Revision: https://reviews.llvm.org/D64450
  3. Revert "[clangd] Filter out non-governed files from broadcast" This reverts commit d5214dfa7b5650745eaeb102857c9e90adb16137. It's causing failures, both in our local CI and the PS4 Windows bot. http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/26872/steps/test/logs/stdio
  4. [System Model] [TTI] Update cache and prefetch TTI interfaces Rework the TTI cache and software prefetching APIs to prepare for the introduction of a general system model. Changes include: - Marking existing interfaces const and/or override as appropriate - Adding comments - Adding BasicTTIImpl interfaces that delegate to a subtarget implementation - Adding a default "no information" subtarget implementation Only a handful of targets use these interfaces currently: AArch64, Hexagon, PPC and SystemZ. AArch64 already has a custom subtarget implementation, so its custom TTI implementation is migrated to use the new facilities in BasicTTIImpl to invoke its custom subtarget implementation. The custom TTI implementations continue to exist for the other targets with this change. They are not moved over to subtarget-based implementations. The end goal is to have the default subtarget implementation defer to the system model defined by the target. With this change, the default subtarget implementation essentially returns "no information" for these interfaces. None of the existing users of TTI will hit that implementation because they define their own custom TTI implementations and won't use the BasicTTIImpl implementations. Once system models are in place for the targets that use these interfaces, their custom TTI implementations can be removed. Differential Revision: https://reviews.llvm.org/D63614
  5. Recommit "[CommandLine] Remove OptionCategory and SubCommand caches from the Option class." Previously reverted in 364141 due to buildbot breakage, and fixed here by making GeneralCategory global a ManagedStatic. Summary: This change processes `OptionCategory`s and `SubCommand`s as they are seen instead of caching them in the Option class and processing them later. Doing so simplifies the work needed to be done by the Global parser and significantly reduces the size of the Option class to a mere 64 bytes. Removing the `OptionCategory` cache saved 24 bytes, and removing the `SubCommand` cache saved an additional 48 bytes, for a total of a 72 byte reduction. Reviewed By: serge-sans-paille Tags: #llvm, #clang Differential Revision: https://reviews.llvm.org/D62105
  6. [X86] EltsFromConsecutiveLoads - clean up element size calcs. NFCI. Determine the element/load size calculations earlier and assert that they are whole bytes in size.
  7. [LoopRotate + MemorySSA] Keep an <instruction-cloned instruction> map. Summary: The map kept in loop rotate is used for instruction remapping, in order to simplify the clones of instructions. Thus, if an instruction can be simplified, its simplified value is placed in the map, even when the clone is added to the IR. MemorySSA in contrast needs to know about that clone, so it can add an access for it. To resolve this: keep a different map for MemorySSA. Reviewers: george.burgess.iv Subscribers: jlebar, Prazek, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63680
  8. [ORC] Add custom IR compiler configuration to LLJITBuilder to enable obj caches. LLJITBuilder now has a setCompileFunctionCreator method which can be used to construct a CompileFunction for the LLJIT instance being created. The motivating use-case for this is supporting ObjectCaches, which can now be set up at compile-function construction time. To demonstrate this an example project, LLJITWithObjectCache, is included.
  9. [X86] Regenerate tests. NFCI. Hasn't been regenerated since the update script could merge 32/64-bit checks.
  10. [X86] Change the IR sequence for _mm_storeh_pi and _mm_storel_pi to perform the store as a <2 x float> instead of i64. This is similar to what we do for loadl_pi and loadh_pi.
  11. [X86] Add guards to some of the x86 intrinsic tests to skip 64-bit mode only intrinsics when compiled for 32-bit mode. All the command lines are for 64-bit mode, but sometimes I compile the tests in 32-bit mode to see what assembly we get and we need to skip these to do that.
  12. [X86] Add tests for an alternative sequence for _mm_storel_pi/_mm_storeh_pi intrinsics. NFC
  13. [clang] Preserve names of addrspacecast'ed values. Differential Revision: https://reviews.llvm.org/D63846
  14. [TargetLowering] support BlockAddress as "i" inline asm constraint Summary: This allows passing address of labels to inline assembly "i" input constraints. Fixes pr/42502. Reviewers: ostannard Reviewed By: ostannard Subscribers: void, echristo, nathanchance, ostannard, javed.absar, hiraditya, llvm-commits, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D64167
  15. [NFC][InstCombine] Fixup some tests in just-added "omit mask before left-shift" tests
  16. ELF: Add support for R_AARCH64_ADR_PREL_PG_HI21_NC relocation. Differential Revision: https://reviews.llvm.org/D64456
  17. MC: AArch64: Add support for pg_hi21_nc relocation specifier. Differential Revision: https://reviews.llvm.org/D64455
  18. [CodeExtractor] Fix sinking of allocas with multiple bitcast uses (PR42451) An alloca which can be sunk into the extraction region may have more than one bitcast use. Move these uses along with the alloca to prevent use-before-def. Testing: check-llvm, stage2 build of clang Fixes llvm.org/PR42451. Differential Revision: https://reviews.llvm.org/D64463
  19. [CodeExtractor] Simplify findAllocas, NFC Split getLifetimeMarkers out into its own method and have it return a struct. Differential Revision: https://reviews.llvm.org/D64467
  20. GlobalISel: Legalization for G_FMINNUM/G_FMAXNUM
  21. GlobalISel: Define the full family of FP min/max instructions
  22. [X86] EltsFromConsecutiveLoads - remove duplicate check for element size. NFCI. We've already checked that each element is the correct contributory size for VT when we inspect the elements for Undef/Zero/Load.
  23. [X86] EltsFromConsecutiveLoads - ensure element reg/store sizes are the same size. NFCI. This renames the type so it doesn't sound like its based off the load size - as we're moving towards supporting combining loads of different sizes.
  24. AMDGPU: Serialize mode from MachineFunctionInfo
  25. [PatternMatch] Generalize m_SpecificInt_ULT() to take ICmpInst::Predicate As discussed in the original review, this may be useful, so let's just do it.
  26. [Remarks] Add cl::Hidden to -remarks-yaml-string-table It was showing up in a lot of unrelated tools.
  27. docs/GithubMove.rst: Remove obsolete information Summary: Remove references to the multirepo and update the document to reflect the current state of the github repository. Reviewers: mehdi_amini, jyknight Subscribers: jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58420
  28. [FileCheck] Use bool operator to test Expected Use bool() consistently to get boolean value of Error, Optional and Expected types in EXPECT calls. While static_cast is used in all cases but one, bool provides more clarity and makes more sense as a new default.
  29. [NFC][InstCombine] Redundant masking before left-shift (PR42563) alive proofs: a,b: https://rise4fun.com/Alive/4zsf c,d,e,f: https://rise4fun.com/Alive/RC49 Indeed, not all of these patterns are canonical. But since this fold will only produce a single instruction i'm really interested in handling even uncanonical patterns. Other than these 6 patterns, i can't think of any other reasonable variants right now, although i'm sure they exist. For now let's start with patterns where both shift amounts are variable, with trivial constant "offset" between them, since i believe this is both simplest to handle and i think this is most common. But again, there are likely other variants where we could use ValueTracking/ConstantRange to handle more cases. https://bugs.llvm.org/show_bug.cgi?id=42563
Revision 365680 by greened:
Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces"

This broke some PPC prefetching tests.

This reverts commit 9fdfb045ae8bb643ab0d0455dcf9ecaea3b1eb3c.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h (diff)llvm.src/include/llvm/Analysis/TargetTransformInfo.h
The file was modified/llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)llvm.src/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modified/llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h (diff)llvm.src/include/llvm/CodeGen/BasicTTIImpl.h
The file was modified/llvm/trunk/include/llvm/MC/MCSubtargetInfo.h (diff)llvm.src/include/llvm/MC/MCSubtargetInfo.h
The file was modified/llvm/trunk/lib/MC/MCSubtargetInfo.cpp (diff)llvm.src/lib/MC/MCSubtargetInfo.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h (diff)llvm.src/lib/Target/AArch64/AArch64Subtarget.h
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)llvm.src/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)llvm.src/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)llvm.src/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (diff)llvm.src/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.h (diff)llvm.src/lib/Target/PowerPC/PPCTargetTransformInfo.h
The file was modified/llvm/trunk/lib/Target/SystemZ/SystemZTargetTransformInfo.h (diff)llvm.src/lib/Target/SystemZ/SystemZTargetTransformInfo.h
Revision 365679 by mcberg2017:
Move three folds for FADD, FSUB and FMUL in the DAG combiner away from Unsafe to more aligned checks that reflect context

Summary: Unsafe does not map well alone for each of these three cases as it is missing NoNan context when accessed directly with clang.  I have migrated the fold guards to reflect the expectations of handing nan and zero contexts directly (NoNan, NSZ) and some tests with it.  Unsafe does include NSZ, however there is already precedent for using the target option directly to reflect that context.

Reviewers: spatel, wristow, hfinkel, craig.topper, arsenm

Reviewed By: arsenm

Subscribers: michele.scandale, wdng, javed.absar

Differential Revision: https://reviews.llvm.org/D64450
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was added/llvm/trunk/test/CodeGen/ARM/nnan-fsub.llllvm.src/test/CodeGen/ARM/nnan-fsub.ll
The file was removed/llvm/trunk/test/CodeGen/ARM/unsafe-fsub.llllvm.src/test/CodeGen/ARM/unsafe-fsub.ll
The file was modified/llvm/trunk/test/CodeGen/X86/fmul-combines.ll (diff)llvm.src/test/CodeGen/X86/fmul-combines.ll
The file was modified/llvm/trunk/test/CodeGen/X86/fp-fast.ll (diff)llvm.src/test/CodeGen/X86/fp-fast.ll
Revision 365678 by ormris:
Revert "[clangd] Filter out non-governed files from broadcast"

This reverts commit d5214dfa7b5650745eaeb102857c9e90adb16137.

It's causing failures, both in our local CI and the PS4 Windows bot.

http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/26872/steps/test/logs/stdio
Change TypePath in RepositoryPath in Workspace
The file was modified/clang-tools-extra/trunk/clangd/GlobalCompilationDatabase.cpp (diff)clang-tools-extra.src/clangd/GlobalCompilationDatabase.cpp
The file was modified/clang-tools-extra/trunk/clangd/GlobalCompilationDatabase.h (diff)clang-tools-extra.src/clangd/GlobalCompilationDatabase.h
The file was modified/clang-tools-extra/trunk/clangd/QueryDriverDatabase.cpp (diff)clang-tools-extra.src/clangd/QueryDriverDatabase.cpp
The file was modified/clang-tools-extra/trunk/clangd/index/Background.cpp (diff)clang-tools-extra.src/clangd/index/Background.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/ClangdTests.cpp (diff)clang-tools-extra.src/clangd/unittests/ClangdTests.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/GlobalCompilationDatabaseTests.cpp (diff)clang-tools-extra.src/clangd/unittests/GlobalCompilationDatabaseTests.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/TestFS.cpp (diff)clang-tools-extra.src/clangd/unittests/TestFS.cpp
The file was modified/clang-tools-extra/trunk/clangd/unittests/TestFS.h (diff)clang-tools-extra.src/clangd/unittests/TestFS.h
Revision 365676 by greened:
[System Model] [TTI] Update cache and prefetch TTI interfaces

Rework the TTI cache and software prefetching APIs to prepare for the
introduction of a general system model.  Changes include:

- Marking existing interfaces const and/or override as appropriate
- Adding comments
- Adding BasicTTIImpl interfaces that delegate to a subtarget
  implementation
- Adding a default "no information" subtarget implementation

Only a handful of targets use these interfaces currently: AArch64,
Hexagon, PPC and SystemZ.  AArch64 already has a custom subtarget
implementation, so its custom TTI implementation is migrated to use
the new facilities in BasicTTIImpl to invoke its custom subtarget
implementation.  The custom TTI implementations continue to exist for
the other targets with this change.  They are not moved over to
subtarget-based implementations.

The end goal is to have the default subtarget implementation defer to
the system model defined by the target.  With this change, the default
subtarget implementation essentially returns "no information" for
these interfaces.  None of the existing users of TTI will hit that
implementation because they define their own custom TTI
implementations and won't use the BasicTTIImpl implementations.

Once system models are in place for the targets that use these
interfaces, their custom TTI implementations can be removed.

Differential Revision: https://reviews.llvm.org/D63614
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h (diff)llvm.src/include/llvm/Analysis/TargetTransformInfo.h
The file was modified/llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)llvm.src/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modified/llvm/trunk/include/llvm/CodeGen/BasicTTIImpl.h (diff)llvm.src/include/llvm/CodeGen/BasicTTIImpl.h
The file was modified/llvm/trunk/include/llvm/MC/MCSubtargetInfo.h (diff)llvm.src/include/llvm/MC/MCSubtargetInfo.h
The file was modified/llvm/trunk/lib/MC/MCSubtargetInfo.cpp (diff)llvm.src/lib/MC/MCSubtargetInfo.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h (diff)llvm.src/lib/Target/AArch64/AArch64Subtarget.h
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff)llvm.src/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)llvm.src/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonTargetTransformInfo.h (diff)llvm.src/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.cpp (diff)llvm.src/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCTargetTransformInfo.h (diff)llvm.src/lib/Target/PowerPC/PPCTargetTransformInfo.h
The file was modified/llvm/trunk/lib/Target/SystemZ/SystemZTargetTransformInfo.h (diff)llvm.src/lib/Target/SystemZ/SystemZTargetTransformInfo.h
Revision 365675 by dhinton:
Recommit "[CommandLine] Remove OptionCategory and SubCommand caches from the Option class."

Previously reverted in 364141 due to buildbot breakage, and fixed here
by making GeneralCategory global a ManagedStatic.

Summary:
This change processes `OptionCategory`s and `SubCommand`s as they
are seen instead of caching them in the Option class and processing
them later.  Doing so simplifies the work needed to be done by the Global
parser and significantly reduces the size of the Option class to a mere 64
bytes.

Removing  the `OptionCategory` cache saved 24 bytes, and removing
the `SubCommand` cache saved an additional 48 bytes, for a total of a
72 byte reduction.

Reviewed By: serge-sans-paille

Tags: #llvm, #clang

Differential Revision: https://reviews.llvm.org/D62105
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/tools/clang-refactor/ClangRefactor.cpp (diff)clang.src/tools/clang-refactor/ClangRefactor.cpp
The file was modified/clang-tools-extra/trunk/clangd/index/dex/dexp/Dexp.cpp (diff)clang-tools-extra.src/clangd/index/dex/dexp/Dexp.cpp
The file was modified/clang-tools-extra/trunk/clangd/indexer/IndexerMain.cpp (diff)clang-tools-extra.src/clangd/indexer/IndexerMain.cpp
The file was modified/llvm/trunk/include/llvm/Support/CommandLine.h (diff)llvm.src/include/llvm/Support/CommandLine.h
The file was modified/llvm/trunk/lib/Support/CommandLine.cpp (diff)llvm.src/lib/Support/CommandLine.cpp
The file was modified/llvm/trunk/unittests/Support/CommandLineTest.cpp (diff)llvm.src/unittests/Support/CommandLineTest.cpp
Revision 365674 by rksimon:
[X86] EltsFromConsecutiveLoads - clean up element size calcs. NFCI.

Determine the element/load size calculations earlier and assert that they are whole bytes in size.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 365672 by asbirlea:
[LoopRotate + MemorySSA] Keep an <instruction-cloned instruction> map.

Summary:
The map kept in loop rotate is used for instruction remapping, in order
to simplify the clones of instructions. Thus, if an instruction can be
simplified, its simplified value is placed in the map, even when the
clone is added to the IR. MemorySSA in contrast needs to know about that
clone, so it can add an access for it.
To resolve this: keep a different map for MemorySSA.

Reviewers: george.burgess.iv

Subscribers: jlebar, Prazek, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63680
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/Utils/LoopRotationUtils.cpp (diff)llvm.src/lib/Transforms/Utils/LoopRotationUtils.cpp
The file was added/llvm/trunk/test/Analysis/MemorySSA/loop-rotate-valuemap.llllvm.src/test/Analysis/MemorySSA/loop-rotate-valuemap.ll
Revision 365671 by lhames:
[ORC] Add custom IR compiler configuration to LLJITBuilder to enable obj caches.

LLJITBuilder now has a setCompileFunctionCreator method which can be used to
construct a CompileFunction for the LLJIT instance being created. The motivating
use-case for this is supporting ObjectCaches, which can now be set up at
compile-function construction time. To demonstrate this an example project,
LLJITWithObjectCache, is included.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/examples/CMakeLists.txt (diff)llvm.src/examples/CMakeLists.txt
The file was modified/llvm/trunk/examples/HowToUseLLJIT/HowToUseLLJIT.cpp (diff)llvm.src/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
The file was added/llvm/trunk/examples/LLJITExamplesllvm.src/examples/LLJITExamples
The file was added/llvm/trunk/examples/LLJITExamples/CMakeLists.txtllvm.src/examples/LLJITExamples/CMakeLists.txt
The file was added/llvm/trunk/examples/LLJITExamples/ExampleModules.hllvm.src/examples/LLJITExamples/ExampleModules.h
The file was added/llvm/trunk/examples/LLJITExamples/LLJITWithObjectCachellvm.src/examples/LLJITExamples/LLJITWithObjectCache
The file was added/llvm/trunk/examples/LLJITExamples/LLJITWithObjectCache/CMakeLists.txtllvm.src/examples/LLJITExamples/LLJITWithObjectCache/CMakeLists.txt
The file was added/llvm/trunk/examples/LLJITExamples/LLJITWithObjectCache/LLJITWithObjectCache.cppllvm.src/examples/LLJITExamples/LLJITWithObjectCache/LLJITWithObjectCache.cpp
The file was modified/llvm/trunk/include/llvm/ExecutionEngine/Orc/CompileUtils.h (diff)llvm.src/include/llvm/ExecutionEngine/Orc/CompileUtils.h
The file was modified/llvm/trunk/include/llvm/ExecutionEngine/Orc/LLJIT.h (diff)llvm.src/include/llvm/ExecutionEngine/Orc/LLJIT.h
The file was modified/llvm/trunk/lib/ExecutionEngine/Orc/LLJIT.cpp (diff)llvm.src/lib/ExecutionEngine/Orc/LLJIT.cpp
Revision 365670 by rksimon:
[X86] Regenerate tests. NFCI.

Hasn't been regenerated since the update script could merge 32/64-bit checks.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/avx2-intrinsics-canonical.ll (diff)llvm.src/test/CodeGen/X86/avx2-intrinsics-canonical.ll
Revision 365669 by ctopper:
[X86] Change the IR sequence for _mm_storeh_pi and _mm_storel_pi to perform the store as a <2 x float> instead of i64.

This is similar to what we do for loadl_pi and loadh_pi.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/BuiltinsX86.def (diff)clang.src/include/clang/Basic/BuiltinsX86.def
The file was modified/cfe/trunk/lib/CodeGen/CGBuiltin.cpp (diff)clang.src/lib/CodeGen/CGBuiltin.cpp
The file was modified/cfe/trunk/lib/Headers/xmmintrin.h (diff)clang.src/lib/Headers/xmmintrin.h
The file was modified/cfe/trunk/test/CodeGen/builtins-x86.c (diff)clang.src/test/CodeGen/builtins-x86.c
The file was modified/cfe/trunk/test/CodeGen/sse-builtins.c (diff)clang.src/test/CodeGen/sse-builtins.c
Revision 365668 by ctopper:
[X86] Add guards to some of the x86 intrinsic tests to skip 64-bit mode only intrinsics when compiled for 32-bit mode.

All the command lines are for 64-bit mode, but sometimes I compile
the tests in 32-bit mode to see what assembly we get and we need
to skip these to do that.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/test/CodeGen/avx-builtins.c (diff)clang.src/test/CodeGen/avx-builtins.c
The file was modified/cfe/trunk/test/CodeGen/bmi-builtins.c (diff)clang.src/test/CodeGen/bmi-builtins.c
The file was modified/cfe/trunk/test/CodeGen/bmi2-builtins.c (diff)clang.src/test/CodeGen/bmi2-builtins.c
The file was modified/cfe/trunk/test/CodeGen/popcnt-builtins.c (diff)clang.src/test/CodeGen/popcnt-builtins.c
The file was modified/cfe/trunk/test/CodeGen/rdrand-builtins.c (diff)clang.src/test/CodeGen/rdrand-builtins.c
The file was modified/cfe/trunk/test/CodeGen/sse-builtins.c (diff)clang.src/test/CodeGen/sse-builtins.c
The file was modified/cfe/trunk/test/CodeGen/sse2-builtins.c (diff)clang.src/test/CodeGen/sse2-builtins.c
The file was modified/cfe/trunk/test/CodeGen/sse41-builtins.c (diff)clang.src/test/CodeGen/sse41-builtins.c
The file was modified/cfe/trunk/test/CodeGen/sse42-builtins.c (diff)clang.src/test/CodeGen/sse42-builtins.c
The file was modified/cfe/trunk/test/CodeGen/tbm-builtins.c (diff)clang.src/test/CodeGen/tbm-builtins.c
Revision 365667 by ctopper:
[X86] Add tests for an alternative sequence for _mm_storel_pi/_mm_storeh_pi intrinsics. NFC
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/sse-intrinsics-fast-isel.ll (diff)llvm.src/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
Revision 365666 by vzakhari:
[clang] Preserve names of addrspacecast'ed values.

Differential Revision: https://reviews.llvm.org/D63846
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/CodeGen/TargetInfo.cpp (diff)clang.src/lib/CodeGen/TargetInfo.cpp
The file was modified/cfe/trunk/test/CodeGenCUDA/builtins-amdgcn.cu (diff)clang.src/test/CodeGenCUDA/builtins-amdgcn.cu
The file was modified/cfe/trunk/test/CodeGenOpenCL/address-spaces-conversions.cl (diff)clang.src/test/CodeGenOpenCL/address-spaces-conversions.cl
The file was modified/cfe/trunk/test/CodeGenOpenCLCXX/address-space-deduction.cl (diff)clang.src/test/CodeGenOpenCLCXX/address-space-deduction.cl
The file was modified/cfe/trunk/test/CodeGenOpenCLCXX/addrspace-of-this.cl (diff)clang.src/test/CodeGenOpenCLCXX/addrspace-of-this.cl
The file was modified/cfe/trunk/test/CodeGenOpenCLCXX/addrspace-operators.cl (diff)clang.src/test/CodeGenOpenCLCXX/addrspace-operators.cl
The file was modified/cfe/trunk/test/CodeGenOpenCLCXX/addrspace-references.cl (diff)clang.src/test/CodeGenOpenCLCXX/addrspace-references.cl
The file was modified/cfe/trunk/test/CodeGenOpenCLCXX/template-address-spaces.cl (diff)clang.src/test/CodeGenOpenCLCXX/template-address-spaces.cl
Revision 365664 by nickdesaulniers:
[TargetLowering] support BlockAddress as "i" inline asm constraint

Summary:
This allows passing address of labels to inline assembly "i" input
constraints.

Fixes pr/42502.

Reviewers: ostannard

Reviewed By: ostannard

Subscribers: void, echristo, nathanchance, ostannard, javed.absar, hiraditya, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64167
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was added/llvm/trunk/test/CodeGen/AArch64/inline-asm-blockaddress.llllvm.src/test/CodeGen/AArch64/inline-asm-blockaddress.ll
Revision 365663 by lebedevri:
[NFC][InstCombine] Fixup some tests in just-added "omit mask before left-shift" tests
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll (diff)llvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll (diff)llvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
The file was modified/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll (diff)llvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll
Revision 365662 by pcc:
ELF: Add support for R_AARCH64_ADR_PREL_PG_HI21_NC relocation.

Differential Revision: https://reviews.llvm.org/D64456
Change TypePath in RepositoryPath in Workspace
The file was modified/lld/trunk/ELF/Arch/AArch64.cpp (diff)lld.src/ELF/Arch/AArch64.cpp
The file was modified/lld/trunk/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s (diff)lld.src/test/ELF/aarch64-fpic-adr_prel_pg_hi21.s
The file was added/lld/trunk/test/ELF/aarch64-hi21-nc.slld.src/test/ELF/aarch64-hi21-nc.s
Revision 365661 by pcc:
MC: AArch64: Add support for pg_hi21_nc relocation specifier.

Differential Revision: https://reviews.llvm.org/D64455
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (diff)llvm.src/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was added/llvm/trunk/test/MC/AArch64/adrp-relocation2.sllvm.src/test/MC/AArch64/adrp-relocation2.s
Revision 365660 by vedantk:
[CodeExtractor] Fix sinking of allocas with multiple bitcast uses (PR42451)

An alloca which can be sunk into the extraction region may have more
than one bitcast use. Move these uses along with the alloca to prevent
use-before-def.

Testing: check-llvm, stage2 build of clang

Fixes llvm.org/PR42451.

Differential Revision: https://reviews.llvm.org/D64463
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (diff)llvm.src/lib/Transforms/Utils/CodeExtractor.cpp
The file was modified/llvm/trunk/test/Transforms/CodeExtractor/live_shrink_multiple.ll (diff)llvm.src/test/Transforms/CodeExtractor/live_shrink_multiple.ll
The file was added/llvm/trunk/test/Transforms/HotColdSplit/sink-multiple-bitcasts-of-allocas-pr42451.llllvm.src/test/Transforms/HotColdSplit/sink-multiple-bitcasts-of-allocas-pr42451.ll
Revision 365659 by vedantk:
[CodeExtractor] Simplify findAllocas, NFC

Split getLifetimeMarkers out into its own method and have it return a
struct.

Differential Revision: https://reviews.llvm.org/D64467
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/Transforms/Utils/CodeExtractor.h (diff)llvm.src/include/llvm/Transforms/Utils/CodeExtractor.h
The file was modified/llvm/trunk/lib/Transforms/Utils/CodeExtractor.cpp (diff)llvm.src/lib/Transforms/Utils/CodeExtractor.cpp
Revision 365658 by arsenm:
GlobalISel: Legalization for G_FMINNUM/G_FMAXNUM
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (diff)llvm.src/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modified/llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h (diff)llvm.src/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was modified/llvm/trunk/include/llvm/CodeGen/GlobalISel/Utils.h (diff)llvm.src/include/llvm/CodeGen/GlobalISel/Utils.h
The file was modified/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)llvm.src/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modified/llvm/trunk/lib/CodeGen/GlobalISel/Utils.cpp (diff)llvm.src/lib/CodeGen/GlobalISel/Utils.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
Revision 365657 by arsenm:
GlobalISel: Define the full family of FP min/max instructions
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/Support/TargetOpcodes.def (diff)llvm.src/include/llvm/Support/TargetOpcodes.def
The file was modified/llvm/trunk/include/llvm/Target/GenericOpcodes.td (diff)llvm.src/include/llvm/Target/GenericOpcodes.td
The file was modified/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (diff)llvm.src/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was added/llvm/trunk/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.llllvm.src/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll
The file was modified/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir (diff)llvm.src/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Revision 365656 by rksimon:
[X86] EltsFromConsecutiveLoads - remove duplicate check for element size. NFCI.

We've already checked that each element is the correct contributory size for VT when we inspect the elements for Undef/Zero/Load.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 365655 by rksimon:
[X86] EltsFromConsecutiveLoads - ensure element reg/store sizes are the same size. NFCI.

This renames the type so it doesn't sound like its based off the load size - as we're moving towards supporting combining loads of different sizes.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 365653 by arsenm:
AMDGPU: Serialize mode from MachineFunctionInfo
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp (diff)llvm.src/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.h (diff)llvm.src/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/omod-nsz-flag.mir (diff)llvm.src/test/CodeGen/AMDGPU/omod-nsz-flag.mir
The file was modified/llvm/trunk/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir (diff)llvm.src/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
The file was modified/llvm/trunk/test/CodeGen/MIR/AMDGPU/machine-function-info.ll (diff)llvm.src/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
Revision 365652 by lebedevri:
[PatternMatch] Generalize m_SpecificInt_ULT() to take ICmpInst::Predicate

As discussed in the original review, this may be useful,
so let's just do it.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/IR/PatternMatch.h (diff)llvm.src/include/llvm/IR/PatternMatch.h
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)llvm.src/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (diff)llvm.src/lib/Transforms/InstCombine/InstCombineShifts.cpp
The file was modified/llvm/trunk/unittests/IR/PatternMatch.cpp (diff)llvm.src/unittests/IR/PatternMatch.cpp
Revision 365647 by thegameg:
[Remarks] Add cl::Hidden to -remarks-yaml-string-table

It was showing up in a lot of unrelated tools.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Remarks/YAMLRemarkSerializer.cpp (diff)llvm.src/lib/Remarks/YAMLRemarkSerializer.cpp
Revision 365645 by tstellar:
docs/GithubMove.rst: Remove obsolete information

Summary:
Remove references to the multirepo and update the document to
reflect the current state of the github repository.

Reviewers: mehdi_amini, jyknight

Subscribers: jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58420
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The file was modified/llvm/trunk/docs/Proposals/GitHubMove.rst (diff)llvm.src/docs/Proposals/GitHubMove.rst
Revision 365644 by thopre:
[FileCheck] Use bool operator to test Expected

Use bool() consistently to get boolean value of Error, Optional and
Expected types in EXPECT calls. While static_cast is used in all cases
but one, bool provides more clarity and makes more sense as a new
default.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/unittests/Support/FileCheckTest.cpp (diff)llvm.src/unittests/Support/FileCheckTest.cpp
Revision 365641 by lebedevri:
[NFC][InstCombine] Redundant masking before left-shift (PR42563)

alive proofs:
a,b:     https://rise4fun.com/Alive/4zsf
c,d,e,f: https://rise4fun.com/Alive/RC49

Indeed, not all of these patterns are canonical.
But since this fold will only produce a single instruction
i'm really interested in handling even uncanonical patterns.

Other than these 6 patterns, i can't think of any other
reasonable variants right now, although i'm sure they exist.

For now let's start with patterns where both shift amounts are variable,
with trivial constant "offset" between them, since i believe this is
both simplest to handle and i think this is most common.
But again, there are likely other variants where we could use
ValueTracking/ConstantRange to handle more cases.

https://bugs.llvm.org/show_bug.cgi?id=42563
Change TypePath in RepositoryPath in Workspace
The file was added/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.llllvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll
The file was added/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.llllvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
The file was added/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.llllvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll
The file was added/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.llllvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll
The file was added/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.llllvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.ll
The file was added/llvm/trunk/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.llllvm.src/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll
The file was added/llvm/trunk/test/Transforms/InstCombine/redundant-right-shift-input-masking.llllvm.src/test/Transforms/InstCombine/redundant-right-shift-input-masking.ll
The file was removed/llvm/trunk/test/Transforms/InstCombine/redundant-shift-input-masking.llllvm.src/test/Transforms/InstCombine/redundant-shift-input-masking.ll