Changes

Summary

[libc] Add hardware implementations of fma and fmaf for x86_64 and aarch64. (details)
[NFC][CSKY] Resort the instruction description in td (details)
[lldb] Simplify check for nill value in breakpoint_function_callback.test (details)
[lsan] Test to show lsan dependency on globals (details)
[libc] Disable fma and fmaf for x86_64. (details)
[AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed (details)
[Test] Add a negative unit test (details)
[NFC] Remove redundant InstCombinePass name (details)
Use SmallVector instead of std::vector to manage storage of llvm::BitVector (details)
[RISCV] Introduce floating point control and state registers (details)
[libc] Add fma to the C standard spec. (details)
[PollyACC] Fix implicit function definitions. NFC. (details)
[PollyACC] Configure PollyPPCG only if needed. (details)
[mlir][linalg] adapt named op generalization to work with captures. (details)

Commit 95934c3a37cb00e4fff6042c52837b42f6219772 by sivachandra [libc] Add hardware implementations of fma and fmaf for x86_64 and aarch64. The current generic implementation of the fmaf function has been moved to the FPUtil directory. This allows one use the fma operation from implementations of other math functions like the trignometric functions without depending on/requiring the fma/fmaf/fmal function targets. If this pattern ends being convenient, we will switch all generic math implementations to this pattern. Reviewed By: lntue Differential Revision: https://reviews.llvm.org/D100811
	libc/test/src/math/fma_test.cpp
	libc/utils/FPUtil/FMA.h
	libc/utils/FPUtil/x86_64/FMA.h
	libc/src/math/generic/CMakeLists.txt
	libc/utils/FPUtil/generic/README.md
	libc/src/math/fma.cpp
	libc/src/math/generic/fmaf.cpp
	libc/utils/FPUtil/aarch64/FMA.h
	libc/test/src/math/CMakeLists.txt
	libc/utils/FPUtil/generic/FMA.h
	libc/src/math/fma.h
	libc/src/math/CMakeLists.txt
	libc/config/linux/x86_64/entrypoints.txt
	libc/src/math/fmaf.cpp
	libc/config/linux/aarch64/entrypoints.txt
Commit ca31b43ae8df3f5bef7ef2ca52d60245f95fb59a by zixuan.wu [NFC][CSKY] Resort the instruction description in td Resort the instruction description in td to make it easy to upstream more instructions and add predicts later.
	llvm/lib/Target/CSKY/CSKYInstrInfo.td
Commit eff4f65afb6323e19d0baa73b9ee24df6909960b by Jonas Devlieghere [lldb] Simplify check for nill value in breakpoint_function_callback.test
	lldb/test/Shell/ScriptInterpreter/Lua/breakpoint_function_callback.test
Commit 5e9e463e1fdd7980992ffc5bf78894e0f39d5d9c by Vitaly Buka [lsan] Test to show lsan dependency on globals This test from @MaskRay comment on D69428. The patch is looking to break this behavior. If we go with D69428 I hope we will have some workaround for this test or include explicit test update into the patch. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D100906
	compiler-rt/test/lsan/TestCases/use_globals_unused.cpp
Commit 653345155a060df8ee256d9610ca0d0cc2515450 by sivachandra [libc] Disable fma and fmaf for x86_64. The version of clang installed on the buildbot workers is not able to compile them. However, the version of gcc installed is able to compile them fine. So, this change disables them until we can find a way to compile them using clang on the buildbot workers.
	libc/config/linux/x86_64/entrypoints.txt
Commit 3194761d2763a471dc6426a3e77c1445cb9ded3b by Pushpinder.Singh [AMDGPU][OpenMP] Add amdgpu-arch tool to list AMD GPUs installed This patch adds new clang tool named amdgpu-arch which uses HSA to detect installed AMDGPU and report back latter's march. This tool is built only if system has HSA installed. The value printed by amdgpu-arch is used to fill -march when latter is not explicitly provided in -Xopenmp-target. Reviewed By: JonChesterfield, gregrodgers Differential Revision: https://reviews.llvm.org/D99949
	clang/include/clang/Basic/DiagnosticDriverKinds.td
	clang/lib/Driver/ToolChains/AMDGPU.cpp
	clang/tools/CMakeLists.txt
	clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
	clang/test/Driver/Inputs/amdgpu-arch/amdgpu_arch_different
	clang/tools/amdgpu-arch/AMDGPUArch.cpp
	clang/test/Driver/amdgpu-openmp-system-arch-fail.c
	clang/tools/amdgpu-arch/CMakeLists.txt
	clang/lib/Driver/ToolChains/AMDGPU.h
	clang/test/Driver/Inputs/amdgpu-arch/amdgpu_arch_gfx906
	clang/test/Driver/Inputs/amdgpu-arch/amdgpu_arch_fail
	clang/include/clang/Driver/Options.td
	clang/test/Driver/amdgpu-openmp-system-arch.c
	clang/test/Driver/Inputs/amdgpu-arch/amdgpu_arch_gfx908_gfx908
Commit 0ef7e0041a392b84b9d860c4ec3cefe9da9d8473 by mkazantsev [Test] Add a negative unit test
	llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
Commit dd56715326028187d35d4a0afe87b942a1073752 by aeubanks [NFC] Remove redundant InstCombinePass name
	llvm/include/llvm/Transforms/InstCombine/InstCombine.h
Commit d9806334d1a42a0338d4db703249d13108f1ef4d by sguelton Use SmallVector instead of std::vector to manage storage of llvm::BitVector This is a follow-up to https://reviews.llvm.org/D100387. std::vector is not the best storage container here. My local benchmark (counting the number of instruction when compiling the sqlite3 amalgamation) yields the following: - std::vector<BitVector> -> 5,860,885,896 - SmallVector<BitWord, 0> -> 5,858,991,997 - SmallVector<BitWord> -> 5,817,679,224 Differential Revision: https://reviews.llvm.org/D100744
	llvm/include/llvm/ADT/BitVector.h
Commit d20a2376d8430a3043edb79bda98f2ef9bbca911 by sepavloff [RISCV] Introduce floating point control and state registers New registers FRM, FFLAGS and FCSR was defined. They represent corresponding system registers. The new registers are necessary to properly order floating point instructions in non-default modes. Differential Revision: https://reviews.llvm.org/D99083
	llvm/lib/Target/RISCV/RISCVInstrInfo.td
	llvm/lib/Target/RISCV/RISCVSystemOperands.td
	llvm/lib/Target/RISCV/RISCVRegisterInfo.td
	llvm/lib/Target/RISCV/RISCVInstrInfoF.td
	llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
Commit f76fb7d4203324bdd06a04b190b654a2348fbe17 by sivachandra [libc] Add fma to the C standard spec.
	libc/spec/stdc.td
Commit 90e5ce0b0d6b0e72fdc034cbb612f67d67de0fdd by llvm-project [PollyACC] Fix implicit function definitions. NFC. The isl_id_* have been in used without including the correspodning isl/id.h header. According to rules in C, a function is defined implicitly when first used with an assumed int return type (32 bits on 64 bit systems). But the implementation returns a pointer (64 bits on 64 bit systems). Is usually has no consequence because the return value is stored in a registers that is 64 bits (RAX) and the optimizer does not truncate its value before using it again as a pointer value. However, LTO optimizers will be rightfull;y confused. Fix by including <isl/id.h> This fixes llvm.org/PR50021
	polly/lib/External/ppcg/print.c
Commit 6048d1d19c55a107f67cd617d6ed386831b5adee by llvm-project [PollyACC] Configure PollyPPCG only if needed. The PollyPPCG library is only needed when POLLY_ENABLE_GPGPU_CODEGEN=ON. If disabled, the library target is still created, but not linked against anything. This change does not add create the PollyPPCG build target if not needed. Motivated by llvm.org/PR50021
	polly/lib/External/CMakeLists.txt
Commit 5a451e486f31de36913d6fc22a1b92b39caa3b0e by gysit [mlir][linalg] adapt named op generalization to work with captures. Instead of always running the region builder check if the generalized op has a region attached. If yes inline the existing region instead of calling the region builder. This change circumvents a problem with named operations that have a region builder taking captures and the generalization pass not knowing about this captures. Differential Revision: https://reviews.llvm.org/D100880
	mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
	mlir/test/Dialect/Linalg/generalize-named-ops.mlir