SuccessChanges

Summary

  1. LeonPasses.h - remove orphan function declarations. NFCI. (details)
  2. LeonPasses.h - remove unnecessary includes. NFCI. (details)
  3. BTFDebug.h - reduce MachineInstr.h include to forward declaration. NFCI. (details)
  4. MipsISelLowering.h - remove CCState/CCValAssign forward declarations. NFCI. (details)
  5. VPlan.h - remove unnecessary forward declarations. NFCI. (details)
  6. [ms] [llvm-ml] Add support for bitwise named operators (AND, NOT, OR) in MASM (details)
  7. [ms] [llvm-ml] Fix STRUCT field alignment (details)
  8. [ms] [llvm-ml] Allow use of locally-defined variables in expressions (details)
  9. [DAGCombiner] allow more store merging for non-i8 truncated ops (details)
  10. [X86] Pre-commit new test case for D87214. NFC (details)
  11. [X86] Use the same sequence for i128 ISD::ABS on 64-bit targets as we use for i64 on 32-bit targets. (details)
  12. [InstCombine] add ptr difference tests; NFC (details)
  13. [InstCombine] improve fold of pointer differences (details)
Commit 1c34ac03a2de0e10f95f16526296dcae5166d129 by llvm-dev
LeonPasses.h - remove orphan function declarations. NFCI.

The implementations no longer exist.
The file was modifiedllvm/lib/Target/Sparc/LeonPasses.h
Commit dfc333050b544173741b66f27872cebb2b7ab983 by llvm-dev
LeonPasses.h - remove unnecessary includes. NFCI.

Reduce to forward declarations and move includes to LeonPasses.cpp where necessary.
The file was modifiedllvm/lib/Target/Sparc/LeonPasses.h
The file was modifiedllvm/lib/Target/Sparc/LeonPasses.cpp
Commit 95ca3aacf0f82955e9d259484b886c260337285c by llvm-dev
BTFDebug.h - reduce MachineInstr.h include to forward declaration. NFCI.
The file was modifiedllvm/lib/Target/BPF/BTFDebug.h
Commit 4e89a0ab02148c71d5be076e0d7262e93010006b by llvm-dev
MipsISelLowering.h - remove CCState/CCValAssign forward declarations. NFCI.

These are already defined in the CallingConvLower.h include.
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.h
Commit 5ea9e655efdd1188d9864a6c97a7a9b772559ff5 by llvm-dev
VPlan.h - remove unnecessary forward declarations. NFCI.

Already defined in includes.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit e52e7ad54defa3a95040b680beff2824c9c6fbb7 by epastor
[ms] [llvm-ml] Add support for bitwise named operators (AND, NOT, OR) in MASM

Add support for expressions of the form '1 or 2', etc.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D86944
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
The file was addedllvm/test/tools/llvm-ml/named_bitwise_operators.test
Commit 2feb6e9b8418b29c002bc830a3e2fdcbe9e39449 by epastor
[ms] [llvm-ml] Fix STRUCT field alignment

MASM aligns fields to the _minimum_ of the STRUCT alignment value and the size of the next field.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D86945
The file was modifiedllvm/test/tools/llvm-ml/struct.test
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
Commit a3ec4a3158f3a60c16ac1e3550667866fe1d4171 by epastor
[ms] [llvm-ml] Allow use of locally-defined variables in expressions

MASM allows variables defined by equate statements to be used in expressions.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D86946
The file was addedllvm/test/tools/llvm-ml/variable.test
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
Commit 7a06b166b1afb457a7df6ad73a6710b4dde4db68 by spatel
[DAGCombiner] allow more store merging for non-i8 truncated ops

This is a follow-up suggested in D86420 - if we have a pair of stores
in inverted order for the target endian, we can rotate the source
bits into place.
The "be_i64_to_i16_order" test shows a limitation of the current
function (which might be avoided if we integrate this function with
the other cases in mergeConsecutiveStores). In the earlier
"be_i64_to_i16" test, we skip the first 2 stores because we do not
match the full set as consecutive or rotate-able, but then we reach
the last 2 stores and see that they are an inverted pair of 16-bit
stores. The "be_i64_to_i16_order" test alters the program order of
the stores, so we miss matching the sub-pattern.

Differential Revision: https://reviews.llvm.org/D87112
The file was modifiedllvm/test/CodeGen/X86/stores-merging.ll
The file was modifiedllvm/test/CodeGen/AArch64/merge-trunc-store.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit f3a6f6ccfddfbd991269a917feb4ae9beb5a1610 by craig.topper
[X86] Pre-commit new test case for D87214. NFC
The file was modifiedllvm/test/CodeGen/X86/iabs.ll
Commit 01b3e167575412792901c705032e304ef184a75d by craig.topper
[X86] Use the same sequence for i128 ISD::ABS on 64-bit targets as we use for i64 on 32-bit targets.

Differential Revision: https://reviews.llvm.org/D87214
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/iabs.ll
The file was modifiedllvm/test/CodeGen/X86/abs.ll
Commit 70207816e35771459d053ab9faf75a50a4cb92fb by spatel
[InstCombine] add ptr difference tests; NFC
The file was modifiedllvm/test/Transforms/InstCombine/sub-gep.ll
Commit 8b300679192b317aa91a28e781fcf60d4416b0d6 by spatel
[InstCombine] improve fold of pointer differences

This was supposed to be an NFC cleanup, but there's
a real logic difference (did not drop 'nsw') visible
in some tests in addition to an efficiency improvement.

This is because in the case where we have 2 GEPs,
the code was *always* swapping the operands and
negating the result. But if we have 2 GEPs, we
should *never* need swapping/negation AFAICT.

This is part of improving flags propagation noticed
with PR47430.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
The file was modifiedllvm/test/Transforms/InstCombine/sub.ll
The file was modifiedllvm/test/Transforms/InstCombine/sub-gep.ll