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SuccessChanges

Summary

  1. Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors" (details)
  2. CommandLine.h - use auto const reference in ValuesClass::apply for range loop. NFCI. (details)
  3. [Statepoints] Update DAG root after emitting statepoint. (details)
  4. [MachinePipeliner] Fix II_setByPragma initialization (details)
  5. [AMDGPU][MC] Improved diagnostic messages for invalid registers (details)
  6. [FLANG] Generate error for invalid selector. (details)
  7. [AMDGPU] Simplify S_SETREG_B32 case in EmitInstrWithCustomInserter (details)
  8. [PowerPC] Fix STRICT_FRINT/STRICT_FNEARBYINT lowering (details)
  9. X86FrameLowering::adjustStackWithPops - cleanup auto usage. NFCI. (details)
  10. [mlir][Linalg] Reduction dimensions specified in TC definition of ConvOps. (details)
  11. [DSE] Add testcase that uses masked loads and stores (details)
Commit f078577f31cc96b6e8a064f628f81a376f21e2e2 by RonakNilesh.Chauhan
Revert "[AMDGPU] Support disassembly for AMDGPU kernel descriptors"

This reverts commit 487a80531006add8102d50dbcce4b6fd729ab1f6.

Tests fail on big endian machines.
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
The file was modifiedllvm/test/CodeGen/AMDGPU/nop-data.ll
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-failure.s
The file was modifiedllvm/include/llvm/Support/AMDHSAKernelDescriptor.h
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was removedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
Commit b29bdab8c76dbeda7786ef8e0d1bf58376955795 by llvm-dev
CommandLine.h - use auto const reference in ValuesClass::apply for range loop. NFCI.
The file was modifiedllvm/include/llvm/Support/CommandLine.h
Commit 4358fa782e3def5176f6e70c72de8e65702aeb0f by dantrushin
[Statepoints] Update DAG root after emitting statepoint.

Since we always generate CopyToRegs for statepoint results,
we must update DAG root after emitting statepoint, so that
these copies are scheduled before any possible local uses.
Note: getControlRoot() flushes all PendingExports, not only
those we generates for relocates. If that'll become a problem,
we can change it to flushing relocate exports only.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D87251
The file was modifiedllvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/statepoint-vreg.ll
Commit 818cf30b83305fa4a2f75821349210b0f7aff4a4 by Jinsong Ji
[MachinePipeliner] Fix II_setByPragma initialization

II_setByPragma was not reset between 2 calls of the MachinePipleiner pass

Reviewed By: bcahoon

Differential Revision: https://reviews.llvm.org/D87088
The file was modifiedllvm/lib/CodeGen/MachinePipeliner.cpp
The file was addedllvm/test/CodeGen/Hexagon/swp-pragma-initiation-interval-reset.ii
Commit 95b7040e43841802e1ccba59b46e7773c47c4ad6 by dmitry.preobrazhensky
[AMDGPU][MC] Improved diagnostic messages for invalid registers

Corrected parser to issue meaningful error messages for invalid and malformed registers.

See bug 41303: https://bugs.llvm.org/show_bug.cgi?id=41303

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D87234
The file was modifiedllvm/test/MC/AMDGPU/sop1.s
The file was modifiedllvm/test/MC/AMDGPU/trap.s
The file was modifiedllvm/test/MC/AMDGPU/xnack-mask.s
The file was modifiedllvm/test/MC/AMDGPU/vop_sdwa.s
The file was modifiedllvm/test/MC/AMDGPU/literals.s
The file was modifiedllvm/test/MC/AMDGPU/reg-syntax-extra.s
The file was modifiedllvm/test/MC/AMDGPU/smem.s
The file was modifiedllvm/test/MC/AMDGPU/sopk.s
The file was modifiedllvm/test/MC/AMDGPU/sop1-err.s
The file was modifiedllvm/test/MC/AMDGPU/reg-syntax-err.s
The file was modifiedllvm/test/MC/AMDGPU/sop2.s
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/MC/AMDGPU/flat-scratch.s
The file was modifiedllvm/test/MC/AMDGPU/smrd-err.s
The file was modifiedllvm/test/MC/AMDGPU/out-of-range-registers.s
The file was modifiedllvm/test/MC/AMDGPU/vop3.s
The file was modifiedllvm/test/MC/AMDGPU/smrd.s
The file was modifiedllvm/test/MC/AMDGPU/expressions.s
The file was modifiedllvm/test/MC/AMDGPU/mtbuf.s
Commit 5ec043eae1877add1cde2a7bd6e01ef64549a41d by inderjeet_kalra
[FLANG] Generate error for invalid selector.

Fix of PR47339

Differential Revision: https://reviews.llvm.org/D87073/new/
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was addedflang/test/Semantics/resolve95.f90
The file was modifiedflang/lib/Semantics/tools.cpp
Commit 649bde488ce9b5c1143e718247f0eda461300a77 by jay.foad
[AMDGPU] Simplify S_SETREG_B32 case in EmitInstrWithCustomInserter

NFC.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 88ff4d2ca1a0aaed6888152042256a0ef3fe863d by qiucofan
[PowerPC] Fix STRICT_FRINT/STRICT_FNEARBYINT lowering

In standard C library, both rint and nearbyint returns rounding result
in current rounding mode. But nearbyint never raises inexact exception.
On PowerPC, x(v|s)r(d|s)pic may modify FPSCR XX, raising inexact
exception. So we can't select constrained fnearbyint into xvrdpic.

One exception here is xsrqpi, which will not raise inexact exception, so
fnearbyint f128 is okay here.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D87220
The file was modifiedllvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-round.ll
The file was modifiedclang/test/CodeGen/builtins-ppc-fpconstrained.c
The file was modifiedclang/test/CodeGen/builtins-ppc-vsx.c
Commit e706116e1182f39c8de5d9c9981df08a9f614e7a by llvm-dev
X86FrameLowering::adjustStackWithPops - cleanup auto usage. NFCI.

Don't use auto for non-obvious types, and use const references.
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
Commit 53ffeea6d59ae5ba78b8c85a31c06677c3ab7719 by limo
[mlir][Linalg] Reduction dimensions specified in TC definition of ConvOps.

This commit specifies reduction dimensions for ConvOps. This prevents
running reduction loops in parallel and enables easier detection of kernel dimensions
which we will need later on.

Differential Revision: https://reviews.llvm.org/D87288
The file was modifiedmlir/test/Dialect/Linalg/loops.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOpsSpec.tc
Commit 27cd187587eb6bb81f73533a1e05be24292a0d8b by kparzysz
[DSE] Add testcase that uses masked loads and stores
The file was addedllvm/test/Transforms/DeadStoreElimination/masked-dead-store.ll