SuccessChanges

Summary

  1. [LVI] Refactor getValueFromICmpCondition (NFC) (details)
  2. [CVP] Add tests for mask comparisons (NFC) (details)
  3. [LVI] Get value range from mask comparison (details)
  4. [CVP] Additional tests for comparison with offset (NFC) (details)
  5. [ARM] Constant fold VMOVrh (details)
  6. [X86] Add 32-bit command lines to masked_store.ll and masked_load.ll (details)
  7. [X86] Stop reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore from creating scalar i64 load/stores in 32-bit mode (details)
Commit f94bbe19b6f6086ff94b1eb4ef0bc5802752bfe1 by nikita.ppv
[LVI] Refactor getValueFromICmpCondition (NFC)

Rewrite this in a way where the core logic is in a separate
function, that is invoked with swapped operands. This makes it
easier to add handling for additional icmp patterns.
The file was modifiedllvm/lib/Analysis/LazyValueInfo.cpp
Commit 91af6a78d00f731826ff2eb81c9a9281b1d21388 by nikita.ppv
[CVP] Add tests for mask comparisons (NFC)
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Commit 445db89b537e5397a2d4b08e79751edb845b2c2a by nikita.ppv
[LVI] Get value range from mask comparison

InstCombine likes to canonicalize comparisons of the form
X == C || X == C+1 into (X & -2) == C'. Make sure LVI can still
recover the value range from this. Can of course also be useful
for proper mask comparisons.

For the sake of clarity, the implementation goes through KnownBits
to compute the range.
The file was modifiedllvm/lib/Analysis/LazyValueInfo.cpp
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Commit 1a2723809839a888f03ba69e36a358ba18c0c8ae by nikita.ppv
[CVP] Additional tests for comparison with offset (NFC)

Both icmps have an additional offset here. We would fold this if
the second one didn't.
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/icmp.ll
Commit 29bd8ea11091d996d166257e07bf2308651d284d by david.green
[ARM] Constant fold VMOVrh

This adds simple constant folding for VMOVrh, to constant fold fp16
constants to integer values. It can help especially with soft calling
conventions, but some of the results are not optimal as we end up
loading using a vldr. This will be improved in a follow up patch.

Differential Revision: https://reviews.llvm.org/D87789
The file was modifiedllvm/test/CodeGen/ARM/fp16-bitcast.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/ARM/cmse-clear-float-hard.ll
Commit 9b1c98c0fbe2d7fdc22debd3e7d1fcf44952a0ce by craig.topper
[X86] Add 32-bit command lines to masked_store.ll and masked_load.ll
The file was modifiedllvm/test/CodeGen/X86/masked_store.ll
The file was modifiedllvm/test/CodeGen/X86/masked_load.ll
Commit 4e8c028158b56d9c2142a62464e8e0686bde3584 by craig.topper
[X86] Stop reduceMaskedLoadToScalarLoad/reduceMaskedStoreToScalarStore from creating scalar i64 load/stores in 32-bit mode

If we emit a scalar i64 load/store it will get type legalized to two i32 load/stores.

Differential Revision: https://reviews.llvm.org/D87862
The file was modifiedllvm/test/CodeGen/X86/masked_load.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp