SuccessChanges

Summary

  1. Renamed LLVMBuildFactory.pathRelativeToBuild to LLVMBuildFactory.pathRelativeTo. (details)
Commit 9788329dd54eee5217901a301977af3749eac64a by gkistanova
Renamed LLVMBuildFactory.pathRelativeToBuild to LLVMBuildFactory.pathRelativeTo.
The file was modifiedzorg/buildbot/builders/ClangLTOBuilder.py (diff)
The file was modifiedzorg/buildbot/builders/XToolchainBuilder.py (diff)
The file was modifiedzorg/buildbot/builders/OpenMPBuilder.py (diff)
The file was modifiedzorg/buildbot/builders/LLDBBuilder.py (diff)
The file was modifiedzorg/buildbot/builders/UnifiedTreeBuilder.py (diff)
The file was modifiedzorg/buildbot/process/factory.py (diff)
The file was modifiedzorg/buildbot/builders/ClangBuilder.py (diff)
The file was modifiedzorg/buildbot/builders/LibcxxAndAbiBuilder.py (diff)

Summary

  1. [PowerPC] Remove unnecessary patterns and types (details)
  2. [EarlyCSE] Small refactoring changes, NFC (details)
  3. Revert "[clang-cl] Always interpret the LIB env var as separated with semicolons" (details)
  4. [ASTImporter] Modifying ImportDeclContext(...) to ensure that we also handle the case when the FieldDecl is an ArrayType whose ElementType is a RecordDecl (details)
  5. [NFC][regalloc] Use reverse iterator ranges for improved readability (details)
  6. Don't build a StringLiteral expression with reference type when (details)
  7. [AArch64][GlobalISel] Make <4 x s16> G_ASHR and G_LSHR legal. (details)
  8. [mlir] Add tutorial index.md pages (details)
  9. [AArch64][GlobalISel] Add a post-legalize combine for lowering vector-immediate G_ASHR/G_LSHR. (details)
  10. [AArch64][GlobalISel] Merge selection of vector-vector G_ASHR/G_LSHR and support more cases. (details)
  11. Fix comment typos. NFC. (details)
  12. [lldb/test] Clean up version checking. (details)
  13. [llvm] Fix comment typos.  NFC. (details)
  14. [RISCV] Do not mandate scheduling for CSR instructions (details)
  15. [SimplifyCFG] Override options in default constructor (details)
Commit bb821355387fb4320322b8c2ff63994fffaf49ce by baptiste.saleil
[PowerPC] Remove unnecessary patterns and types

These patterns and type uses were added by mistake by commit
1372e23c7d4b25fd23689842246e66f70c949b46
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
Commit 2c768c7d6c6185e2c9a606027ee673bd2640e5ca by kparzysz
[EarlyCSE] Small refactoring changes, NFC

1. Store intrinsic ID in ParseMemoryInst instead of a boolean flag
   "IsTargetMemInst". This will make it easier to add support for
   target-independent intrinsics.
2. Extract the complex multiline conditions from EarlyCSE::processNode
   into a new function "getMatchingValue".

Differential Revision: https://reviews.llvm.org/D87691
The file was modifiedllvm/lib/Transforms/Scalar/EarlyCSE.cpp
Commit 8c3ef08f8a4eb40609af55d541e5135856fde086 by martin
Revert "[clang-cl] Always interpret the LIB env var as separated with semicolons"

This reverts commit 4d85444b317a00a3e15da63cdb693d272c99a0cc.

This commit broke building lldb's NativeProcessProtocolTest.cpp,
with errors like these:

In file included from include/llvm/Support/Process.h:32:0,
                 from tools/lldb/unittests/Host/NativeProcessProtocolTest.cpp:12:
include/llvm/Support/Program.h:39:11: error: reference to ‘pid_t’ is ambiguous
   typedef pid_t procid_t;

/usr/include/sched.h:38:17: note: candidates are: typedef __pid_t pid_t
typedef __pid_t pid_t;

tools/lldb/include/lldb/lldb-types.h:85:18: note: typedef uint64_t lldb::pid_t
typedef uint64_t pid_t;
The file was modifiedllvm/include/llvm/Support/Process.h
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/test/Driver/cl-inputs.c
The file was modifiedllvm/lib/Support/Process.cpp
Commit 6807f244fa67bb75ef09fb3db54743b5b358a7fa by shafik
[ASTImporter] Modifying ImportDeclContext(...) to ensure that we also handle the case when the FieldDecl is an ArrayType whose ElementType is a RecordDecl

When we fixed ImportDeclContext(...) in D71378 to make sure we complete each
FieldDecl of a RecordDecl when we are importing the definition we missed the
case where a FeildDecl was an ArrayType whose ElementType is a record.

This fix was motivated by a codegen crash during LLDB expression parsing. Since
we were not importing the definition we were crashing during layout which
required all the records be defined.

Differential Revision: https://reviews.llvm.org/D86660
The file was addedlldb/test/API/commands/expression/codegen-crash-import-def-arraytype-element/main.cpp
The file was addedlldb/test/API/commands/expression/codegen-crash-import-def-arraytype-element/TestImportDefinitionArrayType.py
The file was addedlldb/test/API/commands/expression/codegen-crash-import-def-arraytype-element/Makefile
The file was modifiedclang/lib/AST/ASTImporter.cpp
Commit 6a6b06f5262bb96523eceef4a42fe8e60ae2a630 by mtrofin
[NFC][regalloc] Use reverse iterator ranges for improved readability

Differential Revision: https://reviews.llvm.org/D88047
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit 0f6facca9701f6df87d13e55d70bd7111a0472aa by richard
Don't build a StringLiteral expression with reference type when
performing list-initialization of a char array reference from a braced
string literal of a smaller size.
The file was modifiedclang/test/CodeGenCXX/cxx0x-initializer-references.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
Commit 825203daae7ffea0326757fdbb819682dfbef4f9 by Amara Emerson
[AArch64][GlobalISel] Make <4 x s16> G_ASHR and G_LSHR legal.

Selection support for these is coming up.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
Commit 3a799deed72963d124cc9ab8141fb32976cfc846 by jpienaar
[mlir] Add tutorial index.md pages

Sets the content for the section entry pages Hugo side.

Differential Revision: https://reviews.llvm.org/D87969
The file was modifiedmlir/docs/Tutorials/Toy/Ch-1.md
The file was addedmlir/docs/Tutorials/Toy/_index.md
The file was modifiedmlir/docs/Tutorials/Toy/Ch-2.md
The file was addedmlir/docs/Tutorials/_index.md
Commit a513fdec90de6b0719e8dc4f079bbdd78eb9aaf1 by Amara Emerson
[AArch64][GlobalISel] Add a post-legalize combine for lowering vector-immediate G_ASHR/G_LSHR.

In order to select the immediate forms using the imported patterns, we need to
lower them into new G_VASHR/G_VLSHR target generic ops. Add a combine to do this
matching build_vector of constant operands.

With this, we get selection for free.
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-vashr-vlshr.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrGISel.td
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir
Commit e3f5046e44772d41632796389716930bafa96b74 by Amara Emerson
[AArch64][GlobalISel] Merge selection of vector-vector G_ASHR/G_LSHR and support more cases.

The vector-immediate cases are handled elsewhere in an earlier commit.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir
Commit ca8321574d62cdccc85cf222ae43e0b48c3dfe96 by kazu
Fix comment typos. NFC.
The file was modifiedllvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
The file was modifiedllvm/test/Analysis/BlockFrequencyInfo/irreducible.ll
Commit 307b7a1d665898d0e980461919996b6a670a4847 by rupprecht
[lldb/test] Clean up version checking.

A few fixes while trying to figure out why tests are being skipped for arsenm:

- We check `$compiler -v`, but `-v` is `--verbose`, not `--version`. Use the long flag name.
- We check all lines matching `version ...`, but we should exit early for the first version string we see (which should be the main one). I'm not sure if this is the issue, but perhaps this is causing some users to skip some tests if another "version ..." is showing up later.
- Having `\.` in a python string is triggering pylint warnings, because it should be escaped as a regex string, e.g. `r'\.' However, `.` in a character class does not need to be escaped, as it matches only a literal `.` in that context.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D88051
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
Commit 161159888b430dad90605563259cd28b1ad25b14 by kazu
[llvm] Fix comment typos.  NFC.
The file was modifiedllvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
Commit 394d02016705e4b0fdfaa34c53be695f3f61922d by ebahapo
[RISCV] Do not mandate scheduling for CSR instructions

Scheduling information is of little value when they may disrupt the
pipeline.  This patch allows omitting the scheduling information for CSR
instructions while still setting `SchedMachineModel::CompleteModel`.  For
specific cases, any scheduling information added will be used by the
scheduler.

Differential revision: https://reviews.llvm.org/D85366
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
Commit 1747f7776403626b23ef0389264643fe4d6bec17 by aeubanks
[SimplifyCFG] Override options in default constructor

SimplifyCFG's options should always be overridden by command line flags,
but they mistakenly weren't in the default constructor.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D87718
The file was modifiedllvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/HoistCode.ll
The file was modifiedllvm/include/llvm/Transforms/Scalar/SimplifyCFG.h

Summary

  1. [testsuite] Allow a (custom) linker to be specified. (details)
Commit f95eba922b0a1b07e2c68734c9cc7d6c1754d744 by ditaliano
[testsuite] Allow a (custom) linker to be specified.

Differential Revision:  https://reviews.llvm.org/D88061
The file was modifiedCMakeLists.txt (diff)