SuccessChanges

Summary

  1. [mlir][GPU] Improve constant sinking in kernel outlining (details)
  2. [SystemZ] Don't emit PC-relative memory accesses to unaligned symbols. (details)
  3. [SDag] Refactor and simplify divergence calculation and checking. NFC. (details)
  4. [SDag] Verify DAG divergence after dumping. NFC. (details)
  5. [mlir] Fix shared libs build (details)
  6. Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access" (details)
  7. [AArch64] Add v8.5 Branch Target Identification support. (details)
  8. [mlir][Linalg] Refactor Linalg creation of loops to allow passing iterArgs - NFC (details)
  9. [GlobalISel] fix widenScalarUnmerge if widen type is not a multiple of destination type (details)
  10. [mlir][Linalg] Refactor Linalg op initTensors support - NFC (details)
  11. [mlir][openacc] Add update operation (details)
  12. [InstCombine] visitTrunc - trunc (lshr (sext A), C) --> (ashr A, C) non-uniform support (details)
  13. [SDAG] Do not convert undef to 0 when folding CONCAT/BUILD_VECTOR (details)
  14. [Sema] Address-space sensitive check for unbounded arrays (v2) (details)
  15. [InstCombine] Add exact shift tests missed in D88475 (details)
  16. [mlir] Expose Dialect class and registration/loading to C API (details)
  17. [InstCombine] Inherit exact flags on extended shifts in trunc (lshr (sext A), C) --> (ashr A, C) (details)
  18. [clangd] Improve PopulateSwitch tweak to work on non-empty switches (details)
  19. [mlir][openacc] Add wait operation (details)
  20. [InstCombine] Add some basic trunc(lshr(zext(x),c)) tests (details)
  21. [mlir][openacc] Add init operation (details)
  22. [InstCombine] use redirect of input file in regression tests; NFC (details)
Commit edeff6e642e66a5be05c11cb8b9b36b3383078ae by herhut
[mlir][GPU] Improve constant sinking in kernel outlining

The previous implementation did not support sinking simple expressions. In particular,
it is often beneficial to sink dim operations.

Differential Revision: https://reviews.llvm.org/D88439
The file was modifiedmlir/test/Dialect/GPU/outlining.mlir
The file was modifiedmlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
Commit 75a5febe31cb2660c4f72d9745625704d29946e1 by paulsson
[SystemZ] Don't emit PC-relative memory accesses to unaligned symbols.

In the presence of packed structures (#pragma pack(1)) where elements are
referenced through pointers, there will be stores/loads with alignment values
matching the default alignments for the element types while the elements are
in fact unaligned. Strictly speaking this is incorrect source code, but is
unfortunately part of existing code and therefore now addressed.

This patch improves the pattern predicate for PC-relative loads and stores by
not only checking the alignment value of the instruction, but also making
sure that the symbol (and element) itself is aligned.

Fixes https://bugs.llvm.org/show_bug.cgi?id=44405

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D87510
The file was addedllvm/test/CodeGen/SystemZ/int-move-10.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZOperators.td
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
Commit d6b04f3937e374572039005d1446b4a950dc8f01 by jay.foad
[SDag] Refactor and simplify divergence calculation and checking. NFC.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
Commit 781edd501c25ce1b526764e2b048e9e1c5a41728 by jay.foad
[SDag] Verify DAG divergence after dumping. NFC.

When debugging, it's useful to be able to see the DAG that has just
failed divergence verification.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Commit 6199219bbd8224b7cf69b4a538bd6bc49f6daaf0 by andrzej.warzynski
[mlir] Fix shared libs build

The following change causes the shared libraries build
(BUILD_SHARED_LIBS=On) to fail:
  * https://reviews.llvm.org/D88351
This patch will fix that.

Differential Revision: https://reviews.llvm.org/D88484
The file was modifiedmlir/lib/Target/CMakeLists.txt
Commit 8b08fa0103c8d8e624b19fad5a5006e7a783ecb7 by Mirko.Brkusanin
Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access"

This reverts commit f5cd7ec9f3fc969ff5e1feed961996844333de3b.

Certain rocPRIM/rocThrust/hipCUB tests were failing because of this change.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/adjust-alloca-alignment.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
Commit f34ae1b9de68152de037fd3e394d196b997c4296 by daniel.kiss
[AArch64] Add v8.5 Branch Target Identification support.

The .note.gnu.property must be in the assembly file to indicate the
support for BTI otherwise BTI will be disabled for the whole library.
__unw_getcontext and libunwind::Registers_arm64::jumpto() may be called
indirectly therefore they should start with a landing pad.

Reviewed By: tamas.petz, #libunwind, compnerd

Differential Revision: https://reviews.llvm.org/D77786
The file was modifiedlibunwind/src/assembly.h
Commit 074ab233ed620c1afa44e5bc2d86ab448a9ce1ed by ntv
[mlir][Linalg] Refactor Linalg creation of loops to allow passing iterArgs - NFC

This revision changes the signatures of helper function that Linalg uses to create loops so that they can also take iterArgs.
iterArgs are asserted empty to ensure no functional change.
This is a mechanical change in preparation of tiling on linalg on tensors to avoid  polluting the implementation with an NFC change.

Differential Revision: https://reviews.llvm.org/D88480
The file was modifiedmlir/include/mlir/Dialect/SCF/EDSC/Builders.h
The file was modifiedmlir/lib/Dialect/SCF/EDSC/Builders.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Loops.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
Commit 113114a5da60ef30731046f50fc1d67ff87897fc by dominik.montada
[GlobalISel] fix widenScalarUnmerge if widen type is not a multiple of destination type

Fix creation of illegal unmerge when widen was requested to a type which
is not a multiple of the destination type. E.g. when trying to widen
an s48 unmerge to s64 the existing code would create an illegal unmerge
from s64 to s48.

Instead, create further unmerges to a GCD type, then use this to remerge
these intermediate results to the actual destinations.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D88422
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Commit 6b649570cbc44dd775d9657805cc60b2075d8011 by ntv
[mlir][Linalg] Refactor Linalg op initTensors support - NFC

Manually-defined named ops do not currently support `init_tensors` or return values and may never support them. Add extra interface to the StructuredOpInterface so that we can still write op-agnostic transformations based on StructuredOpInterface.

This is an NFC extension in preparation for tiling on tensors.

Differential Revision: https://reviews.llvm.org/D88481
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
Commit ecc997807180a6e763f12e3d011f6b887db0d6a9 by clementval
[mlir][openacc] Add update operation

This patch introduce the update operation that represent the OpenACC update directive.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88102
The file was modifiedmlir/test/Dialect/OpenACC/invalid.mlir
The file was modifiedmlir/test/Dialect/OpenACC/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Commit 14ff38e235c4aec8e444d8aec26ce5d3a4c524d2 by llvm-dev
[InstCombine] visitTrunc - trunc (lshr (sext A), C) --> (ashr A, C) non-uniform support

This came from @lebedev.ri's suggestion to use m_SpecificInt_ICMP for D88429 - since I was going to change the m_APInt to m_Constant for that patch I thought I would do it for the only other user of the APInt first.

I've added a ConstantExpr::getUMin helper - its trivial to add UMAX/SMIN/SMAX but thought I'd wait until we have use cases.

Differential Revision: https://reviews.llvm.org/D88475
The file was modifiedllvm/lib/IR/Constants.cpp
The file was modifiedllvm/include/llvm/IR/Constants.h
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/cast.ll
Commit db04bec5f1eeb581ee1470e5f444cc7b918c6d93 by kparzysz
[SDAG] Do not convert undef to 0 when folding CONCAT/BUILD_VECTOR

Differential Revision: https://reviews.llvm.org/D88273
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was addedllvm/test/CodeGen/Hexagon/autohvx/isel-undef-not-zero.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll
Commit d9ee935679e7164d1c47e351bbbcf5c25742b59c by Chris.Hamilton
[Sema] Address-space sensitive check for unbounded arrays (v2)

Check applied to unbounded (incomplete) arrays and pointers to spot
cases where the computed address is beyond the largest possible
addressable extent of the array, based on the address space in which the
array is delcared, or which the pointer refers to.

Check helps to avoid cases of nonsense pointer math and array indexing
which could lead to linker failures or runtime exceptions.  Of
particular interest when building for embedded systems with small
address spaces.

This is version 2 of this patch -- version 1 had some testing issues
due to a sign error in existing code.  That error is corrected and
lit test for this chagne is extended to verify the fix.

Originally reviewed/accepted by: aaron.ballman
Original revision: https://reviews.llvm.org/D86796

Reviewed By: ebevhan

Differential Revision: https://reviews.llvm.org/D88174
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/SemaCXX/constant-expression-cxx1y.cpp
The file was addedclang/test/Sema/unbounded-array-bounds.c
The file was modifiedclang/test/Sema/const-eval.c
The file was modifiedclang/lib/Sema/SemaChecking.cpp
Commit 042f22bda5d3e2851205781f0b921cc810bb6dcb by llvm-dev
[InstCombine] Add exact shift tests missed in D88475

I missed the post-LGTM comment from @lebedev.ri
The file was modifiedllvm/test/Transforms/InstCombine/cast.ll
Commit 64c0c9f01511dc300b29e7a20a13958c5932e314 by zinenko
[mlir] Expose Dialect class and registration/loading to C API

- Add a minimalist C API for mlir::Dialect.
- Allow one to query the context about registered and loaded dialects.
- Add API for loading dialects.
- Provide functions to register the Standard dialect.

When used naively, this will require to separately register each dialect. When
we have more than one exposed, we can add variadic macros that expand to
individual calls.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D88162
The file was addedmlir/include/mlir-c/StandardDialect.h
The file was modifiedmlir/test/CAPI/CMakeLists.txt
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was modifiedmlir/include/mlir/CAPI/IR.h
The file was modifiedmlir/lib/CAPI/CMakeLists.txt
The file was addedmlir/lib/CAPI/Standard/CMakeLists.txt
The file was addedmlir/lib/CAPI/Standard/StandardDialect.cpp
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedmlir/include/mlir-c/IR.h
Commit 89a8a0c910422b9d363120769e2eebda03394b0f by llvm-dev
[InstCombine] Inherit exact flags on extended shifts in trunc (lshr (sext A), C) --> (ashr A, C)

This was missed in D88475
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/cast.ll
Commit 4fb303f340e2c55783f9b0f3ed33fa2c36360acf by sam.mccall
[clangd] Improve PopulateSwitch tweak to work on non-empty switches

Improve the recently-added PopulateSwitch tweak to work on non-empty switches.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D88434
The file was modifiedclang-tools-extra/clangd/unittests/TweakTests.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/PopulateSwitch.cpp
Commit cc3b8e730e4e8783cc9d81a00fd235068fa522e5 by clementval
[mlir][openacc] Add wait operation

This patch introduce the wait operation that represent the OpenACC wait directive.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88125
The file was modifiedmlir/test/Dialect/OpenACC/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
The file was modifiedmlir/test/Dialect/OpenACC/invalid.mlir
Commit 7a55989dc4305e66734bdd84a9f9eefeb9fe64bd by llvm-dev
[InstCombine] Add some basic trunc(lshr(zext(x),c)) tests

Copied from the sext equivalents
The file was modifiedllvm/test/Transforms/InstCombine/cast.ll
Commit 51323fe2b89e976dc53356299d5cc3daeaaee5a7 by clementval
[mlir][openacc] Add init operation

This patch introduces the init operation that represents the init executable directive
from the OpenACC 3.0 specifications.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88254
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
The file was modifiedmlir/test/Dialect/OpenACC/ops.mlir
The file was modifiedmlir/test/Dialect/OpenACC/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
Commit ee34d9b210cb5a6d14fe069e2e2ae75b0548dba9 by spatel
[InstCombine] use redirect of input file in regression tests; NFC

This is a repeat of 1880092722 from 2009. We should have less risk
of hitting bugs at this point because we auto-generate positive CHECK
lines only, but this makes things consistent.

Copying the original commit msg:
"Change tests from "opt %s" to "opt < %s" so that opt doesn't see the
input filename so that opt doesn't print the input filename in the
output so that grep lines in the tests don't unintentionally match
strings in the input filename."
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-a.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-mul-overflow-check-via-udiv-of-allones.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-xor.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-lshr.ll
The file was modifiedllvm/test/Transforms/InstCombine/srem-via-sdiv-mul-sub.ll
The file was modifiedllvm/test/Transforms/InstCombine/pr38915.ll
The file was modifiedllvm/test/Transforms/InstCombine/signbit-shl-and-icmpeq-zero.ll
The file was modifiedllvm/test/Transforms/InstCombine/urem-via-udiv-mul-sub.ll
The file was modifiedllvm/test/Transforms/InstCombine/merging-multiple-stores-into-successor.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check-via-add.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-c.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-f.ll
The file was modifiedllvm/test/Transforms/InstCombine/result-of-add-of-negative-is-non-zero-and-no-underflow.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp-shl-nuw.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-a.ll
The file was modifiedllvm/test/Transforms/InstCombine/sdiv-of-non-negative-by-negative-power-of-two.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-d.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll
The file was modifiedllvm/test/Transforms/InstCombine/cmp-x-vs-neg-x.ll
The file was modifiedllvm/test/Transforms/InstCombine/high-bit-signmask.ll
The file was modifiedllvm/test/Transforms/InstCombine/sdiv-exact-by-power-of-two.ll
The file was modifiedllvm/test/Transforms/InstCombine/pr41164.ll
The file was modifiedllvm/test/Transforms/InstCombine/strict-sub-underflow-check-to-comparison-of-sub-operands.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-mul-udiv.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-right-shift-input-masking.ll
The file was modifiedllvm/test/Transforms/InstCombine/shl-and-signbit-icmpeq-zero.ll
The file was modifiedllvm/test/Transforms/InstCombine/signbit-lshr-and-icmpeq-zero.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
The file was modifiedllvm/test/Transforms/InstCombine/lshr-and-signbit-icmpeq-zero.ll
The file was modifiedllvm/test/Transforms/InstCombine/sdiv-exact-by-negative-power-of-two.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-a.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-xor.ll
The file was modifiedllvm/test/Transforms/InstCombine/pr21891.ll
The file was modifiedllvm/test/Transforms/InstCombine/high-bit-signmask-with-trunc.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-sub-lack-of-overflow-check.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-b.ll
The file was modifiedllvm/test/Transforms/InstCombine/infinite-loop-postdom.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-add-overflow-check-via-add.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-d.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-e.ll
The file was modifiedllvm/test/Transforms/InstCombine/shl-and-negC-icmpeq-zero.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-by-signext.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-e.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-mul-overflow-check-via-mul-udiv.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll
The file was modifiedllvm/test/Transforms/InstCombine/sub-of-negatible.ll
The file was modifiedllvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-shl.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-c.ll
The file was modifiedllvm/test/Transforms/InstCombine/do-not-clone-dbg-declare.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-e.ll
The file was modifiedllvm/test/Transforms/InstCombine/variable-signext-of-variable-high-bit-extraction.ll
The file was modifiedllvm/test/Transforms/InstCombine/conditional-variable-length-signext-after-high-bit-extract.ll
The file was modifiedllvm/test/Transforms/InstCombine/lshr-and-negC-icmpeq-zero.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-e.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-f.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-c.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-add-lack-of-overflow-check.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-lshr.ll
The file was modifiedllvm/test/Transforms/InstCombine/pr38897.ll
The file was modifiedllvm/test/Transforms/InstCombine/result-of-add-of-negative-or-zero-is-non-zero-and-no-underflow.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-shl.ll
The file was modifiedllvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-after-truncation-variant-b.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-after-truncation-variant-b.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-add-overflow-check.ll
The file was modifiedllvm/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-direction-in-bit-test.ll
The file was modifiedllvm/test/Transforms/InstCombine/unsigned-sub-overflow-check.ll