SuccessChanges

Summary

  1. [AArch64][GlobalISel] Make <8 x s8> shifts legal and add selection support. (details)
  2. [AArch64][GlobalISel] Make <8 x s8> integer arithmetic ops legal. (details)
  3. [AArch64][GlobalISel] Alias rules for G_FCMP to G_ICMP. (details)
  4. [AArch64][GlobalISel] Use emitTestBit in selection for G_BRCOND (details)
  5. [GlobalISel][AArch64] Don't emit cset for G_FCMPs feeding into G_BRCONDs (details)
  6. [flang] Readability improvement in binary->decimal conversion (details)
  7. [AMDGPU] Allow SOP asm mnemonic to differ (details)
  8. Fix a bug in memset formation with vectors of non-integral pointers (details)
  9. [AArch64][SVE] Add lowering for llvm fabs (details)
  10. [memcpyopt] Conservatively handle non-integral pointers (details)
  11. [flang][msvc] Rework a MSVC work-around to avoid clang warning (details)
Commit a97e97faedab0ba57f7c471f778d38cfd18988b8 by Amara Emerson
[AArch64][GlobalISel] Make <8 x s8> shifts legal and add selection support.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit e28c5899a24117cdb0b081a54508af486a2634a0 by Amara Emerson
[AArch64][GlobalISel] Make <8 x s8> integer arithmetic ops legal.
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vabs.ll
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
Commit 017b871502b0c6fe72f52c5b47780f77e38d9035 by Amara Emerson
[AArch64][GlobalISel] Alias rules for G_FCMP to G_ICMP.

No need to be different here for the vast majority of rules.
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-cmp.mir
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-icmp.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit 8e8664e55e8986e061283cb20c30f21fb2d2b641 by Jessica Paquette
[AArch64][GlobalISel] Use emitTestBit in selection for G_BRCOND

Partially refactoring, partially fixing a bug.

- We shouldn't use TB(N)ZX unless the bit number is >= 32
- We can fold more than xor using emitTestBit

Also remove a check which isn't relevant anymore + update tests.

Rename select-brcond-of-not.mir to select-brcond-of-binop.mir, since it now
tests more than just G_XOR.

Differential Revision: https://reviews.llvm.org/D88702
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/select-brcond-of-not.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-brcond-of-binop.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir
Commit 5402d11b1d8853ff10417b0f8d32edde3f4a51c0 by Jessica Paquette
[GlobalISel][AArch64] Don't emit cset for G_FCMPs feeding into G_BRCONDs

Similar to the FP case in `AArch64TargetLowering::LowerBR_CC`.

Instead of emitting the csets + a tbnz, just emit a compare + bcc
(or two bccs, depending on the condition code)

This improves cases like this: https://godbolt.org/z/v8hebx

This is a 0.1% geomean code size improvement for CTMark at -O3.

Differential Revision: https://reviews.llvm.org/D88624
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit e99d184d54937b56d5f4f1ba06fb984019beaee1 by pklausler
[flang] Readability improvement in binary->decimal conversion

Tweak binary->decimal conversions to avoid an integer multiplication
in a hot loop to improve readability and get a minor (~5%) speed-up.
Use native integer division by constants for more readability, too,
since current build compilers seem to optimize it correctly now.
Delete the now needless temporary work-around facility in
Common/unsigned-const-division.h.

Differential revision: https://reviews.llvm.org/D88604
The file was modifiedflang/lib/Decimal/big-radix-floating-point.h
The file was modifiedflang/runtime/edit-output.cpp
The file was removedflang/include/flang/Common/unsigned-const-division.h
The file was modifiedflang/lib/Decimal/binary-to-decimal.cpp
Commit caeb13aba853b949ca45627f023dbeac77c13b2f by Stanislav.Mekhanoshin
[AMDGPU] Allow SOP asm mnemonic to differ

Allows the creation of real SOP1 instructions with
assembler mnemonics that differ from their
pseudo-instruction mnemonics. The default behavior
keeps the mnemonics matching.

Corrects a subtarget label typo in a comment.

Authored By: Joe_Nash

Differential Revision: https://reviews.llvm.org/D88708
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
Commit de3cb9548d77726186db2d384193e0565cb0afc5 by listmail
Fix a bug in memset formation with vectors of non-integral pointers

We were converting the non-integral store into a integer store which is not legal.
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/test/Transforms/LoopIdiom/non-integral-pointers.ll
Commit aab6f7db471d577d313f334cba37667c35158420 by muhammad.asif.manzoor
[AArch64][SVE] Add lowering for llvm fabs

Add the functionality to lower fabs for passthru variant

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D88679
The file was modifiedllvm/test/CodeGen/AArch64/sve-fp.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Commit bb0344644a656734d707ab9c0baf6eb0533ac905 by listmail
[memcpyopt] Conservatively handle non-integral pointers

If we allow the non-integral pointers to become memset and memcpy, we loose the ability to reason about pointer propagation.  This patch is modeled on changes we've carried downstream for a long time, figured it was worth being equally conservative for other users.  There is room to refine the semantics and handling here if anyone is motivated.
The file was modifiedllvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
The file was addedllvm/test/Transforms/MemCpyOpt/non-integral.ll
Commit 75a5ec1bad18ae1d741830cc46946da00fed6ed9 by pklausler
[flang][msvc] Rework a MSVC work-around to avoid clang warning

A recent MSVC work-around patch is eliciting unused variable
warnings from clang; package the lambda reference arguments
into a struct to avoid the warning.

Differential revision: https://reviews.llvm.org/D88695
The file was modifiedflang/lib/Evaluate/fold-implementation.h