SuccessChanges

Summary

  1. Handle unused variable without asserts (details)
  2. [yaml2obj][elf2yaml] - Add a support for the `EntSize` field for `SHT_HASH` sections. (details)
  3. Fix limit behavior of dynamic alloca (details)
  4. [clangd] Remove Tweak::Intent, use CodeAction kind directly. NFC (details)
  5. [RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV. (details)
  6. [ARM] Prevent constants from iCmp instruction from being hoisted if part of a min(max()) pattern (details)
  7. [InstCombine] Add partial bswap test from D88578 (details)
  8. [mlir] Add a subtensor operation (details)
  9. [mlir] Add canonicalization for the `subtensor` op (details)
  10. [InstCombine] Add some basic vector bswap tests (details)
  11. [clangd][lit] Update document-link.test to respect custom resource-dir locations (details)
  12. [mlir] Add subtensor_insert operation (details)
  13. [MLIR][LLVM] Fixed `topologicalSort()` to iterative version (details)
  14. [GVN LoadPRE] Add test to show an opportunty. (details)
Commit bfd7ee92ccec2904d98b20b475f48addadc4ec5f by tpopp
Handle unused variable without asserts
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertSkips.cpp
Commit 5829dc925002aaf5e80189924e59d238d3d2a4d1 by grimar
[yaml2obj][elf2yaml] - Add a support for the `EntSize` field for `SHT_HASH` sections.

Specification  for SHT_HASH table says (https://refspecs.linuxbase.org/elf/gabi4+/ch5.dynamic.html#hash)
that it contains Elf32_Word entries for both 32/64 bit objects.

Currently both GNU linkers and LLD sets the `sh_entsize` field to `4`.

At the same time, `yaml2obj` ignores the `EntSize` field for SHT_HASH sections.
This patch fixes this and also adds a support for obj2yaml: it will not
dump this field when the `sh_entsize` contains the default value (`4`).

Differential revision: https://reviews.llvm.org/D88652
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
The file was modifiedllvm/test/tools/obj2yaml/ELF/hash-section.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/hash-section.yaml
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/section-headers-exclude.yaml
Commit 9573c9f2a363da71b2c07a3add4e52721e6028a0 by sguelton
Fix limit behavior of dynamic alloca

When the allocation size is 0, we shouldn't probe. Within [1,  PAGE_SIZE], we
should probe once etc.

This fixes https://bugs.llvm.org/show_bug.cgi?id=47657

Differential Revision: https://reviews.llvm.org/D88548
The file was modifiedllvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 17747d2ec8ec4471748197db54c8703f0c07c91c by sam.mccall
[clangd] Remove Tweak::Intent, use CodeAction kind directly. NFC

Intent was a nice idea but it ends up being a bit awkward/heavyweight
without adding much.

In particular, it makes it hard to implement `CodeActionParams.only` properly
(there's an inheritance hierarchy for kinds).

Differential Revision: https://reviews.llvm.org/D88427
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/RawStringLiteral.cpp
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/ObjCLocalizeStringLiteral.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/RemoveUsingNamespace.cpp
The file was modifiedclang-tools-extra/clangd/refactor/Tweak.h
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DefineOutline.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/PopulateSwitch.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/ExpandAutoType.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/ExpandMacro.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/AnnotateHighlightings.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/SwapIfBranches.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/ExtractVariable.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/DumpAST.cpp
Commit 067add7b5fd22c879bd2bbf5d55f4fb9b63047bf by kai.wang
[RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV.

Implement vmsge{u}.vx pseudo instruction.

According to RISC-V V specification, there are different scenarios for this
pseudo instruction. I list them below.

unmasked va >= x

  pseudoinstruction: vmsge{u}.vx vd, va, x
  expansion: vmslt{u}.vx vd, va, x; vmnand.mm vd, vd, vd

masked va >= x, vd != v0

  pseudoinstruction: vmsge{u}.vx vd, va, x, v0.t
  expansion: vmslt{u}.vx vd, va, x, v0.t; vmxor.mm vd, vd, v0

masked va >= x, vd == v0

  pseudoinstruction: vmsge{u}.vx vd, va, x, v0.t, vt
  expansion: vmslt{u}.vx vt, va, x;  vmandnot.mm vd, vd, vt

Use pseudo instruction to model vmsge{u}.vx. The pseudo instruction will convert
to different expansion according to the condition.

Differential Revision: https://reviews.llvm.org/D84732
The file was modifiedllvm/test/MC/RISCV/rvv/invalid.s
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
The file was modifiedllvm/test/MC/RISCV/rvv/compare.s
The file was modifiedllvm/lib/Target/RISCV/RISCVRegisterInfo.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoV.td
Commit f7c0e2b8f26fc6573f663f482aa64443ab6a6e71 by meera.nakrani
[ARM] Prevent constants from iCmp instruction from being hoisted if part of a min(max()) pattern

Marks constants of an ICmp instruction as free if it's only user is a select
instruction that is part of a min(max()) pattern. Ensures that in loops, in
particular when loop unrolling is turned on, SSAT will still be correctly generated.

Differential Revision: https://reviews.llvm.org/D88662
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was addedllvm/test/CodeGen/ARM/ssat-unroll-loops.ll
Commit 670e60c0238bb8e9fb39947017dc3b5459c8ee60 by llvm-dev
[InstCombine] Add partial bswap test from D88578
The file was modifiedllvm/test/Transforms/InstCombine/bswap.ll
Commit e3de249a4c94d6962b36c2b4747c134d152bed37 by ntv
[mlir] Add a subtensor operation

This revision introduces a `subtensor` op, which is the counterpart of `subview` for a tensor operand. This also refactors the relevant pieces to allow reusing the `subview` implementation where appropriate.

This operation will be used to implement tiling for Linalg on tensors.
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Loops.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/test/lib/Transforms/TestLinalgTransforms.cpp
Commit 787bf5e383a32b3ebc87332ff9e868db8f937056 by ntv
[mlir] Add canonicalization for the `subtensor` op

Differential revision: https://reviews.llvm.org/D88656
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/test/Transforms/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
Commit ec07ae2a833ef5b2282811f51fdfbd043c611936 by llvm-dev
[InstCombine] Add some basic vector bswap tests

We get the vNi16 cases already via matching as a rotate followed by the fshl -> bswap combines
The file was modifiedllvm/test/Transforms/InstCombine/bswap.ll
Commit 54c03d8f7da72fdf1a9e122391c51c2f0ea7b298 by kadircet
[clangd][lit] Update document-link.test to respect custom resource-dir locations

Differential Revision: https://reviews.llvm.org/D88721
The file was modifiedclang-tools-extra/clangd/test/document-link.test
Commit cf9503c1b752062d9abfb2c7922a50574d9c5de4 by ntv
[mlir] Add subtensor_insert operation

Differential revision: https://reviews.llvm.org/D88657
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
Commit d4568ed74328a28f79bee0738edf3d065232ced5 by georgemitenk0v
[MLIR][LLVM] Fixed `topologicalSort()` to iterative version

Instead of recursive helper method `topologicalSortImpl()`,
sort's implementation is moved to `topologicalSort()` function's
body directly. `llvm::ReversePostOrderTraversal` is used to create
a traversal of blocks in reverse post order.

Reviewed By: kiranchandramohan, rriddle

Differential Revision: https://reviews.llvm.org/D88544
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Commit 8ae1369f794c1e6da6aaf1b540e3c98d1e8a16c4 by serguei.katkov
[GVN LoadPRE] Add test to show an opportunty.

We can use context to prove that load can be safely executed
at a point where load is being hoisted.
The file was addedllvm/test/Transforms/GVN/loadpre-context.ll