SuccessChanges

Summary

  1. Reapply [LLD] [COFF] Implement a GNU/ELF like -wrap option (details)
  2. [mlir] Fix typo in LangRef (details)
  3. [mlir] Add std.tensor_to_memref op and teach the infra about it (details)
  4. [SemaObjC] Fix composite pointer type calculation for `void*` and pointer to lifetime qualified ObjC pointer type (details)
  5. Reland "[WebAssembly] v128.load{8,16,32,64}_lane instructions" (details)
  6. [AMDGPU] gfx1032 target (details)
  7. [MTE] Pin the tagged base pointer to one of the stack slots. (details)
  8. [AArch64] Stack frame reordering. (details)
  9. [gn bulid] Remove phantom WebAssembly tablegen() calls (details)
  10. [NFC][SCEV] Autogenerate check lines in tests being affected by upcoming patch (details)
  11. [NFC][LSR] Autogenerate check lines in tests being affected by upcoming patch (details)
  12. [NFC][IndVars] Autogenerate check lines in tests being affected by upcoming patch (details)
  13. [AMDGPU] SILowerControlFlow::removeMBBifRedundant should not try to change MBB layout if it can fallthrough (details)
  14. [libc] Use entrypoints.txt as the single source of list of functions for a platform. (details)
  15. PR47864: Fix assertion in pointer-to-member emission if there are (details)
  16. [libTooling] Change `after` range-selector to operate only on source ranges (details)
  17. [LoopVersion] Unify SCEVChecks and alias check handling (NFC). (details)
Commit 3785a413feef896e8a022731cc6ed405d5ebe81b by martin
Reapply [LLD] [COFF] Implement a GNU/ELF like -wrap option

Add a simple forwarding option in the MinGW frontend, and implement
the private -wrap option in the COFF linker.

The feature in lld-link isn't gated by the -lldmingw option, but
the option is left as a private, undocumented option primarily
used by the MinGW driver.

The implementation is significantly based on the support for --wrap
in the ELF linker, but many small nuance details are different
between the ELF and COFF linkers, ending up with more than a few
implementation differences.

This fixes https://bugs.llvm.org/show_bug.cgi?id=47384.

Differential Revision: https://reviews.llvm.org/D89004

Reapplied with the bitfield member canInline fixed so it doesn't break
builds targeting windows.
The file was modifiedlld/COFF/Driver.cpp
The file was addedlld/test/COFF/wrap-i386.s
The file was modifiedlld/COFF/Options.td
The file was addedlld/test/COFF/wrap-lto-2.ll
The file was modifiedlld/COFF/Symbols.h
The file was addedlld/test/COFF/wrap-real-missing.s
The file was modifiedlld/COFF/SymbolTable.cpp
The file was addedlld/test/COFF/wrap-with-archive.s
The file was modifiedlld/MinGW/Options.td
The file was modifiedlld/COFF/MinGW.cpp
The file was modifiedlld/MinGW/Driver.cpp
The file was addedlld/test/COFF/wrap-import.ll
The file was modifiedlld/COFF/InputFiles.h
The file was modifiedlld/COFF/MinGW.h
The file was modifiedlld/test/MinGW/driver.test
The file was modifiedlld/COFF/LTO.cpp
The file was addedlld/test/COFF/wrap.s
The file was addedlld/test/COFF/wrap-lto-1.ll
Commit 9c728a7cbf5df69627966b823d30daa6cfe2426d by silvasean
[mlir] Fix typo in LangRef
The file was modifiedmlir/docs/LangRef.md
Commit ee491ac91e123b90eeec3cce7e494936ea8cb85d by silvasean
[mlir] Add std.tensor_to_memref op and teach the infra about it

The opposite of tensor_to_memref is tensor_load.

- Add some basic tensor_load/tensor_to_memref folding.
- Add source/target materializations to BufferizeTypeConverter.
- Add an example std bufferization pattern/pass that shows how the
  materialiations work together (more std bufferization patterns to come
  in subsequent commits).
  - In coming commits, I'll document how to write composable
  bufferization passes/patterns and update the other in-tree
  bufferization passes to match this convention. The populate* functions
  will of course continue to be exposed for power users.

The naming on tensor_load/tensor_to_memref and their pretty forms are
not very intuitive. I'm open to any suggestions here. One key
observation is that the memref type must always be the one specified in
the pretty form, since the tensor type can be inferred from the memref
type but not vice-versa.

With this, I've been able to replace all my custom bufferization type
converters in npcomp with BufferizeTypeConverter!

Part of the plan discussed in:
https://llvm.discourse.group/t/what-is-the-strategy-for-tensor-memref-conversion-bufferization/1938/17

Differential Revision: https://reviews.llvm.org/D89437
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/Passes.h
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/Passes.td
The file was modifiedmlir/include/mlir/Transforms/Bufferize.h
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was addedmlir/test/Dialect/Standard/canonicalize.mlir
The file was modifiedmlir/test/Dialect/Standard/ops.mlir
The file was addedmlir/lib/Dialect/StandardOps/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was addedmlir/test/Dialect/Standard/bufferize.mlir
The file was modifiedmlir/lib/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/CMakeLists.txt
Commit 351317167e2b28aad03f8e45e0ed0acbbff18c61 by erik.pilkington
[SemaObjC] Fix composite pointer type calculation for `void*` and pointer to lifetime qualified ObjC pointer type

Fixes a regression introduced in 9a6f4d451ca7. rdar://70101809

Differential revision: https://reviews.llvm.org/D89475
The file was modifiedclang/test/SemaObjCXX/arc-ptr-comparison.mm
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
Commit 3f738d1f5e2d657993a51ca3fe56585268025d89 by tlively
Reland "[WebAssembly] v128.load{8,16,32,64}_lane instructions"

This reverts commit 7c8385a352ba21cb388046290d93b53dc273cd9f with a typing fix
to an instruction selection pattern.
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedllvm/test/MC/WebAssembly/simd-encodings.s
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was addedllvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
Commit d1beb95d1241ec50bdf19db351d273374a146a4a by Stanislav.Mekhanoshin
[AMDGPU] gfx1032 target

Differential Revision: https://reviews.llvm.org/D89487
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedllvm/test/MC/AMDGPU/gfx1030_err.s
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedllvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
The file was modifiedclang/lib/Basic/Targets/NVPTX.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedclang/include/clang/Basic/Cuda.h
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-features.cl
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedllvm/test/MC/AMDGPU/gfx1030_new.s
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedllvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
Commit 2f63e57fa59e7fbfe5999ec1e6e60fa7a2ba70bb by eugenis
[MTE] Pin the tagged base pointer to one of the stack slots.

Summary:
Pin the tagged base pointer to one of the stack slots, and (if
necessary) rewrite tag offsets so that an object that occupies that
slot has both address and tag offsets of 0. This allows ADDG
instructions for that object to be eliminated and their uses replaced
with the tagged base pointer itself.

This optimization must be done in machine instructions and not in the IR
instrumentation pass, because referring to a stack slot through an IRG
pointer would confuse the stack coloring pass.

The optimization makes a (pretty naive) attempt to find the slot that
would benefit the most by counting the uses of stack slots in the
function.

Reviewers: ostannard, pcc

Subscribers: merge_guards_bot, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72365
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/test/CodeGen/AArch64/irg_sp_tagp.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
Commit 2e794a46b58c5878c5ab71c8517c5417f791860e by eugenis
[AArch64] Stack frame reordering.

Implement stack frame reordering in the AArch64 backend.

Unlike the X86 implementation, AArch64 does not seem to benefit from
"access density" based frame reordering, mainly because it has a much
smaller variety of addressing modes, and the fact that all instructions
are 4 bytes so each frame object is either in range of an instruction
(and then the access is "free") or not (and that has a code size cost
of 4 bytes).

This change improves Memory Tagging codegen by
* Placing an object that has been chosen as the base tagged pointer of
the function at SP + 0. This saves one instruction to setup the pointer
(IRG does not have an offset immediate), and more because that object
can now be referenced without materializing its tagged address in a
scratch register.
* Placing objects that go out of scope simultaneously together. This
exposes opportunities for instruction merging in tryMergeAdjacentSTG.

Differential Revision: https://reviews.llvm.org/D72366
The file was addedllvm/test/CodeGen/AArch64/settag-merge-order.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/settag-merge.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.h
Commit 6601dfb0b8c78cdd5de0e50fb3549f9b8f947eb3 by thakis
[gn bulid] Remove phantom WebAssembly tablegen() calls

Apparenlty I added these in https://reviews.llvm.org/rL350628 but
I'm not sure why. They never existed in the CMake build, and now
they're causing trouble.
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
Commit b3d2df42f7ac60ff7645cf944a93f0fde144a195 by lebedev.ri
[NFC][SCEV] Autogenerate check lines in tests being affected by upcoming patch
The file was modifiedllvm/test/Analysis/ScalarEvolution/scalable-vector.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/load.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
The file was modifiedllvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll
Commit dfdfcdc8d3c99cfe9fdef7c604ecc3b165e79572 by lebedev.ri
[NFC][LSR] Autogenerate check lines in tests being affected by upcoming patch
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll
Commit 2008dacf6ed3fbb862769c6936fd615c4ae05434 by lebedev.ri
[NFC][IndVars] Autogenerate check lines in tests being affected by upcoming patch
The file was modifiedllvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll
Commit 42ed3881200801651a2af47505dc7c59c0a5c959 by Alexander Timofeev
[AMDGPU] SILowerControlFlow::removeMBBifRedundant should not try to change MBB layout if it can fallthrough

removeMBBifRedundant normally tries to keep predecessors fallthrough when removing redundant MBB.
         It has to change MBBs layout to keep the new successor to immediately follow the predecessor of removed MBB.
         It only may be allowed in case the new successor itself has no successors to which it fall through.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D89397
The file was modifiedllvm/test/CodeGen/AMDGPU/collapse-endcf.mir
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Commit f6bf2823c44eb81be6c74d909c17d77e811b3bbc by michaelrj
[libc] Use entrypoints.txt as the single source of list of functions for a platform.

The function listings in api.td are removed. The same lists are now deduced using the information
in entrypoints.txt.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D89267
The file was modifiedlibc/utils/HdrGen/Generator.cpp
The file was modifiedlibc/config/linux/api.td
The file was modifiedlibc/utils/HdrGen/PublicAPICommand.h
The file was modifiedlibc/utils/HdrGen/PublicAPICommand.cpp
The file was modifiedlibc/CMakeLists.txt
The file was modifiedlibc/utils/HdrGen/Main.cpp
The file was modifiedlibc/utils/HdrGen/Generator.h
The file was modifiedlibc/cmake/modules/LLVMLibCHeaderRules.cmake
Commit 68f116aa23434b577743307c487b2edf037fca4c by richard
PR47864: Fix assertion in pointer-to-member emission if there are
multiple declarations of the same base class.
The file was modifiedclang/include/clang/AST/RecordLayout.h
The file was modifiedclang/test/CodeGenCXX/pointers-to-data-members.cpp
Commit 65cb4fdd69f43b6c39a8e4ca27b509284b11d807 by yitzhakm
[libTooling] Change `after` range-selector to operate only on source ranges

Currently, `after` fails when applied to locations in macro arguments.  This
change projects the subrange into a file source range and then applies `after`.

Differential Revision: https://reviews.llvm.org/D89468
The file was modifiedclang/lib/Tooling/Transformer/RangeSelector.cpp
The file was modifiedclang/unittests/Tooling/RangeSelectorTest.cpp
Commit 89c0124273339076b25bf860f6c2ee765ab96db3 by flo
[LoopVersion] Unify SCEVChecks and alias check handling (NFC).

This is an initial cleanup of the way LoopVersioning interacts with LAA.

Currently LoopVersioning has 2 ways of initializing things:

1. Passing LAI and passing UseLAIChecks = true
2. Passing UseLAIChecks = false, followed by calling setSCEVChecks and
   setAliasChecks.

Both ways of initializing lead to the same result and the duplication
seems more complicated than necessary.

This patch removes the UseLAIChecks flag from the constructor and the
setSCEVChecks & setAliasChecks helpers and move initialization
exclusively to the constructor.

This simplifies things, by providing a single way to initialize
LoopVersioning and reducing duplication.

Reviewed By: Meinersbur, lebedev.ri

Differential Revision: https://reviews.llvm.org/D84406
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopVersioning.h
The file was modifiedllvm/lib/Transforms/Scalar/LoopDistribute.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopVersioning.cpp