SuccessChanges

Summary

  1. [ARM] Commutative vmin/maxnma tests. NFC (details)
  2. Revert "[lldb] Display autosuggestion part in gray if there is one possible suggestion" (details)
  3. [LoopUnroll] Adjust CostKind query (details)
  4. [SystemZ/ZOS] Implement computeHostNumPhysicalCores (details)
  5. [VectorCombine] add test for Hexagon that would crash; NFC (details)
  6. [InstCombine] eliminate a pointer cast around insertelement (details)
  7. [ARM] Add additional predicated VFMA tests. NFC (details)
  8. [VectorCombine] add test for x86 target with SSE disabled; NFC (details)
  9. [VectorCombine] early exit if target has no vector registers (details)
  10. Limit Max Vector alignment on COFF targets to 8192. (details)
  11. [OPENMP]Fix PR37671: Privatize local(private) variables in untied tasks. (details)
  12. [MachOYAML] Simplify the section data emitting function. NFC. (details)
  13. [DWARFYAML] Make the address size of compilation units optional. (details)
  14. Revert "[OPENMP]Fix PR37671: Privatize local(private) variables in untied tasks." (details)
  15. AMDGPU: Handle intrinsics in performMemSDNodeCombine (details)
  16. AMDGPU/GlobalISel: Select llvm.amdgcn.global.atomic.fadd (details)
  17. [OPENMP]Do not add TGT_OMP_TARGET_PARAM flag to non-captured mapped arguments. (details)
  18. [analyzer] StdLibraryFunctionsChecker: Add support for new functions (details)
  19. [ARM][MVE] Enable tail predication for loops containing MVE gather/scatters (details)
Commit fccf4c6115a8e4f73a945f99d6a444c52fd7f60a by david.green
[ARM] Commutative vmin/maxnma tests. NFC
The file was addedllvm/test/CodeGen/Thumb2/mve-vmaxnma-commute.ll
Commit cff880b0c9a07ff8275e91982c0d6e2293b537e7 by Raphael Isemann
Revert "[lldb] Display autosuggestion part in gray if there is one possible suggestion"

This reverts commit 246afe0cd17fce935a01171f3cca548e02523e5c. This broke
the following tests on Linux it seems:
  lldb-api :: commands/expression/multiline-completion/TestMultilineCompletion.py
  lldb-api :: iohandler/completion/TestIOHandlerCompletion.py
The file was modifiedlldb/source/Core/Debugger.cpp
The file was modifiedlldb/include/lldb/Host/Editline.h
The file was modifiedlldb/source/Core/CoreProperties.td
The file was modifiedlldb/include/lldb/Core/Debugger.h
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
The file was removedlldb/test/API/iohandler/autosuggestion/TestAutosuggestion.py
The file was modifiedlldb/include/lldb/Interpreter/CommandInterpreter.h
The file was modifiedlldb/source/Host/common/Editline.cpp
The file was modifiedlldb/include/lldb/Core/IOHandler.h
The file was modifiedlldb/source/Core/IOHandler.cpp
Commit ea8448e3618a1581b5eca39d39bedaa55fede75d by sam.parker
[LoopUnroll] Adjust CostKind query

When TTI was updated to use an explicit cost, TCK_CodeSize was used
although the default implicit cost would have been the hand-wavey
cost of size and latency. So, revert back to this behaviour. This is
not expected to have (much) impact on targets since most (all?) of
them return the same value for SizeAndLatency and CodeSize.

When optimising for size, the logic has been changed to query
CodeSize costs instead of SizeAndLatency.

This patch also adds a testing option in the unroller so that
OptSize thresholds can be specified.

Differential Revision: https://reviews.llvm.org/D85723
The file was addedllvm/test/Transforms/LoopUnroll/ARM/instr-size-costs.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
The file was addedllvm/test/Transforms/LoopUnroll/ARM/unroll-optsize.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
Commit bca1b8ed994336690db4775e67953aad533b0e31 by kai
[SystemZ/ZOS] Implement computeHostNumPhysicalCores

On z/OS, the information is stored in the Common System Data Area
(CSD). It is the number of CPs allocated to the current LPAR.

Reviewers: aganea, hubert.reinterpertcast, MaskRay

Reviewed By: hubert.reinterpertcast

Differential Revision: https://reviews.llvm.org/D85531
The file was modifiedllvm/unittests/Support/Host.cpp
The file was modifiedllvm/lib/Support/Host.cpp
Commit b97e402ca5ba3d1a4795ed61f8cb36783b00ed44 by spatel
[VectorCombine] add test for Hexagon that would crash; NFC

This test verifies the code change from:
rGb0b95dab1ce2
(although that would not be true if PR47128 is fixed)
The file was addedllvm/test/Transforms/VectorCombine/Hexagon/lit.local.cfg
The file was addedllvm/test/Transforms/VectorCombine/Hexagon/load.ll
Commit 912c09e845cb1907bc44664495fc69925a1bd2a9 by spatel
[InstCombine] eliminate a pointer cast around insertelement

I'm not sure if this solves PR46839 completely, but reducing the casting should help:
https://bugs.llvm.org/show_bug.cgi?id=46839

Differential Revision: https://reviews.llvm.org/D85647
The file was modifiedllvm/test/Transforms/InstCombine/cast_ptr.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Commit e859868eb3808eae7ca0f27682931c38aa875090 by david.green
[ARM] Add additional predicated VFMA tests. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-fmas.ll
Commit 89a7f64afc7968ef3337472d02f7e08681f1766e by spatel
[VectorCombine] add test for x86 target with SSE disabled; NFC
The file was addedllvm/test/Transforms/VectorCombine/X86/no-sse.ll
Commit cc892fd9f4cb7ad8c6b37bc260fd12c2edf3745d by spatel
[VectorCombine] early exit if target has no vector registers

Based on post-commit discussion in:
D81766

Other vectorization passes (SLP and Loop) use this TTI API similarly.
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
The file was modifiedllvm/test/Transforms/VectorCombine/X86/no-sse.ll
Commit aa4bc1cb7978b87bdbdb75910da0abbd27889800 by erich.keane
Limit Max Vector alignment on COFF targets to 8192.

COFF targets have a max object alignment of 8192, so trying to create
one with a larger size results in an unreachable in WinCOFFObjectWriter.

For the reproducer I have uses thread local storage, however other
alignments are likely affected as well.

This patch sets the MaxVectorAlign for COFF to 8192.  Additionally,
though there is no longer a way to reproduce that I could find, it
correctly sets the MaxTLSAlign for COFF to that value as well, so that
if anyone comes up with a situation where this is true, it will cause an
error.

Differential Revision: https://reviews.llvm.org/D85543
The file was modifiedclang/include/clang/Basic/TargetInfo.h
The file was modifiedclang/lib/Basic/Targets/X86.h
The file was modifiedclang/test/CodeGen/alignment.c
Commit ec9563c54ed25e9f9cbe60985399212d50bd801d by a.bataev
[OPENMP]Fix PR37671: Privatize local(private) variables in untied tasks.

Summary:
In untied tasks, need to allocate the space for local variales, declared
in task region, when the memory for task data is allocated. THe function
can be interrupted and we can exit from the function in untied task
switch. Need to keep the state of the local variables in this case.
Also, the compiler should not call cleanup when exiting in untied task
switch until the real exit out of the declaration scope is met during
execution.

Reviewers: jdoerfert

Subscribers: yaxunl, guansong, cfe-commits, sstefan1, caomhin

Tags: #clang

Differential Revision: https://reviews.llvm.org/D84457
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.h
The file was modifiedclang/test/OpenMP/task_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit 386d5af04b65aca7c81eed1468e53462a6b54550 by Xing
[MachOYAML] Simplify the section data emitting function. NFC.

This patch helps simplify some codes in writeSectionData() function.

Reviewed By: jhenderson, grimar

Differential Revision: https://reviews.llvm.org/D85821
The file was modifiedllvm/lib/ObjectYAML/MachOEmitter.cpp
Commit e891b6a75d919b5bcb95577d1e5eb0ebad0ea427 by Xing
[DWARFYAML] Make the address size of compilation units optional.

This patch makes the 'AddrSize' field optional. If the address size is
missing, yaml2obj will infer it from the object file.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D85805
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-info.yaml
Commit 3651658bdd11a085b727783f27495a198c4f3bc5 by a.bataev
Revert "[OPENMP]Fix PR37671: Privatize local(private) variables in untied tasks."

This reverts commit ec9563c54ed25e9f9cbe60985399212d50bd801d to
investigate compiler crash revelaed by the buildbots.
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.h
The file was modifiedclang/test/OpenMP/task_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
Commit 701228c4117636e6dd46564afcb8e5fbd98c13fb by Matthew.Arsenault
AMDGPU: Handle intrinsics in performMemSDNodeCombine

This avoids a possible regression in a future patch
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll
The file was addedllvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll
Commit e14474a39a14b3c86c6c5d5ed9bf11467a0bbe9b by Matthew.Arsenault
AMDGPU/GlobalISel: Select llvm.amdgcn.global.atomic.fadd

Remove the intermediate transform in the DAG path. I believe this is
the last non-deprecated intrinsic that needs handling.
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/FLATInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td
Commit ddbd21d288f6ff7d175f18ddee0ee6407626445a by a.bataev
[OPENMP]Do not add TGT_OMP_TARGET_PARAM flag to non-captured mapped arguments.

If the arguments are mapped, but are actually not used in the target
region, the compiler still adds attribute TGT_OMP_TARGET_PARAM for such
arguments. It makes the libomptarget to add such parameters to the list
of arguments, passed to the kernel at the runtime, and may lead to
incorrect results/crashes during execution.

Differential Revision: https://reviews.llvm.org/D85755
The file was modifiedclang/test/OpenMP/target_map_codegen_31.cpp
The file was modifiedclang/test/OpenMP/target_map_codegen_32.cpp
The file was modifiedclang/test/OpenMP/target_map_codegen_20.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/test/OpenMP/target_map_codegen_18.inc
The file was modifiedclang/test/OpenMP/target_teams_map_codegen.cpp
Commit 25bbe234e4e73e6345f4f0b61e680abf5a90d59f by zukatsinadze
[analyzer] StdLibraryFunctionsChecker: Add support for new functions

`toupper`, `tolower`, `toascii` functions were added to
StdLibraryFunctionsChecker to fully cover CERT STR37-C rule:
https://wiki.sei.cmu.edu/confluence/x/BNcxBQ

Differential Revision: https://reviews.llvm.org/D85093
The file was modifiedclang/test/Analysis/std-c-library-functions-arg-constraints.c
The file was modifiedclang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
Commit 4fe5615eabbb2a47e7ac32917e621852e057efe8 by anna.welker
[ARM][MVE] Enable tail predication for loops containing MVE gather/scatters

Widen the scope of memory operations that are allowed to be tail predicated
to include gathers and scatters, such that loops that are auto-vectorized
with the option -enable-arm-maskedgatscat (and actually end up containing
an MVE gather or scatter) can be tail predicated.

Differential Revision: https://reviews.llvm.org/D85138
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.h
The file was addedllvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp