SuccessChanges

Summary

  1. [libc++][test] <=> now has a feature-test macro (details)
  2. [libc++][test] std::variant test cleanup (details)
  3. [X86] getTargetShuffleInputs - add KnownUndef/Zero output support (details)
  4. [X86] SimplifyMultipleUseDemandedBitsForTargetNode - use (details)
  5. [NFC][InstCombine] More test for "sign bit test via shifts" pattern (details)
Commit 1f92d8b5449f6fd17360421e2e4da3fb7bff5c5a by Casey
[libc++][test] <=> now has a feature-test macro
...which `test/support/test_macros.h` can use to detect compiler
support.
llvm-svn: 374722
The file was modifiedlibcxx/test/support/test_macros.h
Commit 80e088e14171272bb8621f056343b410495c0507 by Casey
[libc++][test] std::variant test cleanup
* Add the conventional `return 0` to `main` in
`variant.assign/conv.pass.cpp` and `variant.ctor/conv.pass.cpp`
* Fix some MSVC signed-to-unsigned conversion warnings by replacing
`int` literarls with `unsigned int` literals
llvm-svn: 374723
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_args.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.assign/conv.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.assign/move.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.ctor/conv.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_args.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.variant/variant.assign/copy.pass.cpp
Commit e4c58db8bc192696ce1fe3f23057e5a57801bf8f by llvm-dev
[X86] getTargetShuffleInputs - add KnownUndef/Zero output support
Adjust SimplifyDemandedVectorEltsForTargetNode to use the known elts
masks instead of recomputing it locally.
llvm-svn: 374724
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 3efafd6c38a4da25b9bbd9a7b09648249a502ebe by llvm-dev
[X86] SimplifyMultipleUseDemandedBitsForTargetNode - use
getTargetShuffleInputs with KnownUndef/Zero results.
llvm-svn: 374725
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 8e2561974d98a338bad0a75f981a9b02b672cb5e by lebedev.ri
[NFC][InstCombine] More test for "sign bit test via shifts" pattern
(PR43595)
While that pattern is indirectly handled via
reassociateShiftAmtsOfTwoSameDirectionShifts(), that incursme one-use
restriction on truncation, which is pointless since we know that we'll
produce a single instruction.
Additionally, *if* we are only looking for sign bit, we don't need
shifts to be identical, which isn't the case in general, and is the
blocker for me in bug in question:
https://bugs.llvm.org/show_bug.cgi?id=43595
llvm-svn: 374726
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-ashr.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-lshr.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-shl.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll
The file was modifiedllvm/test/Transforms/InstCombine/sign-bit-test-via-right-shifting-all-other-bits.ll