SuccessChanges

Summary

  1. [lit] Add argument check: --timeout must be non-negative integer (details)
  2. [X86] Add encoding tests for avx512pf vgatherpf/vscatterpf instructions. (details)
  3. [X86] Teach X86MCodeEmitter to properly encode zmm16-zmm31 as index (details)
  4. [MemorySSA] Update for partial unswitch. (details)
  5. Revert [InstCombine] fold a shifted bool zext to a select (details)
Commit 98aa3c1de985ad42e999bae0264979d293274a91 by jlettner
[lit] Add argument check: --timeout must be non-negative integer
llvm-svn: 374847
The file was modifiedllvm/utils/lit/lit/cl_arguments.py
Commit 5e80715508d1b819f99f574c869805e5e3aecb11 by craig.topper
[X86] Add encoding tests for avx512pf vgatherpf/vscatterpf instructions.
llvm-svn: 374848
The file was addedllvm/test/MC/X86/x86-64-avx512pf.s
Commit 9586d85ab3badcf8ca2292ca6019caea4e6513c4 by craig.topper
[X86] Teach X86MCodeEmitter to properly encode zmm16-zmm31 as index
register to vgatherpf/vscatterpf.
We need to encode bit 4 into the EVEX.V' bit. We do this right for
regular gather/scatter which use either MRMSrcMem or MRMDestMem formats.
The prefetches use MRM*m formats.
Fixes an issue recently added to PR36202.
llvm-svn: 374849
The file was modifiedllvm/test/MC/X86/x86-64-avx512pf.s
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
Commit b7a3353061e965f901ba5cfac366263d6d528f35 by asbirlea
[MemorySSA] Update for partial unswitch.
Update MSSA for blocks cloned when doing partial unswitching. Enable
additional testing with MSSA. Resolves PR43641.
llvm-svn: 374850
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/exponential-switch-unswitch.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch-nested.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/delete-dead-blocks.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch2.ll
The file was addedllvm/test/Analysis/MemorySSA/pr43641.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch-nested2.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-cost.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-redundant-switch.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/exponential-nontrivial-unswitch.ll
Commit 4335d8f0e8349025530da72a6881ed53c61947a2 by spatel
Revert [InstCombine] fold a shifted bool zext to a select
This reverts r374828 (git commit
1f40f15d54aac06421448b6de131231d2d78bc75) due to bot breakage
llvm-svn: 374851
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/and.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift.ll