SuccessChanges

Summary

  1. tsan: fix Go ppc64le build (details)
  2. [LLD] [COFF] Wrap file location pair<StringRef,int> in Optional<>. NFC. (details)
  3. [MIPS GlobalISel] Refactor MipsRegisterBankInfo [NFC] (details)
  4. Change Comments SmallVector to std::vector in DebugLocStream [NFC] (details)
  5. [MIPS GlobalISel] Add MSA registers to fprb. Select vector load, store (details)
  6. [LLD] [COFF] Fix -Wmissing-field-initializers warnings. NFC. (details)
  7. [LLD] [COFF] Update a leftover comment after SVN r374869. NFC. (details)
  8. [llvm-locstats] Fix 'only params' no entry value stats (details)
  9. Fix uninitialized variable warnings. NFCI. (details)
  10. [DebugInfo] Remove some users of DBG_VALUEs IsIndirect field (details)
  11. [X86] Resolve KnownUndef/KnownZero bits into target shuffle masks in (details)
  12. [DebugInfo] Add interface for pre-calculating the size of emitted DWARF (details)
  13. [Alignment][NFC] Remove dependency on (details)
  14. [DebugInfo] Add a DW_OP_LLVM_entry_value operation (details)
  15. [Concepts] Concept Specialization Expressions (details)
  16. gn build: Merge r374882 (details)
Commit cc2f68ea2dc8132270218ca14ab0e21fb71d3ec8 by dvyukov
tsan: fix Go ppc64le build
This #define is in the non-Go ppc64le build but not in the Go build.
Reviewed-in: https://reviews.llvm.org/D68046 Author: randall77 (Keith
Randall) llvm-svn: 374868
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform.h
Commit 9318c94ebbf28beb843852246beb34082c659bae by martin
[LLD] [COFF] Wrap file location pair<StringRef,int> in Optional<>. NFC.
This makes use of it slightly clearer, and makes it match the same
construct in the lld ELF linker.
Differential Revision: https://reviews.llvm.org/D68935
llvm-svn: 374869
The file was modifiedlld/COFF/PDB.cpp
The file was modifiedlld/COFF/SymbolTable.cpp
The file was modifiedlld/COFF/PDB.h
Commit f7c213c9c43cba30fb22edde29ccbd19131660e4 by petar.avramovic
[MIPS GlobalISel] Refactor MipsRegisterBankInfo [NFC]
Check if size of operand LLT matches sizes of available register banks
before inspecting the opcode in order to reduce number of checks. Factor
commonly used pieces of code into functions.
Differential Revision: https://reviews.llvm.org/D68866
llvm-svn: 374870
The file was modifiedllvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/Mips/MipsRegisterBankInfo.h
Commit d46ac44ecdc82ac42510e1ce2b9cd90ee2fa7faa by david.stenberg
Change Comments SmallVector to std::vector in DebugLocStream [NFC]
This changes the 32-element SmallVector to a std::vector. When building
a RelWithDebInfo clang-8 binary, the average size of the vector was
~10000, so it does not seem very beneficial or practical to use a small
vector for that.
The DWARFBytes SmallVector grows in the same way as Comments, so perhaps
that also should be changed to a purely dynamically allocated structure,
but that requires some more code changes, so I let that remain as a
SmallVector for now.
llvm-svn: 374871
The file was modifiedllvm/lib/CodeGen/AsmPrinter/ByteStreamer.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DebugLocStream.h
Commit 599591f3d47cad6d70f2346c9056f4d4bbddff31 by petar.avramovic
[MIPS GlobalISel] Add MSA registers to fprb. Select vector load, store
Add vector MSA register classes to fprb, they are 128 bit wide. MSA
instructions use the same registers for both integer and floating point
operations. Therefore we only need to check for vector element size
during legalization or instruction selection.
Add helper function in MipsLegalizerInfo and switch to legalIf
LegalizeRuleSet to keep legalization rules compact since they depend on
MipsSubtarget and presence of MSA. fprb is assigned to all vector
operands. Move selectLoadStoreOpCode to MipsInstructionSelector in order
to reduce number of arguments.
Differential Revision: https://reviews.llvm.org/D68867
llvm-svn: 374872
The file was modifiedllvm/lib/Target/Mips/MipsInstructionSelector.cpp
The file was addedllvm/test/CodeGen/Mips/GlobalISel/instruction-select/load_store_vec.mir
The file was addedllvm/test/CodeGen/Mips/GlobalISel/legalizer/load_store_vec.mir
The file was addedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_store_vec.ll
The file was addedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/load_store_vec.mir
The file was modifiedllvm/lib/Target/Mips/MipsRegisterBanks.td
The file was modifiedllvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp
Commit cd8759c3c29735c0460ff522be72c39c09d81223 by martin
[LLD] [COFF] Fix -Wmissing-field-initializers warnings. NFC.
llvm-svn: 374873
The file was modifiedlld/COFF/SymbolTable.cpp
Commit e0916f4fbe9e9cde88150488eaddceeef277beb2 by martin
[LLD] [COFF] Update a leftover comment after SVN r374869. NFC.
llvm-svn: 374874
The file was modifiedlld/COFF/PDB.cpp
Commit 095531ea941992a0e03bd388cff8a9fae53d3498 by djordje.todorovic
[llvm-locstats] Fix 'only params' no entry value stats
Adding the missing line.
llvm-svn: 374875
The file was modifiedllvm/utils/llvm-locstats/llvm-locstats.py
Commit 4706f3be88d9cb530afb32b8d9d2bd5bfde2c881 by llvm-dev
Fix uninitialized variable warnings. NFCI.
llvm-svn: 374876
The file was modifiedclang/lib/AST/ASTImporter.cpp
Commit ed29dbaafa49bb8c9039a35f768244c394411fea by jeremy.morse.llvm
[DebugInfo] Remove some users of DBG_VALUEs IsIndirect field
This patch kills off a significant user of the "IsIndirect" field of
DBG_VALUE machine insts. Brought up in in PR41675, IsIndirect is
techncally redundant as it can be expressed by the DIExpression of a
DBG_VALUE inst, and it isn't helpful to have two ways of expressing
things.
Rather than setting IsIndirect, have DBG_VALUE creators add an extra
deref to the insts DIExpression. There should now be no appearences of
IsIndirect=True from isel down to LiveDebugVariables / VirtRegRewriter,
which is ensured by an assertion in LDVImpl::handleDebugValue. This
means we also get to delete the IsIndirect handling in
LiveDebugVariables. Tests can be upgraded by for example swapping the
following IsIndirect=True DBG_VALUE:
  DBG_VALUE $somereg, 0, !123, !DIExpression(DW_OP_foo)
With one where the indirection is in the DIExpression, by _appending_ a
deref:
  DBG_VALUE $somereg, $noreg, !123, !DIExpression(DW_OP_foo,
DW_OP_deref)
Which both mean the same thing.
Most of the test changes in this patch are updates of that form; also
some changes in how the textual assembly printer handles these insts.
Differential Revision: https://reviews.llvm.org/D68945
llvm-svn: 374877
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/test/DebugInfo/COFF/pieces.ll
The file was modifiedllvm/test/DebugInfo/X86/safestack-byval.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
The file was modifiedllvm/test/DebugInfo/ARM/PR16736.ll
The file was modifiedllvm/test/DebugInfo/X86/vla.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
The file was modifiedllvm/test/DebugInfo/X86/dbg-addr.ll
The file was modifiedllvm/test/DebugInfo/X86/parameters.ll
The file was modifiedllvm/test/DebugInfo/X86/op_deref.ll
The file was modifiedllvm/test/CodeGen/PowerPC/debuginfo-stackarg.ll
The file was modifiedllvm/test/DebugInfo/ARM/float-stack-arg.ll
The file was modifiedllvm/test/DebugInfo/X86/spill-nontrivial-param.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FastISel.cpp
The file was modifiedllvm/test/DebugInfo/X86/dbg-addr-dse.ll
The file was modifiedllvm/lib/CodeGen/LiveDebugVariables.cpp
The file was modifiedllvm/test/DebugInfo/X86/spill-indirect-nrvo.ll
The file was modifiedllvm/test/DebugInfo/X86/live-debug-vars-dse.mir
The file was modifiedllvm/test/CodeGen/ARM/debug-info-arg.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
Commit 70778444c7838a13ea0a8c315ad6c1830cb6b41c by llvm-dev
[X86] Resolve KnownUndef/KnownZero bits into target shuffle masks in
helper. NFCI.
llvm-svn: 374878
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 284827f32bd8d06ca1ab8a949bf96088612b1504 by david.stenberg
[DebugInfo] Add interface for pre-calculating the size of emitted DWARF
Summary: DWARF's DW_OP_entry_value operation has two operands; the first
is a ULEB128 operand that specifies the size of the second operand,
which is a DWARF block. This means that we need to be able to
pre-calculate and emit the size of DWARF expressions before emitting
them. There is currently no interface for doing this in DwarfExpression,
so this patch introduces that.
When implementing this I initially thought about running through
DwarfExpression's emission two times; first with a temporary buffer to
emit the expression, in order to being able to calculate the size of
that emitted data. However, DwarfExpression is a quite complex state
machine, so I decided against that, as it seemed like the two runs could
get out of sync, resulting in incorrect size operands. Therefore I have
implemented this in a way that we only have to run DwarfExpression once.
The idea is to emit DWARF to a temporary buffer, for which it is
possible to query the size. The data in the temporary buffer can then be
emitted to DwarfExpression's main output.
In the case of DIEDwarfExpression, a temporary DIE is used. The values
are all allocated using the same BumpPtrAllocator as for all other DIEs,
and the values are then transferred to the real value list. In the case
of DebugLocDwarfExpression, the temporary buffer is implemented using a
BufferByteStreamer which emits to a buffer in the DwarfExpression
object.
Reviewers: aprantl, vsk, NikolaPrica, djtodoro
Reviewed By: aprantl
Subscribers: hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D67768
llvm-svn: 374879
The file was modifiedllvm/lib/CodeGen/AsmPrinter/ByteStreamer.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
The file was modifiedllvm/include/llvm/CodeGen/DIE.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
Commit 0e62011df891d0e7ad904524edf705d07d12d5d4 by gchatelet
[Alignment][NFC] Remove dependency on
GlobalObject::setAlignment(unsigned)
Summary: This is patch is part of a series to introduce an Alignment
type. See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this
patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: arsenm, mehdi_amini, jvesely, nhaehnle, hiraditya,
steven_wu, dexonsmith, dang, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68944
llvm-svn: 374880
The file was modifiedllvm/unittests/IR/ValueTest.cpp
The file was modifiedllvm/include/llvm/LTO/LTO.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp
The file was modifiedllvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
The file was modifiedllvm/lib/Transforms/IPO/CrossDSOCFI.cpp
The file was modifiedllvm/lib/IR/Core.cpp
The file was modifiedllvm/lib/IR/IRBuilder.cpp
The file was modifiedllvm/include/llvm/IR/GlobalObject.h
The file was modifiedllvm/lib/Transforms/IPO/LowerTypeTests.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/Instrumentation.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/unittests/IR/FunctionTest.cpp
The file was modifiedllvm/lib/CodeGen/GlobalMerge.cpp
The file was modifiedllvm/lib/IR/Globals.cpp
The file was modifiedllvm/lib/Linker/IRMover.cpp
The file was modifiedpolly/lib/CodeGen/LoopGeneratorsKMP.cpp
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedllvm/lib/ExecutionEngine/Orc/Speculation.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
The file was modifiedllvm/lib/LTO/LTO.cpp
The file was modifiedllvm/lib/Transforms/IPO/MergeFunctions.cpp
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/lib/Linker/LinkModules.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/lib/Transforms/IPO/ConstantMerge.cpp
The file was modifiedllvm/lib/CodeGen/LowerEmuTLS.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/unittests/IR/ConstantsTest.cpp
Commit 1ae2d9a2bdce054560104f428e92eaef736e5c7f by david.stenberg
[DebugInfo] Add a DW_OP_LLVM_entry_value operation
Summary: Internally in LLVM's metadata we use DW_OP_entry_value
operations with the same semantics as DWARF; that is, its operand
specifies the number of bytes that the entry value covers.
At the time of emitting entry values we don't know the emitted size of
the DWARF expression that the entry value will cover. Currently the size
is hardcoded to 1 in DIExpression, and other values causes the verifier
to fail. As the size is 1, that effectively means that we can only have
valid entry values for registers that can be encoded in one byte, which
are the registers with DWARF numbers 0 to 31 (as they can be encoded as
single-byte DW_OP_reg0..DW_OP_reg31 rather than a multi-byte
DW_OP_regx). It is a bit confusing, but it seems like llvm-dwarfdump
will print an operation "correctly", even if the byte size is less than
that, which may make it seem that we emit correct DWARF for registers
with DWARF numbers > 31. If you instead use readelf for such cases, it
will interpret the number of specified bytes as a DWARF expression. This
seems like a limitation in llvm-dwarfdump.
As suggested in D66746, a way forward would be to add an internal
variant of DW_OP_entry_value, DW_OP_LLVM_entry_value, whose operand
instead specifies the number of operations that the entry value covers,
and we then translate that into the byte size at the time of emission.
In this patch that internal operation is added. This patch keeps the
limitation that a entry value can only be applied to simple register
locations, but it will fix the issue with the size operand being
incorrect for DWARF numbers > 31.
Reviewers: aprantl, vsk, djtodoro, NikolaPrica
Reviewed By: aprantl
Subscribers: jyknight, fedor.sergeev, hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D67492
llvm-svn: 374881
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
The file was modifiedllvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
The file was modifiedllvm/lib/IR/DebugInfoMetadata.cpp
The file was modifiedllvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/BinaryFormat/Dwarf.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
The file was modifiedllvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir
The file was addedllvm/test/Verifier/diexpression-dwarf-entry-value.ll
The file was modifiedllvm/test/Verifier/diexpression-entry-value.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was addedllvm/test/DebugInfo/ARM/entry-value-multi-byte-expr.ll
The file was addedllvm/test/Verifier/diexpression-entry-value-llvm-ir.ll
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir
The file was modifiedllvm/include/llvm/BinaryFormat/Dwarf.h
The file was modifiedllvm/include/llvm/IR/DebugInfoMetadata.h
The file was modifiedllvm/test/DebugInfo/MIR/Hexagon/live-debug-values-bundled-entry-values.mir
The file was modifiedllvm/test/Verifier/diexpression-valid-entry-value.ll
The file was addedllvm/test/DebugInfo/Sparc/entry-value-complex-reg-expr.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
Commit ec87b003823d63f3342cf648f55a134c1522e612 by saar
[Concepts] Concept Specialization Expressions
Part of C++20 Concepts implementation effort. Added Concept
Specialization Expressions that are created when a concept is referenced
with arguments, and tests thereof.
llvm-svn: 374882
The file was removedclang/test/CXX/concepts-ts/dcl.dcl/lit.cfg.py
The file was addedclang/test/PCH/cxx2a-concept-specialization-expr.cpp
The file was removedclang/test/CXX/concepts-ts/dcl.dcl/dcl.spec/dcl.spec.concept/p5.cpp
The file was modifiedclang/lib/Sema/CMakeLists.txt
The file was modifiedclang/tools/libclang/CXCursor.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/include/clang/Serialization/ASTBitCodes.h
The file was addedclang/lib/Sema/SemaConcept.cpp
The file was removedclang/test/CXX/concepts-ts/dcl.dcl/dcl.spec/dcl.spec.concept/p1.cpp
The file was modifiedclang/lib/AST/StmtProfile.cpp
The file was modifiedclang/include/clang/Basic/StmtNodes.td
The file was removedclang/test/CXX/concepts-ts/dcl.dcl/dcl.spec/dcl.spec.concept/p7.cpp
The file was modifiedclang/lib/Sema/SemaExceptionSpec.cpp
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp
The file was removedclang/test/CXX/concepts-ts/dcl.dcl/dcl.spec/dcl.spec.concept/p2.cpp
The file was modifiedclang/lib/Parse/ParseExpr.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was removedclang/test/CXX/concepts-ts/expr/expr.prim/expr.prim.id/p3.cpp
The file was modifiedclang/test/Parser/cxx2a-concept-declaration.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/lib/AST/StmtPrinter.cpp
The file was modifiedclang/include/clang/AST/ExprCXX.h
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/lib/Serialization/ASTWriterStmt.cpp
The file was addedclang/test/CXX/expr/expr.prim/expr.prim.id/p3.cpp
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngine.cpp
The file was removedclang/test/CXX/concepts-ts/dcl.dcl/dcl.spec/dcl.spec.concept/p6.cpp
The file was modifiedclang/lib/AST/Expr.cpp
The file was addedclang/test/CXX/temp/temp.constr/temp.constr.decl/class-template-decl.cpp
The file was modifiedclang/lib/Frontend/FrontendActions.cpp
The file was modifiedclang/lib/AST/ExprCXX.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/lib/AST/ExprClassification.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was removedclang/test/CXX/concepts-ts/temp/temp.constr/temp.constr.decl/class-template-decl.cpp
Commit a94546987529b4410b99a66dfd268b3faacb78ec by llvmgnsyncbot
gn build: Merge r374882
llvm-svn: 374883
The file was modifiedllvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn