SuccessChanges

Summary

  1. [Alignment][NFC] Optimize alignTo (details)
  2. [Driver,ARM] Make -mfloat-abi=soft turn off MVE. (details)
  3. [llvm-ar] Make paths case insensitive when on windows (details)
  4. [libTooling] Fix r374962: add more Transformer forwarding decls. (details)
  5. [AMDGPU] Fix-up cases where writelane has 2 SGPR operands (details)
  6. [RISCV] Add MachineInstr immediate verification (details)
  7. bpf: fix wrong truncation elimination when there is back-edge/loop (details)
  8. [Remarks] Add support for prepending a path to external files (details)
  9. [Codegen] Adjust saturation test. NFC. (details)
  10. [AArch64,Assembler] Compiler support for ID_MMFR5_EL1 (details)
  11. [Remarks] Use StringRef::contains to avoid differences in error string (details)
  12. [DWARF5] Added support for DW_AT_noreturn attribute to be emitted for (details)
  13. [SVE][IR] Small TypeSize improvements left out of initial commit (details)
  14. [Remarks] Fix unit test by only checking for the path (details)
  15. [Remarks] Fix warning for ambigous `else` behind EXPECT macro (details)
  16. [AMDGPU] Supress unused sdwa insts generation (details)
  17. [OPENMP]Use different addresses for zeroed thread_id/bound_id. (details)
  18. [lit] Clean up internal diff's encoding handling (details)
  19. CombinerHelper - silence dead assignment warnings. NFCI. (details)
  20. [lit] Fix internal diff's --strip-trailing-cr and use it (details)
  21. [NFC][XCOFF][AIX] Rename ControlSections to CsectGroup (details)
  22. Tag CFI-generated data structures with "#pragma clang section" (details)
  23. [lit] Fix a test case that r374652 missed (details)
  24. [lldb] move more things from python to cmake (details)
  25. [SLP] avoid reduction transform on patterns that the backend can (details)
  26. [OPENMP]Allow priority clause in combined task-based directives. (details)
  27. Fix darwin-ld-lto test for some speical path (details)
  28. [llvm-ar] Implement the V modifier as an alias for --version (details)
  29. [android/process list] support showing process arguments (details)
  30. [AMDGPU] Do not combine dpp with physreg def (details)
  31. Replace platform-dependent `stat` with `llvm::sys::fs::status`. NFC (details)
  32. Add arm64_32 support to lldb, an ILP32 codegen that runs on arm64 ISA (details)
  33. [AMDGPU] Do not combine dpp mov reading physregs (details)
  34. [LLDB] Use the llvm microsoft demangler instead of the windows dbghelp (details)
  35. [IndVars] Fix a miscompile in off-by-default loop predication (details)
  36. [clangd] Add the missing dependency on `clangLex`. (details)
  37. Remove a stale comment, noted in post commit review for rL375038 (details)
  38. [Symbolize] Use the local MSVC C++ demangler instead of relying on (details)
  39. GlobalISel: Implement lower for G_SADDO/G_SSUBO (details)
Commit 2f6da767f13b8fd81f840c211d405fea32ac9db7 by gchatelet
[Alignment][NFC] Optimize alignTo
Summary: A small optimization suggested by jakehehrlich@ in D64790.
Reviewers: jakehehrlich, courbet
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69023
llvm-svn: 375000
The file was modifiedllvm/include/llvm/Support/Alignment.h
Commit fdccf28697e5debe861247d218cbbecf9fd4323e by simon.tatham
[Driver,ARM] Make -mfloat-abi=soft turn off MVE.
Since `-mfloat-abi=soft` is taken to mean turning off all uses of the FP
registers, it should turn off the MVE vector instructions as well as
NEON and scalar FP. But it wasn't doing so.
So the options `-march=armv8.1-m.main+mve.fp+fp.dp -mfloat-abi=soft`
would cause the underlying LLVM to //not// support MVE (because it knows
the real target feature relationships and turned off MVE when the
`fpregs` feature was removed), but the clang layer still thought it
//was// supported, and would misleadingly define the feature macro
`__ARM_FEATURE_MVE`.
The ARM driver code already has a long list of feature names to turn off
when `-mfloat-abi=soft` is selected. The fix is to add the missing
entries `mve` and `mve.fp` to that list.
Reviewers: dmgreen
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69025
llvm-svn: 375001
The file was modifiedclang/lib/Driver/ToolChains/Arch/ARM.cpp
The file was modifiedclang/test/Driver/arm-mfpu.c
Commit 28a3b2aeb48fac0391b328eb1822b3fefe228a05 by gbreynoo
[llvm-ar] Make paths case insensitive when on windows
When on windows gnu-ar treats member names as case insensitive. This
commit implements the same behaviour.
Differential Revision: https://reviews.llvm.org/D68033
llvm-svn: 375002
The file was addedllvm/test/tools/llvm-ar/path-names.test
The file was modifiedllvm/tools/llvm-ar/llvm-ar.cpp
The file was modifiedllvm/docs/CommandGuide/llvm-ar.rst
The file was addedllvm/test/tools/llvm-ar/windows-name-case.test
The file was addedllvm/test/tools/llvm-ar/Inputs/path-names.a
The file was addedllvm/test/tools/llvm-ar/non-windows-name-case.test
Commit c14f1ea25e0505625560db81209a319b6c6caab0 by yitzhakm
[libTooling] Fix r374962: add more Transformer forwarding decls.
Summary: The move to a new, single namespace in r374962 left out some
type definitions from the old namespace and resulted in one naming
conflict (`text`).  This revision adds aliases for those definitions and
removes one of the `text` functions from the new namespace.
Reviewers: alexfh
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69036
llvm-svn: 375003
The file was modifiedclang/unittests/Tooling/TransformerTest.cpp
The file was modifiedclang/include/clang/Tooling/Transformer/RangeSelector.h
The file was modifiedclang/include/clang/Tooling/Transformer/RewriteRule.h
The file was modifiedclang/include/clang/Tooling/Transformer/Stencil.h
Commit 2d6a2303f83d762d05b0851a9212830e28712dfd by david.stuttard
[AMDGPU] Fix-up cases where writelane has 2 SGPR operands
Summary: Even though writelane doesn't have the same constraints as
other valu instructions it still can't violate the >1 SGPR operand
constraint
Due to later register propagation (e.g. fixing up vgpr operands via
readfirstlane) changing writelane to only have a single SGPR is tricky.
This implementation puts a new check after SIFixSGPRCopies that prevents
multiple SGPRs being used in any writelane instructions.
The algorithm used is to check for trivial copy prop of suitable
constants into one of the SGPR operands and perform that if possible. If
this isn't possible put an explicit copy of Src1 SGPR into M0 and use
that instead (this is allowable for writelane as the constraint is for
SGPR read-port and not constant-bus access).
Reviewers: rampitec, tpr, arsenm, nhaehnle
Reviewed By: rampitec, arsenm, nhaehnle
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, mgorny, yaxunl,
tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D51932
Change-Id: Ic7553fa57440f208d4dbc4794fc24345d7e0e9ea llvm-svn: 375004
The file was modifiedllvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
Commit 1893f9a45813d7b486576d88642e0e1cc5bc92fb by luismarques
[RISCV] Add MachineInstr immediate verification
Summary: This patch implements the `TargetInstrInfo::verifyInstruction`
hook for RISC-V. Currently the hook verifies the machine instruction's
immediate operands, to check if the immediates are within the expected
bounds. Without the hook invalid immediates are not detected except when
doing assembly parsing, so they are silently emitted (including being
truncated when emitting object code).
The bounds information is specified in tablegen by using the
`OperandType` definition, which sets the `MCOperandInfo`'s `OperandType`
field. Several RISC-V-specific immediate operand types were created,
which extend the `MCInstrDesc`'s `OperandType` `enum`.
To have the hook called with `llc` pass it the `-verify-machineinstrs`
option. For Clang add the cmake build config
`-DLLVM_ENABLE_EXPENSIVE_CHECKS=True`, or temporarily patch
`TargetPassConfig::addVerifyPass`.
Review concerns:
- The patch adds immediate operand type checks that cover at least the
base ISA. There are several other operand types for the C extension and
one type for the F/D extensions that were left out of this initial patch
because they introduced further design concerns that I felt were best
evaluated separately.
- Invalid register classes (e.g. passing a GPR register where a GPRC is
expected) are already caught, so were not included.
- This design makes the more abstract `MachineInstr` verification depend
on MC layer definitions, which arguably is not the cleanest design, but
is in line with how things are done in other parts of the target and
LLVM in general.
- There is some duplication of logic already present in the
`MCOperandPredicate`s. Since the `MachineInstr` and `MCInstr` notions of
immediates are fundamentally different, this is currently necessary.
Reviewers: asb, lenary
Reviewed By: lenary
Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal,
niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones,
rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei,
psnobl, benna, Jim, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67397
llvm-svn: 375006
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.cpp
The file was addedllvm/test/CodeGen/RISCV/verify-instr.mir
The file was modifiedllvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h
Commit ec51851026a55e1cfc7f006f0e75f0a19acb32d3 by wong.kwongyuan.tools
bpf: fix wrong truncation elimination when there is back-edge/loop
Currently, BPF backend is doing truncation elimination. If one
truncation is performed on a value defined by narrow loads, then it
could be redundant given BPF loads zero extend the destination register
implicitly.
When the definition of the truncated value is a merging value (PHI node)
that could come from different code paths, then checks need to be done
on all possible code paths.
Above described optimization was introduced as r306685, however it
doesn't work when there is back-edge, for example when loop is used
inside BPF code.
For example for the following code, a zero-extended value should be
stored into b[i], but the "and reg, 0xffff" is wrongly eliminated which
then generates corrupted data.
void cal1(unsigned short *a, unsigned long *b, unsigned int k)
{
unsigned short e;
  e = *a;
for (unsigned int i = 0; i < k; i++) {
   b[i] = e;
   e = ~e;
}
}
The reason is r306685 was trying to do the PHI node checks inside isel
DAG2DAG phase, and the checks are done on MachineInstr. This is actually
wrong, because MachineInstr is being built during isel phase and the
associated information is not completed yet. A quick search shows none
target other than BPF is access MachineInstr info during isel phase.
For an PHI node, when you reached it during isel phase, it may have all
predecessors linked, but not successors. It seems successors are linked
to PHI node only when doing SelectionDAGISel::FinishBasicBlock and this
happens later than PreprocessISelDAG hook.
Previously, BPF program doesn't allow loop, there is probably the reason
why this bug was not exposed.
This patch therefore fixes the bug by the following approach:
- The existing truncation elimination code and the associated
  "load_to_vreg_" records are removed.
- Instead, implement truncation elimination using MachineSSA pass, this
  is where all information are built, and keep the pass together with
other
  similar peephole optimizations inside BPFMIPeephole.cpp. Redundant
move
  elimination logic is updated accordingly.
- Unit testcase included + no compilation errors for kernel BPF
selftest.
Patch Review
=== Patch was sent to and reviewed by BPF community at:
  https://lore.kernel.org/bpf
Reported-by: David Beckett <david.beckett@netronome.com> Reviewed-by:
Yonghong Song <yhs@fb.com> Signed-off-by: Jiong Wang
<jiong.wang@netronome.com> llvm-svn: 375007
The file was addedllvm/test/CodeGen/BPF/remove_truncate_6.ll
The file was modifiedllvm/lib/Target/BPF/BPFMIPeephole.cpp
The file was modifiedllvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/BPF/BPF.h
The file was modifiedllvm/lib/Target/BPF/BPFTargetMachine.cpp
Commit 684605ec0ea2e9b162e353e13708b01e2decf3f0 by francisvm
[Remarks] Add support for prepending a path to external files
This helps with testing and debugging for paths that are assumed
absolute.
It also uses a FileError to provide the file path it's trying to open.
llvm-svn: 375008
The file was modifiedllvm/unittests/Remarks/YAMLRemarksParsingTest.cpp
The file was modifiedllvm/lib/Remarks/RemarkParser.cpp
The file was modifiedllvm/include/llvm/Remarks/RemarkParser.h
The file was modifiedllvm/lib/Remarks/BitstreamRemarkParser.cpp
The file was modifiedllvm/lib/Remarks/YAMLRemarkParser.h
The file was modifiedllvm/lib/Remarks/YAMLRemarkParser.cpp
The file was modifiedllvm/lib/Remarks/BitstreamRemarkParser.h
Commit fe2d15b39bb5265015802e9492f8c3eab8442de3 by david.green
[Codegen] Adjust saturation test. NFC.
Add some extra sat tests and adjust some of the existing tests to use
signext where it would naturally be.
llvm-svn: 375009
The file was modifiedllvm/test/CodeGen/X86/ssub_sat.ll
The file was addedllvm/test/CodeGen/X86/uadd_sat_plus.ll
The file was addedllvm/test/CodeGen/AArch64/usub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/X86/usub_sat.ll
The file was modifiedllvm/test/CodeGen/ARM/ssub_sat.ll
The file was addedllvm/test/CodeGen/AArch64/uadd_sat_plus.ll
The file was addedllvm/test/CodeGen/ARM/uadd_sat_plus.ll
The file was addedllvm/test/CodeGen/X86/ssub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/uadd_sat.ll
The file was addedllvm/test/CodeGen/ARM/usub_sat_plus.ll
The file was addedllvm/test/CodeGen/X86/usub_sat_plus.ll
The file was addedllvm/test/CodeGen/ARM/sadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/usub_sat.ll
The file was addedllvm/test/CodeGen/AArch64/ssub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/sadd_sat.ll
The file was addedllvm/test/CodeGen/X86/sadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/X86/sadd_sat.ll
The file was modifiedllvm/test/CodeGen/X86/uadd_sat.ll
The file was addedllvm/test/CodeGen/ARM/ssub_sat_plus.ll
The file was addedllvm/test/CodeGen/AArch64/sadd_sat_plus.ll
Commit b6dd1286217711a40a3d8f20366a5fdad6b8c7db by mark.murray
[AArch64,Assembler] Compiler support for ID_MMFR5_EL1
Summary: Add read-only system register ID_MMFR5_EL1 and unit tests.
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69039
llvm-svn: 375010
The file was modifiedllvm/lib/Target/AArch64/AArch64SystemOperands.td
The file was modifiedllvm/test/MC/AArch64/basic-a64-instructions.s
The file was modifiedllvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
The file was modifiedllvm/test/MC/AArch64/basic-a64-diagnostics.s
Commit 0216a3c6d1c12357767b52a66151781cc2e1c5cd by francisvm
[Remarks] Use StringRef::contains to avoid differences in error string
Different OSs have different error strings:
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/39534/steps/ninja%20check%201/logs/FAIL%3A%20LLVM-Unit%3A%3AYAMLRemarks.ParsingBadMeta
llvm-svn: 375011
The file was modifiedllvm/unittests/Remarks/YAMLRemarksParsingTest.cpp
Commit a9cfde1f6ab5ca52467c9e8695c64ddd247bd4ef by Adrian Prantl
[DWARF5] Added support for DW_AT_noreturn attribute to be emitted for
C++ class member functions.
Patch by Sourabh Singh Tomar!
Differential Revision: https://reviews.llvm.org/D68697
llvm-svn: 375012
The file was modifiedllvm/test/DebugInfo/X86/noreturn_cpp11.ll
The file was addedclang/test/CodeGenCXX/debug-info-noreturn.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
Commit f998fa2924c736e5b5c2cc6ddc222a36d0171470 by graham.hunter
[SVE][IR] Small TypeSize improvements left out of initial commit
The commit for D53137 left out the last round of improvements requested
by reviewers. Adding those in now.
llvm-svn: 375013
The file was modifiedllvm/lib/IR/Instructions.cpp
The file was modifiedllvm/include/llvm/IR/DataLayout.h
The file was modifiedllvm/include/llvm/Support/TypeSize.h
Commit 437f362c3380275611fb34b88c1b305145a4956e by francisvm
[Remarks] Fix unit test by only checking for the path
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/39536/steps/ninja%20check%201/logs/FAIL%3A%20LLVM-Unit%3A%3AYAMLRemarks.ParsingBadMeta
llvm-svn: 375014
The file was modifiedllvm/unittests/Remarks/YAMLRemarksParsingTest.cpp
Commit 0947af7ac539368b1bee8c21052b843753f2f190 by francisvm
[Remarks] Fix warning for ambigous `else` behind EXPECT macro
http://lab.llvm.org:8011/builders/clang-ppc64be-linux-lnt/builds/31902/steps/ninja%20check%201/logs/stdio
llvm-svn: 375015
The file was modifiedllvm/unittests/Remarks/YAMLRemarksParsingTest.cpp
Commit d4ab74ee0b37c930ce7446caa55f2a8c829197fe by Stanislav.Mekhanoshin
[AMDGPU] Supress unused sdwa insts generation
Do not generate non-existing sdwa instructions. It reduces the number of
generated instructions by 185.
Differential Revision: https://reviews.llvm.org/D69010
llvm-svn: 375016
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOPCInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP1Instructions.td
Commit f89cf21337b07e0f6fc3704eadaddc05aa845831 by a.bataev
[OPENMP]Use different addresses for zeroed thread_id/bound_id.
When the parallel region is called directly in the sequential region,
the zeroed tid/bound id are used. But they must point to the different
memory locations as the parameters are marked as noalias.
llvm-svn: 375017
The file was modifiedclang/test/OpenMP/nvptx_target_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/test/OpenMP/parallel_if_codegen.cpp
The file was modifiedclang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
Commit f095b8c425ecf832d0a5ccdbaa02c27153f80a0c by jdenny.ornl
[lit] Clean up internal diff's encoding handling
As suggested by rnk at D67643#1673043, instead of reading files multiple
times until an appropriate encoding is found, read them once as binary,
and then try to decode what was read.
For Python >= 3.5, don't fail when attempting to decode the
`diff_bytes` output in order to print it.
Avoid failures for Python 2.7 used on some Windows bots by transforming
diff output with `lit.util.to_string` before writing it to stdout.
Finally, add some tests for encoding handling.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D68664
llvm-svn: 375018
The file was addedllvm/utils/lit/tests/Inputs/shtest-shell/diff-encodings.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-shell/diff-in.utf8
The file was modifiedllvm/utils/lit/tests/shtest-shell.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-shell/diff-in.utf16
The file was modifiedllvm/utils/lit/lit/TestRunner.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-shell/diff-in.bin
The file was modifiedllvm/utils/lit/tests/max-failures.py
Commit e2163f96abb5905938115f8935702b1defe4f015 by llvm-dev
CombinerHelper - silence dead assignment warnings. NFCI.
Copy the NewAlignment value to Alignment first and then use that to
update the stack frame object alignments.
llvm-svn: 375019
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Commit 2622419c78c204105bd04d5f0b55eadbc26850ad by jdenny.ornl
[lit] Fix internal diff's --strip-trailing-cr and use it
Using GNU diff, `--strip-trailing-cr` removes a `\r` appearing before a
`\n` at the end of a line.  Without this patch, lit's internal diff only
removes `\r` if it appears as the last character.  That seems useless.
This patch fixes that.
This patch also adds `--strip-trailing-cr` to some tests that fail on
Windows bots when D68664 is applied.  Based on what I see in the bot
logs, I think the following is happening.  In each test there, lit diff
is comparing a file with `\r\n` line endings to a file with `\n` line
endings.  Without D68664, lit diff reads those files in text mode, which
in Windows causes `\r\n` to be replaced with `\n`. However, with D68664,
lit diff reads the files in binary mode instead and thus reports that
every line is different, just as GNU diff does
(at least under Ubuntu).  Adding `--strip-trailing-cr` to those tests
restores the previous behavior while permitting the behavior of lit diff
to be more like GNU diff.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D68839
llvm-svn: 375020
The file was modifiedllvm/utils/lit/tests/shtest-shell.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-shell/diff-strip-trailing-cr.txt
The file was addedllvm/utils/lit/tests/Inputs/shtest-shell/diff-in.dos
The file was modifiedllvm/test/MC/ARM/preserve-comments-arm.s
The file was modifiedllvm/test/tools/llvm-profdata/profile-symbol-list.test
The file was modifiedllvm/utils/lit/lit/TestRunner.py
The file was modifiedllvm/test/tools/llvm-profdata/sample-remap.test
The file was addedllvm/utils/lit/tests/Inputs/shtest-shell/diff-in.unix
The file was modifiedllvm/utils/lit/tests/max-failures.py
The file was modifiedllvm/test/MC/AsmParser/preserve-comments.s
The file was modifiedllvm/test/tools/llvm-profdata/roundtrip.test
The file was modifiedllvm/test/tools/llvm-cxxmap/remap.test
Commit 97ed5625442d66d882c304a72ffe0de9fdad59a1 by jasonliu.development
[NFC][XCOFF][AIX] Rename ControlSections to CsectGroup
The name of ControlSections is not expressive enough to convey what they
really are. CsectGroup can better communicate the concept of grouping
csects together since they have similar property.
Reviewer: daltenty
Differential Revision: https://reviews.llvm.org/D69001
llvm-svn: 375021
The file was modifiedllvm/lib/MC/XCOFFObjectWriter.cpp
Commit e2692b3bc0327606748b6d291b9009d2c845ced5 by dmitry.mikulin
Tag CFI-generated data structures with "#pragma clang section"
attributes.
Differential Revision: https://reviews.llvm.org/D68808
llvm-svn: 375022
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was addedclang/test/CodeGen/cfi-pragma-section.c
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/lib/CodeGen/CodeGenModule.h
The file was modifiedclang/lib/Sema/SemaDecl.cpp
Commit 6ce2d810320c50cf2ca07dafecaf9ebb10e4abba by jdenny.ornl
[lit] Fix a test case that r374652 missed
llvm-svn: 375023
The file was modifiedllvm/test/Assembler/thinlto-vtable-summary.ll
Commit 1d4a40751ff3552494f063306d3b2e1879d49230 by hhb
[lldb] move more things from python to cmake
Summary: Move the copy of six.py, lldb.py and macosx/heap
Reviewers: labath
Subscribers: mgorny, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D69016
llvm-svn: 375024
The file was modifiedlldb/CMakeLists.txt
The file was modifiedlldb/scripts/Python/finishSwigPythonLLDB.py
Commit 8cc6d42e8d6c0c133e4d5d46e918e5e2ae0781c6 by spatel
[SLP] avoid reduction transform on patterns that the backend can
load-combine (2nd try)
The 1st attempt at this modified the cost model in a bad way to avoid
the vectorization, but that caused problems for other users (the loop
vectorizer) of the cost model.
I don't see an ideal solution to these 2 related, potentially large,
perf regressions: https://bugs.llvm.org/show_bug.cgi?id=42708
https://bugs.llvm.org/show_bug.cgi?id=43146
We decided that load combining was unsuitable for IR because it could
obscure other optimizations in IR. So we removed the LoadCombiner pass
and deferred to the backend. Therefore, preventing SLP from destroying
load combine opportunities requires that it recognizes patterns that
could be combined later, but not do the optimization itself ( it's not a
vector combine anyway, so it's probably out-of-scope for SLP).
Here, we add a cost-independent bailout with a conservative pattern
match for a multi-instruction sequence that can probably be reduced
later.
In the x86 tests shown (and discussed in more detail in the bug
reports), SDAG combining will produce a single instruction on these
tests like:
  movbe   rax, qword ptr [rdi]
or:
  mov     rax, qword ptr [rdi]
Not some (half) vector monstrosity as we currently do using SLP:
  vpmovzxbq       ymm0, dword ptr [rdi + 1] # ymm0 = mem[0],zero,zero,..
vpsllvq ymm0, ymm0, ymmword ptr [rip + .LCPI0_0]
movzx   eax, byte ptr [rdi]
movzx   ecx, byte ptr [rdi + 5]
shl     rcx, 40
movzx   edx, byte ptr [rdi + 6]
shl     rdx, 48
or      rdx, rcx
movzx   ecx, byte ptr [rdi + 7]
shl     rcx, 56
or      rcx, rdx
or      rcx, rax
vextracti128    xmm1, ymm0, 1
vpor    xmm0, xmm0, xmm1
vpshufd xmm1, xmm0, 78          # xmm1 = xmm0[2,3,0,1]
vpor    xmm0, xmm0, xmm1
vmovq   rax, xmm0
or      rax, rcx
vzeroupper
ret
Differential Revision: https://reviews.llvm.org/D67841
llvm-svn: 375025
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
Commit 31ba47646ba40b7892492bb227d85de0d6733e07 by a.bataev
[OPENMP]Allow priority clause in combined task-based directives.
The expression of the priority clause must be captured in the combined
task-based directives, like 'parallel master taskloop' directive.
llvm-svn: 375026
The file was modifiedclang/lib/AST/StmtProfile.cpp
The file was modifiedclang/lib/AST/OpenMPClause.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
The file was modifiedclang/test/OpenMP/parallel_master_taskloop_codegen.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/include/clang/AST/OpenMPClause.h
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
Commit 87cf73e956386a0942137f70a1171c484836341b by Steven Wu
Fix darwin-ld-lto test for some speical path
Fix the test by not assuming the prefix path of the temp directory can
be matched by a regex.
rdar://problem/56259195
llvm-svn: 375027
The file was modifiedclang/test/Driver/darwin-ld-lto.c
Commit a86bd22515952c184471c95aaf6273cd6a94505b by rupprecht
[llvm-ar] Implement the V modifier as an alias for --version
Summary: Also update the help modifier (h) so that it works as a
modifier and not just as a standalone `h`. For example, `llvm-ar h`
prints the help message, but `llvm-ar xh` currently prints `unknown
option h`.
Reviewers: MaskRay, gbreynoo
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69007
llvm-svn: 375028
The file was addedllvm/test/tools/llvm-ar/version.test
The file was modifiedllvm/tools/llvm-ar/llvm-ar.cpp
The file was modifiedllvm/test/tools/llvm-ar/help-message.test
Commit 48a50ee0344d626fc4b51f6d2acf1fa2354bc46b by a20012251
[android/process list] support showing process arguments
Summary: The qfProcessInfo and qsProcessInfo packets currently don't set
the processes' arguments, however the platform process list -v command
tries to print it. In this diff I'm adding the arguments as part of the
packet, and now the command shows the arguments just like on mac.
On Mac:
507    1      wallace    1876110778 wallace    1876110778
x86_64-apple-macosx      /usr/libexec/secd 503    1      wallace  
1876110778 wallace    1876110778 x86_64-apple-macosx    
/usr/libexec/secinitd 501    1      wallace    1876110778 wallace  
1876110778 x86_64-apple-macosx      /usr/libexec/languageassetd
--firstLogin 497    1      wallace    1876110778 wallace    1876110778
x86_64-apple-macosx      /usr/libexec/trustd --agent 496    1    
wallace    1876110778 wallace    1876110778 x86_64-apple-macosx    
/usr/libexec/lsd 494    1      wallace    1876110778 wallace  
1876110778 x86_64-apple-macosx    
/System/Library/Frameworks/CoreTelephony.framework/Support/CommCenter -L
491    1      wallace    1876110778 wallace    1876110778
x86_64-apple-macosx      /usr/sbin/distnoted agent 489    1      wallace
   1876110778 wallace    1876110778 x86_64-apple-macosx    
/usr/libexec/UserEventAgent (Aqua) 484    1      wallace    1876110778
wallace    1876110778 x86_64-apple-macosx      /usr/sbin/cfprefsd agent
483    1      wallace    1876110778 wallace    1876110778
x86_64-apple-macosx    
/System/Library/Frameworks/LocalAuthentication.framework/Support/coreauthd
On android:
1561   1016   root       0                     0        
aarch64-unknown-linux-android  /system/bin/ip6tables-restore--noflush -w
-v 1805   982    1000       1000                  1000                 
                   android:drmService 1811   982    10189      10189   
            10189                                   
com.qualcomm.embms:remote 1999   1      1000       1000                
1000       aarch64-unknown-linux-android  /system/bin/tlc_serverCCM 2332
  982    10038      10038                 10038                        
           com.android.systemui 2378   983    1053       1053          
      1053                                      webview_zygote 2448 
982    5013       5013                  5013                           
         com.sec.location.nsflp2 2465   982    10027      10027        
       10027                                   
com.google.android.gms.persistent
Differential Revision:  https://reviews.llvm.org/D68293
llvm-svn: 375029
The file was modifiedlldb/docs/lldb-gdb-remote.txt
The file was modifiedlldb/source/Utility/ProcessInfo.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
The file was addedlldb/packages/Python/lldbsuite/test/commands/platform/process/Makefile
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/gdb_remote_client/TestPlatformClient.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/platform/process/main.cpp
The file was addedlldb/packages/Python/lldbsuite/test/commands/platform/process/TestProcessList.py
Commit 3d99310c15e45d0dd9db20ff283d53ba4192ca1a by Stanislav.Mekhanoshin
[AMDGPU] Do not combine dpp with physreg def
We will remove dpp mov along with the physreg def otherwise.
Differential Revision: https://reviews.llvm.org/D69063
llvm-svn: 375030
The file was modifiedllvm/test/CodeGen/AMDGPU/dpp_combine.mir
The file was modifiedllvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
Commit 930ada91ce8ff9715e2ca7309bc946dbb9162dfb by vsapsai
Replace platform-dependent `stat` with `llvm::sys::fs::status`. NFC
intended.
Reviewers: bruno, sammccall
Reviewed By: sammccall
Subscribers: jkorous, dexonsmith, arphaman, ributzka, cfe-commits
Differential Revision: https://reviews.llvm.org/D69011
llvm-svn: 375031
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/tools/libclang/CIndexCodeCompletion.cpp
Commit 7dd7a3607596a51044b8706ebf6df2e613ce1e9b by Jason Molenda
Add arm64_32 support to lldb, an ILP32 codegen that runs on arm64 ISA
targets, specifically Apple watches.
Differential Revision: https://reviews.llvm.org/D68858
llvm-svn: 375032
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/char/TestExprsChar.py
The file was modifiedlldb/source/Target/Thread.cpp
The file was modifiedlldb/source/Utility/ArchSpec.cpp
The file was modifiedlldb/tools/compact-unwind/compact-unwind-dumper.c
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbplatformutil.py
The file was modifiedlldb/source/Plugins/ABI/SysV-arm64/ABISysV_arm64.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
The file was modifiedlldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
The file was modifiedlldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleWatch.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
The file was modifiedlldb/source/Target/Platform.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/persist_objc_pointeetype/TestPersistObjCPointeeType.py
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
The file was modifiedlldb/tools/debugserver/source/DNB.cpp
The file was modifiedlldb/source/Plugins/ABI/MacOSX-arm64/ABIMacOSX_arm64.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
The file was modifiedlldb/source/Host/macosx/objcxx/Host.mm
The file was modifiedlldb/source/Host/common/NativeProcessProtocol.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
The file was modifiedlldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp
The file was modifiedlldb/source/Symbol/CompactUnwindInfo.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/python_api/watchpoint/TestWatchpointIter.py
The file was modifiedlldb/include/lldb/Utility/ArchSpec.h
The file was modifiedlldb/packages/Python/lldbsuite/test/arm/breakpoint-it/TestBreakpointIt.py
The file was modifiedlldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
The file was modifiedlldb/source/Symbol/ClangASTContext.cpp
The file was modifiedlldb/unittests/Utility/ArchSpecTest.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/expression/call-function/TestCallStdStringFunction.py
The file was modifiedlldb/packages/Python/lldbsuite/test/commands/register/register/register_command/TestRegisters.py
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/data-formatter/data-formatter-objc/nsindexpath/TestDataFormatterNSIndexPath.py
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
Commit edcd5815ced65300ff2aea10afd818faaa36523c by Stanislav.Mekhanoshin
[AMDGPU] Do not combine dpp mov reading physregs
We cannot be sure physregs will stay unchanged.
Differential Revision: https://reviews.llvm.org/D69065
llvm-svn: 375033
The file was modifiedllvm/test/CodeGen/AMDGPU/dpp_combine.mir
The file was modifiedllvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
Commit 13993a6f8681ae40fa9b1ce690885e95119b6dbf by martin
[LLDB] Use the llvm microsoft demangler instead of the windows dbghelp
api. NFCI.
Differential Revision: https://reviews.llvm.org/D68134
llvm-svn: 375034
The file was modifiedlldb/source/Core/Mangled.cpp
Commit d4346584fa35232af286ededf9f01353d905ed9f by listmail
[IndVars] Fix a miscompile in off-by-default loop predication
implementation
The problem is that we can have two loop exits, 'a' and 'b', where 'a'
and 'b' would exit at the same iteration, 'a' precedes 'b' along some
path, and 'b' is predicated while 'a' is not. In this case (see the
previously submitted test case), we causing the loop to exit through 'b'
whereas it should have exited through 'a'.
This only applies to loop exits where the exit counts are not provably
inequal, but that isn't as much of a restriction as it appears. If we
could order the exit counts, we'd have already removed one of the two
exits. In theory, we might be able to prove inequality w/o ordering, but
I didn't really explore that piece. Instead, I went for the obvious
restriction and ensured we didn't predicate exits following
non-predicateable exits.
Credit goes to Evgeny Brevnov for figuring out the problematic case.
Fuzzing probably also found it (failures seen), but due to some silly
infrastructure problems I hadn't gotten to the results before Evgeny
hand reduced it from a benchmark (he manually enabled the transform).
Once this is fixed, I'll try to filter through the fuzzer failures to
see if there's anything additional lurking.
Differential Revision https://reviews.llvm.org/D68956
llvm-svn: 375038
The file was modifiedllvm/test/Transforms/IndVarSimplify/loop-predication.ll
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Commit b4874226de6145d3196eacb0fbf3cba7654d51d9 by michael.hliao
[clangd] Add the missing dependency on `clangLex`.
llvm-svn: 375039
The file was modifiedclang-tools-extra/clangd/tool/CMakeLists.txt
The file was modifiedclang-tools-extra/clangd/refactor/tweaks/CMakeLists.txt
Commit ac77947315c5cf9a79b1aa5b813baaa2d018cbe3 by listmail
Remove a stale comment, noted in post commit review for rL375038
llvm-svn: 375040
The file was modifiedllvm/test/Transforms/IndVarSimplify/loop-predication.ll
Commit a4f6b598462e39107aecad1f8d4fb1cfd7583580 by martin
[Symbolize] Use the local MSVC C++ demangler instead of relying on
dbghelp. NFC.
This allows making a couple llvm-symbolizer tests run in all
environments.
Differential Revision: https://reviews.llvm.org/D68133
llvm-svn: 375041
The file was modifiedllvm/test/tools/llvm-symbolizer/coff-dwarf.test
The file was modifiedllvm/lib/DebugInfo/Symbolize/Symbolize.cpp
The file was modifiedllvm/test/tools/llvm-symbolizer/coff-exports.test
Commit 34ed76e1803cd5173aeb9460824b9be65f2b326f by Matthew.Arsenault
GlobalISel: Implement lower for G_SADDO/G_SSUBO
Port directly from SelectionDAG, minus the path using
ISD::SADDSAT/ISD::SSUBSAT.
llvm-svn: 375042
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssubo.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-saddo.mir

Summary

  1. Now LLVMBuildFactory supports both a "legacy mode" with SVN checkout and (details)
  2. This allows to use the newly added LLVMBuildFactory ability to (details)
Commit bba39ba2ce3c6a0a48fa496c85f31b42e3e7e799 by gkistanova
Now LLVMBuildFactory supports both a "legacy mode" with SVN checkout and
a git/github checkout. This provides a transparent way of dialing with
the source code in all the bots which use LLVMBuildFactory directly or
indirectly through UnifiedTreeBuilder. is_legacy_mode is True by default
to keep the status quo, but later will be changed to False to migrate
all the supported bots to github.
Patch by Alex Orlov.
Differential Revision: https://reviews.llvm.org/D69046
llvm-svn: 375035
The file was modifiedzorg/buildbot/process/factory.py
Commit 75da714e20c823f5afada7ac602feba92d7dcf9d by gkistanova
This allows to use the newly added LLVMBuildFactory ability to
transparently use SVN or github and switch between depending on the
is_legacy_mode attribute, and adds a github support to
UnifiedTreeBuilder.
Patch by Alex Orlov.
Differential Revision: https://reviews.llvm.org/D69049
llvm-svn: 375036
The file was modifiedzorg/buildbot/builders/UnifiedTreeBuilder.py