SuccessChanges

Summary

  1. AMDGPU: Split flat offsets that don't fit in DAG (details)
  2. AMDGPU: Increase vcc liveness scan threshold (details)
Commit 7cd57dcd5b716dd1dab446974abd4c51d01038a7 by Matthew.Arsenault
AMDGPU: Split flat offsets that don't fit in DAG
We handle it this way for some other address spaces.
Since r349196, SILoadStoreOptimizer has been trying to do this. This is
after SIFoldOperands runs, which can change the addressing patterns.
It's simpler to just split this earlier.
llvm-svn: 375366
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/offset-split-global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-hi16.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/global_atomics.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/offset-split-flat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-address-space.ll
Commit e5be543a55986e353d40d79702eef5cff3934348 by Matthew.Arsenault
AMDGPU: Increase vcc liveness scan threshold
Avoids a test regression in a future patch. Also add debug printing on
this case, so I waste less time debugging folds in the future.
llvm-svn: 375367
The file was modifiedllvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fence-barrier.ll