SuccessChanges

Summary

  1. [MIPS GlobalISel] Select MSA vector generic and builtin add (details)
Commit e4af9de36ca60483040af381edd10e716e7b077d by petar.avramovic
[MIPS GlobalISel] Select MSA vector generic and builtin add
Select vector G_ADD for MIPS32 with MSA. We have to set bank for vector
operands to fprb and selectImpl will do the rest.
__builtin_msa_addv_<format> will be transformed into G_ADD in
legalizeIntrinsic and selected in the same way.
__builtin_msa_addvi_<format> will be directly selected into
ADDVI_<format> in legalizeIntrinsic. MIR tests for it have unnecessary
additional copies. Capture current state of tests with
run-pass=legalizer with a test in test/CodeGen/MIR/Mips.
Differential Revision: https://reviews.llvm.org/D68984
llvm-svn: 375501
The file was addedllvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec.mir
The file was addedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll
The file was addedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec_builtin.ll
The file was addedllvm/test/CodeGen/Mips/GlobalISel/instruction-select/add_vec.mir
The file was addedllvm/test/CodeGen/Mips/GlobalISel/regbankselect/add_vec.mir
The file was addedllvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll
The file was addedllvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir
The file was addedllvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp
The file was modifiedllvm/lib/Target/Mips/MipsRegisterBankInfo.cpp