SuccessChanges

Summary

  1. [LegalizeTypes] When promoting BITREVERSE/BSWAP don't take the shift (details)
  2. [SDAG] fold insert_vector_elt with undef index (details)
Commit f067dd839eca3103e8afc49c6e0a74d944f25fdd by craig.topper
[LegalizeTypes] When promoting BITREVERSE/BSWAP don't take the shift
amount into account when determining the shift amount VT.
If the target's preferred shift amount VT can't hold any shift amount
for the promoted VT, we should use i32. The specific shift amount
shouldn't matter. The type will be adjusted later when the shift itself
is type legalized. This avoids an assert in getNode.
Fixes PR43820.
The file was addedllvm/test/CodeGen/X86/pr43820.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Commit 85a2146c155953d5bdfb2e7e6ba9780fc2dab1b9 by spatel
[SDAG] fold insert_vector_elt with undef index
Similar to: rG4c47617627fb
This makes the DAG behavior consistent with IR's insertelement.
https://bugs.llvm.org/show_bug.cgi?id=42689
I've tried to maintain test intent for AArch64 and WebAssembly by
replacing undef index operands with something else.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sched-past-vector-ldst.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/simd.ll
The file was modifiedllvm/test/CodeGen/X86/insertelement-var-index.ll