SuccessChanges

Summary

  1. gn build: (manually) merge d157a9bc (details)
  2. [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (details)
Commit 8aa0a785c423ebea84876b71f7b735bee96a0292 by thakis
gn build: (manually) merge d157a9bc
While here, also merge r335850 / r366396.
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
The file was addedllvm/utils/gn/secondary/llvm/lib/Transforms/CFGuard/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Commit 3da269a2489f156462fca74311842d761151393f by craig.topper
[X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors
(vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1
setcc), zero,)))
The legalization of v2i1->i2 or v4i1->i4 bitcasts followed by a setcc
can create an and after the bitcast. If we're lucky enough that the
input to the bitcast is a concat_vectors where the first operand is a
setcc that can natively 0 all the upper bits of ak-register, then we
should replace the other operands of the concat_vectors with zero in
order to remove the AND.
With the AND removed we might be able to use a kortest on the result.
Differential Revision: https://reviews.llvm.org/D69205
The file was modifiedllvm/test/CodeGen/X86/movmsk-cmp.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-and-bool.ll
The file was modifiedllvm/test/CodeGen/X86/vector-compare-any_of.ll
The file was modifiedllvm/test/CodeGen/X86/vector-compare-all_of.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-or-bool.ll