SuccessChanges

Summary

  1. [PowerPC] Clear the sideeffect bit for those instructions that didn't (details)
Commit f15cf93899df3e8863207b40c3900facb0ccc356 by 48825004
[PowerPC] Clear the sideeffect bit for those instructions that didn't
have the match pattern
If the instruction have match pattern, llvm-tblgen will infer the
sideeffect bit from the match pattern and it works well. If not, the
tblgen will set it as true that hurt the scheduling.
PowerPC has some instructions that didn't specify the match pattern(i.e.
LXSD etc), which is manually selected post-ra according to the register
pressure. We need to clear the sideeffect flag for these instructions.
Differential Revision: https://reviews.llvm.org/D69232
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/test/CodeGen/PowerPC/extract-and-store.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
The file was modifiedllvm/test/CodeGen/PowerPC/scheduling-mem-dependency.ll