SuccessChanges

Summary

  1. [LDV][RAGreedy] Inform LiveDebugVariables about new VRegs added by (details)
  2. [libomptarget] Implement target_impl for amdgcn (details)
Commit 56c22931bdfafe8257e610cb9f29b9d64478f812 by bjorn.a.pettersson
[LDV][RAGreedy] Inform LiveDebugVariables about new VRegs added by
InlineSpiller
Summary: Make sure RAGreedy informs LiveDebugVariables about new VRegs
that is introduced at spill by InlineSpiller.
Consider this example
LDV: !"var" [48r;128r):0 Loc0=%2
48B   %2 = ...
...
128B  %7 = ADD %2, ...
If %2 is spilled the InlineSpiller will insert spill/reload instructions
and introduces some new vregs. So we get
48B   %4 = ...
56B   spill %4
...
120B  reload %5
128B  %3 = ADD %5, ...
In the past we did not inform LDV about this, and when reintroducing
DBG_VALUE instruction LDV still got information that "var" had the
location of the spilled register %2 for the interval [48r;128r). The
result was bad, since we mapped "var" to the spill slot even before the
spill happened:
%4 = ...
DBG_VALUE %spill.0, !"var"
spill %4 to %spill.0
...
reload %5
%3 = ADD %5, ...
This patch will inform LDV about the interval split introduced due to
spilling. So the location map in LDV will become
!"var" [48r;56r):1 [56r;120r):0 [120r;128r):2 Loc0=%2 Loc1=%4
Loc2=%5
And when inserting DBG_VALUE instructions we get
%4 = ...
DBG_VALUE %4, !"var"
spill %4 to %spill.0
DBG_VALUE %spill.0, !"var"
...
reload %5
DBG_VALUE %5, !"var"
%3 = ADD %5, ...
Fixes: https://bugs.llvm.org/show_bug.cgi?id=38899
Reviewers: jmorse, vsk, aprantl
Reviewed By: jmorse
Subscribers: dstenb, wuzish, MatzeB, qcolombet, nemanjai, hiraditya,
jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69584
The file was modifiedllvm/lib/CodeGen/LiveDebugVariables.cpp
The file was addedllvm/test/CodeGen/PowerPC/pr38899-split-register-at-spill.mir
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit 94c59ea8ddab9bd7dd241a56c67f98c90397b732 by jonchesterfield
[libomptarget] Implement target_impl for amdgcn
Summary:
[libomptarget] Implement target_impl for amdgcn
Smallest atomic addition for a new target. Implements enough of the
amdgcn specific code that some of the source files under nvptx/src could
be compiled, without modification, to run on amdgcn.
This foreshadows a work in progress patch to move said source out of
nvptx/src. Patch based on fork at
https://github.com/ROCm-Developer-Tools/llvm-project
Reviewers: ABataev, jdoerfert, grokos, ronlieb
Subscribers: jvesely, jfb, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D69718
The file was addedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
The file was addedopenmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_interface.h
The file was modifiedopenmp/libomptarget/deviceRTLs/interface.h