1. [Scheduling][ARM] Consistently enable PostRA Machine scheduling (details)
Commit 7d9af03ff7a0d4fb6ae3ec224a0d8d7398bdbd84 by
[Scheduling][ARM] Consistently enable PostRA Machine scheduling
In the ARM backend, for historical reasons we have only some targets
using Machine Scheduling. The rest use the old list scheduler as they
are using itinaries and the list scheduler seems to produce better code
(and not crash running out of register on v6m codes). So whether to use
the MIScheduler or not is checked at runtime from the subtarget
This is fine, except for post-ra scheduling. Whether to use the old
post-ra list scheduler or the post-ra machine schedule is decided as the
pass manager is set up, in arms case from a newly constructed subtarget.
Under some situations, like LTO, this won't include the correct cpu so
can pick the wrong option. This can have a surprising effect on
To fix that, this patch overrides targetSchedulesPostRAScheduling and
addPreSched2 in the ARM backend, adding _both_ post-ra schedulers and
picking at runtime which to execute. To pick between the two I've had to
add a enablePostRAMachineScheduler() method that normally returns
enableMachineScheduler() && enablePostRAScheduler(), which can be
overridden to enable just one of PostRAMachineScheduler vs
Thanks to David Penry for the identifying this problem.
Differential Revision:
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedllvm/lib/CodeGen/TargetSubtargetInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetSubtargetInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.cpp
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-stm-wrback.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-stm.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vldm.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vstm.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.h
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-ldm.ll
The file was addedllvm/test/CodeGen/ARM/postrasched.ll
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll