SuccessChanges

Summary

  1. [Hexagon] Require PS_aligna whenever variable-sized objects are present (details)
  2. [Hexagon] Handle stack realignment in hexagon-vextract (details)
  3. [Hexagon] Convert stack object offsets to int64, NFC (details)
  4. [Hexagon] Fix vector spill expansion to use proper alignment (details)
Commit 0a58ef5eb5e1a243756f649f82834281ac3dd7ff by kparzysz
[Hexagon] Require PS_aligna whenever variable-sized objects are present
The file was modifiedllvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
Commit 67294c97fbfde6541b5f89d9d83c7fcba31c5f3b by kparzysz
[Hexagon] Handle stack realignment in hexagon-vextract
The file was modifiedllvm/lib/Target/Hexagon/HexagonVExtract.cpp
Commit e3eb10c5419d89171bc97ca21aba7c381827c45e by kparzysz
[Hexagon] Convert stack object offsets to int64, NFC
This will print [SP-56] instead of [SP+4294967240].
The file was modifiedllvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
Commit 592dd459242946593920911936aea47461e0faaa by kparzysz
[Hexagon] Fix vector spill expansion to use proper alignment
1. Add pseudos PS_vloadrv_ai and PS_vstorerv_ai: those are now used
  for single vector registers in loadRegFromStackSlot (and store...). 2.
Remove pseudos PS_vloadrwu_ai and PS_vstorerwu_ai. The alignment is
  now checked when expanding spill pseudos (both in frame lowering
  and in expand-post-ra-pseudos), and a proper instruction is generated.
3. Update MachineMemOperands when dealigning vector spill slots. 4.
Return vector predicate registers in getCallerSavedRegs.
The file was addedllvm/test/CodeGen/Hexagon/spill-vector-alignment.mir
The file was modifiedllvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonPseudo.td
The file was modifiedllvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll
The file was modifiedllvm/lib/Target/Hexagon/HexagonInstrInfo.cpp