FailedChanges

Summary

  1. [AMDGPU] Lower llvm.amdgcn.s.buffer.load.v3[i|f]32 (details)
  2. [Clang][ASTImporter] Added visibility check for ClassTemplateDecl. (details)
  3. [ARM,MVE] Add reversed isel patterns for MVE `vcmp qN,rN` (details)
Commit 02419ab5c73935bed7aef5fc43e06c6b5f37fc04 by Piotr Sobczak
[AMDGPU] Lower llvm.amdgcn.s.buffer.load.v3[i|f]32
Summary: Add lowering support for 32-bit vec3 variant of s.buffer.load
intrinsic.
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70118
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit c2f6efc732efa3921e34e24361d58e51d25460b1 by 1.int32
[Clang][ASTImporter] Added visibility check for ClassTemplateDecl.
Summary: ASTImporter makes now difference between class templates with
same name in different translation units if these are not visible
outside.
Reviewers: martong, a.sidorin, shafik
Reviewed By: martong
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, teemperor,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67543
The file was modifiedclang/unittests/AST/ASTImporterVisibilityTest.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
Commit b0c1900820c3f0a94e3c74e6dcb1317b9cda5af8 by simon.tatham
[ARM,MVE] Add reversed isel patterns for MVE `vcmp qN,rN`
Summary: As well as vector/vector compare instructions, MVE also has a
family of comparisons taking a vector and a scalar, which compare every
lane of the vector against the same value. We generate those at isel
time using isel patterns that match `(ARMvcmp vector, (ARMvdup
scalar))`.
This commit adds corresponding patterns for the operand-reversed form
`(ARMvcmp (ARMvdup scalar), vector)`, with condition codes swapped as
necessary. That way, we can still generate the vector/scalar compare
instruction if the IR happens to have been rearranged to put the
operands the other way round, which can happen in some optimization
phases. Previously, a vcmp the other way round was handled by emitting a
`vdup` instruction to //explicitly// replicate the scalar input into a
vector, and then doing a vector/vector comparison.
I haven't added a new test, because it turned out that several existing
tests were already exhibiting that failure mode. So just updating the
expected output in the existing MVE codegen tests demonstrates what's
been improved.
Reviewers: ostannard, MarkMurrayARM, dmgreen
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70296
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-and.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpr.ll