SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [DebugInfo] - Fix typo in comment. NFC. (details)
  2. [StackSafety] Ignore some use of values (details)
  3. [StackSafety] Fix formatting in the test (details)
  4. [StackSafety] Bailout on some function calls (details)
  5. [GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands (details)
  6. [X86][SSE] Convert PTEST to MOVMSK for allsign bits vector results (details)
  7. VPlanValue.h - reduce unnecessary includes to forward declarations. NFC. (details)
  8. [lldb] Don't complete ObjCInterfaceDecls in ClangExternalASTSourceCallbacks::FindExternalVisibleDeclsByName (details)
  9. [llvm-readobj] - Do not skip building of the GNU hash table histogram. (details)
  10. DOTGraphTraitsPass.h - remove unnecessary includes. NFC. (details)
  11. ArchiveWriter.h - remove unnecessary includes. NFC. (details)
  12. [llvm-readelf] - Split GNUStyle<ELFT>::printHashHistogram. NFC. (details)
  13. [SimpleLoopUnswitch] Drop uses of instructions before block deletion (details)
  14. [LAA] We only need pointer checks if there are non-zero checks (NFC). (details)
  15. Revert "[LAA] We only need pointer checks if there are non-zero checks (NFC)." (details)
  16. [LAA] We only need pointer checks if there are non-zero checks (NFC). (details)
  17. [NFC] Updating tests (details)
  18. [lldb] Fix a potential bug that may cause assert failure in CommandObject::CheckRequirements (details)
  19. [ARM] Fix rewrite of frame index in Thumb2's address mode i8s4 (details)
  20. [lldb] Tab completion for process plugin name (details)
  21. [Alignment] Fix misaligned interleaved loads (details)
  22. Update release notes with porting guide for AST Matchers (details)
  23. [CodeGen][BFloat] Add bfloat MVT type (details)
  24. ObjCARCInstKind.h - remove unused includes. NFC. (details)
  25. ObjectFile.h - reduce unnecessary includes to forward declarations. NFC. (details)
  26. [IR] add set function for FMF 'contract' (details)
  27. AMDGPU: Fix backwards s_cselect_* operands (details)
  28. [UnJ] Update LI for inner nested loops (details)
  29. [IR][BFloat] add BFloat IR intrinsics support (details)
  30. [llvm-readobj] - Do not crash when an invalid .eh_frame_hdr is dumped using --unwind. (details)
  31. [compiler-rt][asan] Add noinline to use-after-scope testcases (details)
  32. [mlir] SCF: provide function_ref builders for IfOp (details)
  33. [AArch64][BFloat] basic AArch64 bfloat support (details)
  34. tsan: fix false positives in AcquireGlobal (details)
  35. [AArch64][BFloat] add BFloat instruction support for AArch64 (details)
  36. Revert "[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm" (details)
  37. SpecialCaseList.h - reduce unnecessary includes to forward declarations. NFC. (details)
  38. Add support for UnaryOperator in SyntaxTree (details)
  39. [FileCheck] Allow parenthesized expressions (details)
  40. [OPENMP50]Initial support for use_device_addr clause. (details)
  41. [mlir] Add simple generator for return types (details)
  42. CoverageFilters.h - reduce unnecessary includes to forward declarations. NFC. (details)
  43. Fix Darwin 'constinit thread_local' variables. (details)
  44. Fix warning `-Wpedantic`. NFC. (details)
  45. [VFABI] Fix parsing of uniform parameters that shouldn't expect step or positional data. (details)
  46. Start migrating away from statepoint's inline length prefixed argument bundles (details)
  47. [MLIR] [OpenMP] Add basic OpenMP parallel operation (details)
  48. [gn build] (manually) port dedaf3a2ac5 (details)
  49. [DDG] Data Dependence Graph - Add query function for memory dependencies between two nodes (details)
  50. [gn build] Port 0d20ed664ff (details)
  51. [CodeGen] fix typo `def nxv1bf32` -> `def nxv1f32` (details)
  52. [mlir][spirv] Lower allocation/deallocations of workgroup memory. (details)
  53. [X86] Assemble movzb 1280(%rbx, %r12), %r12 after D80608 (details)
  54. [lldb] Make order of completions for expressions deterministic and sorted by Clang's priority values. (details)
  55. AMDGPU: Fix dropping MI flags when rewriting instructions (details)
  56. [lldb/Reproducers] Skip API logging in the DUMMY macro (details)
  57. [clangd] Add access specifier information to hover contents (details)
  58. [Driver] Support -fsanitize=shadow-call-stack on aarch64_be (details)
  59. AMDGPU: Set StackPointerRegisterToSaveRestore (details)
  60. [NFC][XCOFF][AIX] Return function entry point symbol with dedicate function (details)
  61. [Driver] Support -fsanitize=shadow-call-stack and cfi-icall on aarch64_be (details)
  62. [CodeMoverUtils] Use dominator tree level to decide the direction of (details)
  63. [mlir] [VectorOps] Add 'vector.flat_transpose' operation (details)
  64. [PowerPC] Add support for -mcpu=pwr10 in both clang and llvm (details)
  65. [BPF] simplify zero extension with MOV_32_64 (details)
  66. AMDGPU: Start adding MODE register uses to instructions (details)
  67. [InstCombine] add tests for vector demanded elements of select condition; NFC (details)
  68. [llvm]NFC] Simplify ProfileSummaryInfo state transitions (details)
  69. [X86] Restore selection of MULX on BMI2 targets. (details)
  70. [lldb/Test] Generate YAML binary in build directory (details)
  71. [lldb/Reproducers] Skip tests relying on timeouts (details)
  72. Also cache negative results in GetXcodeSDKPath (NFC) (details)
  73. [AMDGPU] Fix for the lost CarryOut/CarryIn register operands in S_ADD/SUB_CO_PSEUDO. (details)
  74. tsan: fix test in debug mode (details)
  75. [GlobalISel] Don't combine instructions which are fed by memory instructions. (details)
  76. Fix `-Wpedantic` warning. NFC. (details)
  77. [mlir][Linalg] Fix build failure from D80188 (details)
  78. [mlir] Fix RunnerUtils template specialization (details)
  79. [TargetPassConfig] Add CanonicalizeFreezeInLoops before LSR (details)
  80. Remove error-prone mlir::ExecutionEngine::invoke overload. (details)
  81. [StackSafety] Bailout more aggressively (details)
  82. [NFC,StackSafety] Rename some variables (details)
  83. Refactor argument attribute specification in intrinsic definition. NFC. (details)
  84. Enable `align <n>` to be used in the intrinsic definition. (details)
  85. [llvm] Add function feature extraction analysis (details)
  86. [mlir][core] Add IndexElementsAttr helpers. (details)
  87. [mlir][shape] Use IndexElementsAttr in Shape dialect. (details)
  88. [lldb/Reproducers] Differentiate active and passive replay unexpected packet. (details)
  89. [lldb/Reproducers] Skip & add FIXME to tests failing with unexpected packet. (details)
  90. [NFC] Reformat TEST_FOO macros in test_macros.h (details)
  91. Fix a use-after-free in GetXcodeSDKPath (details)
  92. [mlir][Linalg] Add missing library linkage for shared library builds. (details)
  93. Fix Windows command line bug when last token in response file is "" (details)
  94. Fix shared libs build break introduced in rG98ef93eabd76 (details)
Commit 84c643358691b8057199e8c8597428ad0d960786 by grimar
[DebugInfo] - Fix typo in comment. NFC.

I've forgot to address this bit when landed D80476.
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
Commit b101c6251a9bce8dc11f47bce70ee169e9fe5bfe by Vitaly Buka
[StackSafety] Ignore some use of values

We should ignore value used in MemTransferInst
as other then src/dst argument.
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 06a07dd6080c72ca886cc7bb21beef2a372d94cf by Vitaly Buka
[StackSafety] Fix formatting in the test
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
Commit f6383643d9e84a139f68cbe19fa16d4969d20d5c by Vitaly Buka
[StackSafety] Bailout on some function calls

Don't miss values used in calls outside regular argument list.
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit f2fad3f703aa20cc7b452bdf1605cb46eb960653 by konstantin.schwarz
[GlobalISel][InlineAsm] Add missing EarlyClobber flag to inline asm output operands

Summary:
Previously, we only added early-clobber flags to the 'group' immediate flag operand
of an inline asm operand.
However, we also have to add the EarlyClobber flag to the MachineOperand itself.

This fixes PR46028

Reviewers: arsenm, leonardchan

Reviewed By: arsenm, leonardchan

Subscribers: phosek, wdng, rovka, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80467
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
Commit 410667f1b74c614d9382f180d29f5aa1e42cc5c9 by llvm-dev
[X86][SSE] Convert PTEST to MOVMSK for allsign bits vector results

If we are using PTEST to check 'allsign bits' vector elements we can use MOVMSK to extract the signbits directly and perform the comparison on the scalar value.

For vXi16 cases, as we don't have a MOVMSK for this type, we must mask each signbit out of a PMOVMSKB v2Xi8 result, which folds into the TEST comparison.

If this allows us to remove a vector op (via the SimplifyMultipleUseDemandedBits call) this is consistently faster than a PTEST (https://godbolt.org/z/ziJUst).

I'm investigating whether we ever get regressions without the SimplifyMultipleUseDemandedBits call, even if this means we don't remove a vector op, but that has exposed some other poor codegen issues that I'm still investigating and would have to wait for a later patch.

Suggested on PR42035 to avoid unnecessary ashr(x,bw-1)/pcmpgt(0,x) sign splat patterns feeding into ptest.

Differential Revision: https://reviews.llvm.org/D80563
The file was modifiedllvm/test/CodeGen/X86/combine-ptest.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 35963f6d8519d7384c9040d629cbb4cf6ff96de8 by llvm-dev
VPlanValue.h - reduce unnecessary includes to forward declarations. NFC.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h
Commit 019bd6485c52a62c008eacfdf0d13a26ca6b0a6f by Raphael Isemann
[lldb] Don't complete ObjCInterfaceDecls in ClangExternalASTSourceCallbacks::FindExternalVisibleDeclsByName

Summary:
For ObjCInterfaceDecls, LLDB iterates over the `methods` of the interface in FindExternalVisibleDeclsByName
since commit ef423a3ba57045f80b0fcafce72121449a8b54d4 .
However, when LLDB calls `oid->methods()` in that function, Clang will pull in all declarations in the current
DeclContext from the current ExternalASTSource (which is again, `ClangExternalASTSourceCallbacks`). The
reason for that is that `methods()` is just a wrapper for `decls()` which is supposed to provide a list of *all*
(both currently loaded and external) decls in the DeclContext.

However, `ClangExternalASTSourceCallbacks::FindExternalLexicalDecls` doesn't implement support for ObjCInterfaceDecl,
so we don't actually add any declarations and just mark the ObjCInterfaceDecl as having no ExternalLexicalStorage.

As LLDB uses the ExternalLexicalStorage to see if it can complete a type with the ExternalASTSource, this causes
that LLDB thinks our class can't be completed any further by the ExternalASTSource
and will from on no longer make any CompleteType/FindExternalLexicalDecls calls to that decl. This essentially
renders those types unusable in the expression parser as they will always be considered incomplete.

This patch just changes the call to `methods` (which is just a `decls()` wrapper), to some ad-hoc `noload_methods`
call which is wrapping `noload_decls()`. `noload_decls()` won't trigger any calls to the ExternalASTSource, so
this prevents that ExternalLexicalStorage will be set to false.

The test for this is just adding a method to an ObjC interface. Before this patch, this unset the ExternalLexicalStorage
flag and put the interface into the state described above.

In a normal user session this situation was triggered by setting a breakpoint in a method of some ObjC class. This
caused LLDB to create the MethodDecl for that specific method and put it into the the ObjCInterfaceDecl.
Also `ObjCLanguageRuntime::LookupInCompleteClassCache` needs to be unable to resolve the type do
an actual definition when the breakpoint is set (I'm not sure how exactly this can happen, but we just
found no Type instance that had the `TypePayloadClang::IsCompleteObjCClass` flag set in its payload in
the situation where this happens. This however doesn't seem to be a regression as logic wasn't changed
from what I can see).

The module-ownership.mm test had to be changed as the only reason why the ObjC interface in that test had
it's ExternalLexicalStorage flag set to false was because of this unintended side effect. What actually happens
in the test is that ExternalLexicalStorage is first set to false in `DWARFASTParserClang::CompleteTypeFromDWARF`
when we try to complete the `SomeClass` interface, but is then the flag is set back to true once we add
the last ivar of `SomeClass` (see `SetMemberOwningModule` in `TypeSystemClang.cpp` which is called
when we add the ivar). I'll fix the code for that in a follow-up patch.

I think some of the code here needs some rethinking. LLDB and Clang shouldn't infer anything about the ExternalASTSource
and its ability to complete the current type form the `ExternalLexicalStorage` flag. We probably should
also actually provide any declarations when we get asked for the lexical decls of an ObjCInterfaceDecl. But both of those
changes are bigger (and most likely would cause us to eagerly complete more types), so those will be follow up patches
and this patch just brings us back to the state before commit ef423a3ba57045f80b0fcafce72121449a8b54d4 .

Fixes rdar://63584164

Reviewers: aprantl, friss, shafik

Reviewed By: aprantl, shafik

Subscribers: arphaman, abidh, JDevlieghere

Differential Revision: https://reviews.llvm.org/D80556
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/module-ownership.mm
The file was modifiedlldb/unittests/Symbol/TestTypeSystemClang.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExternalASTSourceCallbacks.cpp
Commit fc98447af65f5a51d3b62a7e76a056d2556be59d by grimar
[llvm-readobj] - Do not skip building of the GNU hash table histogram.

When the `--elf-hash-histogram` is used, the code first tries to build
a histogram for the .hash table and then for the .gnu.hash table.

The problem is that dumper might return early when unable or do not need to
build a histogram for the .hash.

This patch reorders the code slightly to fix the issue and adds a test case.

Differential revision: https://reviews.llvm.org/D80204
The file was modifiedllvm/test/tools/llvm-readobj/ELF/hash-histogram.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit 8062602810fed6fe377deabe8abd563a0c5d1809 by llvm-dev
DOTGraphTraitsPass.h - remove unnecessary includes. NFC.
The file was modifiedllvm/include/llvm/Analysis/DOTGraphTraitsPass.h
Commit 1e9462a201c3a09612e7fe8d56a0be0829e99dcf by llvm-dev
ArchiveWriter.h - remove unnecessary includes. NFC.
The file was modifiedllvm/include/llvm/Object/ArchiveWriter.h
Commit d804b334ed0f1c88b90ab028541582e35ba3c172 by grimar
[llvm-readelf] - Split GNUStyle<ELFT>::printHashHistogram. NFC.

As was mentioned in review comments for D80204,
`printHashHistogram` has 2 lambdas that are probably too large
and deserves splitting into member functions.

This patch does it.

Differential revision: https://reviews.llvm.org/D80546
The file was modifiedllvm/tools/llvm-readobj/llvm-readobj.cpp
The file was modifiedllvm/tools/llvm-readobj/ObjDumper.h
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit 706b22e3e446621b20befe1094c26e4eda133bc9 by suc-daniil
[SimpleLoopUnswitch] Drop uses of instructions before block deletion

Currently if instructions defined in a block are used in unreachable
blocks and SimpleLoopUnswitch attempts deleting the block, it triggers
assertion "Uses remain when a value is destroyed!".
This patch fixes it by replacing all uses of instructions from BB with
undefs before BB deletion.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D80551
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/dead-blocks-uses-in-unreachablel-blocks.ll
Commit 259abfc7cbc11cd98c05b1eb8e4b3fb6a9664bc0 by flo
[LAA] We only need pointer checks if there are non-zero checks (NFC).

If it turns out that we can do runtime checks, but there are no
runtime-checks to generate, set RtCheck.Need to false.

This can happen if we can prove statically that the pointers passed in
to canCheckPtrAtRT do not alias. This should not change any results, but
allows us to skip some work and assert that runtime checks are
generated, if LAA indicates that runtime checks are required.

Reviewers: anemet, Ayal

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D79969
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 2d0389821e0c6371823198d3a5b1f032138a40bb by flo
Revert "[LAA] We only need pointer checks if there are non-zero checks (NFC)."

This reverts commit 259abfc7cbc11cd98c05b1eb8e4b3fb6a9664bc0.

Reverting this, as I missed a case where we return without setting
RtCheck.Need.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
Commit 9b507b2127f116f29437e04a187cdca70ae9aa33 by flo
[LAA] We only need pointer checks if there are non-zero checks (NFC).

If it turns out that we can do runtime checks, but there are no
runtime-checks to generate, set RtCheck.Need to false.

This can happen if we can prove statically that the pointers passed in
to canCheckPtrAtRT do not alias. This should not change any results, but
allows us to skip some work and assert that runtime checks are
generated, if LAA indicates that runtime checks are required.

Reviewers: anemet, Ayal

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D79969

Note: This is a recommit of 259abfc7cbc11cd98c05b1eb8e4b3fb6a9664bc0,
with some suggested renaming.
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 6e1eff785892edb75948f3c0a18e01ef8fbe2619 by gchatelet
[NFC] Updating tests

Summary:
Updating IR now that alignment is explicitly set.
This is a prerequisite to D80276.

Reviewers: efriedma

Subscribers: llvm-commits, craig.topper

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80549
The file was modifiedllvm/test/Transforms/InterleavedAccess/X86/interleavedStore.ll
The file was modifiedllvm/test/Transforms/InterleavedAccess/X86/interleavedLoad.ll
The file was modifiedllvm/test/Transforms/InterleavedAccess/X86/interleaved-accesses-64bits-avx.ll
Commit 18bb1f1067028fbeaf92774e640bd865c53e1ce1 by Raphael Isemann
[lldb] Fix a potential bug that may cause assert failure in CommandObject::CheckRequirements

Summary: `CommandObject::CheckRequirements` requires cleaning up `m_exe_ctx`
between commands. Function `HandleOptionCompletion` returns without cleaning up
`m_exe_ctx` could cause assert failure in later `CheckRequirements`.

Reviewers: teemperor, JDevlieghere

Reviewed By: teemperor

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D80447
The file was modifiedlldb/source/Interpreter/CommandObject.cpp
Commit c7593b0f0d28f6b7f9fa4557ce73197a49b37799 by victor.campos
[ARM] Fix rewrite of frame index in Thumb2's address mode i8s4

Summary:
In Thumb2's frame index rewriting process, the address mode i8s4, which
is used by LDRD and STRD instructions, is handled by taking the
immediate offset operand and multiplying it by 4.

This behaviour is wrong, however. In this specific address mode, the
MachineInstr's immediate operand is already in the expected form. By
consequence of that, multiplying it once more by 4 yields a flawed
offset value, four times greater than it should be.

Differential Revision: https://reviews.llvm.org/D80557
The file was addedllvm/test/CodeGen/Thumb2/frame-index-addrmode-t2i8s4.mir
The file was modifiedllvm/lib/Target/ARM/Thumb2InstrInfo.cpp
Commit 763bc2305797c980a4f4fa2f6314ed78a010678d by Raphael Isemann
[lldb] Tab completion for process plugin name

Summary:

1. Added tab completion to `process launch -p`, `process attach -P`, `process
connect -p`;

2. Bound the plugin name common completion as the default completion for
`eArgTypePlugin` arguments.

Reviewers: teemperor, JDevlieghere

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D79929
The file was modifiedlldb/source/Commands/CommandCompletions.cpp
The file was modifiedlldb/source/Interpreter/CommandObject.cpp
The file was modifiedlldb/include/lldb/Interpreter/CommandCompletions.h
The file was modifiedlldb/source/Core/PluginManager.cpp
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py
The file was modifiedlldb/source/Commands/CommandObjectProcess.cpp
The file was modifiedlldb/include/lldb/Core/PluginManager.h
Commit 5b84ee4f61419b9a911ce75b4bc1c5cc7de1d0d6 by gchatelet
[Alignment] Fix misaligned interleaved loads

Summary: Tentatively fixing https://bugs.llvm.org/show_bug.cgi?id=45957

Reviewers: craig.topper, nlopes

Subscribers: hiraditya, llvm-commits, RKSimon, jdoerfert, efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80276
The file was modifiedllvm/lib/Target/X86/X86InterleavedAccess.cpp
The file was modifiedllvm/test/Transforms/InterleavedAccess/X86/interleavedLoad.ll
Commit 63f927b17a1ce18cb922c441ffc0691a71d550b8 by steveire
Update release notes with porting guide for AST Matchers
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 0508fb45dfbc3ffde6bacc1e52177f3972a3eb99 by ties.stuij
[CodeGen][BFloat] Add bfloat MVT type

Summary:
This patch adds BFloat MVT support. It also adds fixed and scalable vector MVT
types for BFloat.

This patch is part of a series that adds support for the Bfloat16 extension of the Armv8.6-a architecture, as
detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: aemerson, huntergr, craig.topper, fpetrogalli, sdesmalen, LukeGeeson, ostannard

Reviewed By: ostannard

Subscribers: LukeGeeson, pbarrio, dschuff, kristof.beyls, hiraditya, aheejin, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79706
The file was modifiedllvm/lib/CodeGen/ValueTypes.cpp
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.td
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
Commit ae07fabf6a705b7eb91e801d7735bda4a319567c by llvm-dev
ObjCARCInstKind.h - remove unused includes. NFC.
The file was modifiedllvm/include/llvm/Analysis/ObjCARCInstKind.h
Commit 0865d41492a7f2e8ca8ab70cb3baa121b747e9a7 by llvm-dev
ObjectFile.h - reduce unnecessary includes to forward declarations. NFC.

Fix SubtargetFeature.h include dependency in XCOFFObjectFile.cpp
The file was modifiedllvm/include/llvm/Object/ObjectFile.h
The file was modifiedllvm/lib/Object/XCOFFObjectFile.cpp
Commit 2ee4ec6b6f6d0571288db69b824f6773717d2cf7 by spatel
[IR] add set function for FMF 'contract'

This was missed when the flag was added with D31164.
The file was modifiedllvm/lib/IR/Instruction.cpp
The file was modifiedllvm/include/llvm/IR/Instruction.h
Commit 833996cef1381115b0077ab5694e189463f5d02e by Matthew.Arsenault
AMDGPU: Fix backwards s_cselect_* operands

The vector equivalent has backwards operands, but the scalar version
does not. The passes that use these hooks aren't enabled by default,
so this doesn't really change anything.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/early-if-convert.ll
Commit 70d4a202995315c77d7daec9f332a6ceda84efc9 by david.green
[UnJ] Update LI for inner nested loops

This makes sure to correctly register the loop info of the children
of unroll and jammed loops. It re-uses some code from the unroller for
registering subloops.

Differential Revision: https://reviews.llvm.org/D80619
The file was addedllvm/test/Transforms/LoopUnrollAndJam/innerloop.ll
The file was modifiedllvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
Commit ad5d319ee85d31ee2b1ca5c29b3a10b340513fec by ties.stuij
[IR][BFloat] add BFloat IR intrinsics support

Summary:
This patch is part of a series that adds support for the Bfloat16 extension of
the Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: scanon, fpetrogalli, sdesmalen, craig.topper, LukeGeeson

Reviewed By: fpetrogalli

Subscribers: LukeGeeson, pbarrio, kristof.beyls, hiraditya, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79707
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/include/llvm/IR/Intrinsics.h
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/IR/Function.cpp
The file was modifiedllvm/utils/TableGen/IntrinsicEmitter.cpp
Commit 4ab03e62fd040efdbde4b6c310e5abbda5363abd by grimar
[llvm-readobj] - Do not crash when an invalid .eh_frame_hdr is dumped using --unwind.

When the p_offset/p_filesz of the PT_GNU_EH_FRAME is invalid
(e.g larger than the file size) then llvm-readobj might crash.

This patch fixes the issue. I've introduced `ELFFile<ELFT>::getSegmentContent`
method, which is very similar to `ELFFile<ELFT>::getSectionContentsAsArray` one.

Differential revision: https://reviews.llvm.org/D80380
The file was modifiedllvm/tools/llvm-readobj/DwarfCFIEHPrinter.h
The file was modifiedllvm/include/llvm/Object/ELF.h
The file was modifiedllvm/test/tools/llvm-readobj/ELF/unwind.test
Commit 5ee902bb5f3a843230f45dcd7b8101de71da7c83 by Jinsong Ji
[compiler-rt][asan] Add noinline to use-after-scope testcases

Some testcases are unexpectedly passing with NPM.
This is because the target functions are inlined in NPM.

I think we should add noinline attribute to keep these test points.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D79648
The file was modifiedcompiler-rt/test/asan/TestCases/use-after-scope-temp2.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/use-after-scope-dtor-order.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/use-after-scope-temp.cpp
Commit cadb7ccf2cebcaa2d546db77223bde3d69a162af by zinenko
[mlir] SCF: provide function_ref builders for IfOp

Now that OpBuilder is available in `build` functions, it becomes possible to
populate the "then" and "else" regions directly when building the "if"
operation. This is desirable in more structured forms of builders, especially
in when conditionals are mixed with loops. Provide new `build` APIs taking
callbacks for body constructors, similarly to scf::ForOp, and replace more
clunky edsc::BlockBuilder uses with these. The original APIs remain available
and go through the new implementation.

Differential Revision: https://reviews.llvm.org/D80527
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
The file was modifiedmlir/include/mlir/Dialect/SCF/EDSC/Builders.h
The file was modifiedmlir/lib/Dialect/SCF/EDSC/Builders.cpp
The file was modifiedmlir/include/mlir/Dialect/SCF/SCF.h
The file was modifiedmlir/include/mlir/Dialect/SCF/SCFOps.td
Commit 42eba9b40b25cceeb3e6d432047c5ef99d4a7b50 by ties.stuij
[AArch64][BFloat] basic AArch64 bfloat support

Summary:
This patch adds the bfloat type to the AArch64 backend:
- adds it as part of the FPR16 register class
- adds bfloat calling conventions
- as f16 is now not the only FPR16 type anymore, we need to constrain a number
  of instruction patterns using FPR16Op to help out the TableGen type inferrer

This patch is part of a series implementing the Bfloat16 extension of the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: t.p.northover, c-rhodes, fpetrogalli, sdesmalen, ostannard, LukeGeeson, ab

Reviewed By: fpetrogalli

Subscribers: pbarrio, LukeGeeson, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79709
The file was modifiedllvm/lib/Target/AArch64/AArch64CallingConvention.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.td
Commit 4408eeed0ff191304121c11168aa1db861cccb97 by dvyukov
tsan: fix false positives in AcquireGlobal

Add ThreadClock:: global_acquire_ which is the last time another thread
has done a global acquire of this thread's clock.

It helps to avoid problem described in:
https://github.com/golang/go/issues/39186
See test/tsan/java_finalizer2.cpp for a regression test.
Note the failuire is _extremely_ hard to hit, so if you are trying
to reproduce it, you may want to run something like:
$ go get golang.org/x/tools/cmd/stress
$ stress -p=64 ./a.out

The crux of the problem is roughly as follows.
A number of O(1) optimizations in the clocks algorithm assume proper
transitive cumulative propagation of clock values. The AcquireGlobal
operation may produce an inconsistent non-linearazable view of
thread clocks. Namely, it may acquire a later value from a thread
with a higher ID, but fail to acquire an earlier value from a thread
with a lower ID. If a thread that executed AcquireGlobal then releases
to a sync clock, it will spoil the sync clock with the inconsistent
values. If another thread later releases to the sync clock, the optimized
algorithm may break.

The exact sequence of events that leads to the failure.
- thread 1 executes AcquireGlobal
- thread 1 acquires value 1 for thread 2
- thread 2 increments clock to 2
- thread 2 releases to sync object 1
- thread 3 at time 1
- thread 3 acquires from sync object 1
- thread 1 acquires value 1 for thread 3
- thread 1 releases to sync object 2
- sync object 2 clock has 1 for thread 2 and 1 for thread 3
- thread 3 releases to sync object 2
- thread 3 sees value 1 in the clock for itself
  and decides that it has already released to the clock
  and did not acquire anything from other threads after that
  (the last_acquire_ check in release operation)
- thread 3 does not update the value for thread 2 in the clock from 1 to 2
- thread 4 acquires from sync object 2
- thread 4 detects a false race with thread 2
  as it should have been synchronized with thread 2 up to time 2,
  but because of the broken clock it is now synchronized only up to time 1

The global_acquire_ value helps to prevent this scenario.
Namely, thread 3 will not trust any own clock values up to global_acquire_
for the purposes of the last_acquire_ optimization.

Reviewed-in: https://reviews.llvm.org/D80474
Reported-by: nvanbenschoten (Nathan VanBenschoten)
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_clock.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_clock.h
The file was addedcompiler-rt/test/tsan/java_finalizer2.cpp
Commit 78bd0c0e5e8fbbfbb9f827bdd1f83f91ed3437fa by ties.stuij
[AArch64][BFloat] add BFloat instruction support for AArch64

Summary:
Add support for lowering various BFloat related SelDAG nodes:
- load/store (ldrh/strh)
- concat
- dup/duplane
- bitconvert/bitcast
- insert_subvector/insert_subreg

This patch is part of a series implementing the Bfloat16 extension of the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: ab, t.p.northover, john.brawn, fpetrogalli, sdesmalen, LukeGeeson

Reviewed By: fpetrogalli

Subscribers: LukeGeeson, pbarrio, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79712
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was addedllvm/test/CodeGen/AArch64/bf16-vector-bitcast.ll
The file was addedllvm/test/CodeGen/AArch64/bf16.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
The file was addedllvm/test/CodeGen/AArch64/bf16-vector-shuffle.ll
Commit 559845f8fe53fabb22f9a392e8d34761df250c72 by lei
Revert "[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm"

This reverts commit 7eb666b1556b86503f2f386bf921186cdbb2d22a.
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/test/CodeGen/PowerPC/check-cpu.ll
The file was modifiedclang/lib/Driver/ToolChains/Arch/PPC.cpp
The file was modifiedclang/test/Preprocessor/init-ppc64.c
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
Commit b5b00877221ec7817b9de9cd65571e1c05e80145 by llvm-dev
SpecialCaseList.h - reduce unnecessary includes to forward declarations. NFC.

Remove Regex forward declaration as we already require the Regex.h include.

Add missing VirtualFileSystem.h include to dependent source files.
The file was modifiedclang/lib/Driver/XRayArgs.cpp
The file was modifiedclang/lib/Driver/SanitizerArgs.cpp
The file was modifiedllvm/include/llvm/Support/SpecialCaseList.h
Commit 461af57de78155ee5d1dc1969b81dd019d228538 by gribozavr
Add support for UnaryOperator in SyntaxTree

Reviewers: gribozavr2

Reviewed By: gribozavr2

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80624
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
The file was modifiedclang/lib/Tooling/Syntax/Nodes.cpp
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/Nodes.h
Commit 3be5e53f208d63135bb4e8499abdc1ac8a2b3266 by Alexander.Richardson
[FileCheck] Allow parenthesized expressions

With this change it is be possible to write FileCheck expressions such
as [[#(VAR+1)-2]]. Currently, the only supported arithmetic operators are
plus and minus, so this is not particularly useful yet. However, it our
CHERI fork we have tests that benefit from having multiplication in
FileCheck expressions. Allowing parenthesized expressions is the simplest
way for us to work around the current lack of operator precedence in
FileCheck expressions.

Reviewed By: thopre, jhenderson
Differential Revision: https://reviews.llvm.org/D77383
The file was modifiedllvm/test/FileCheck/numeric-expression.txt
The file was modifiedllvm/lib/Support/FileCheckImpl.h
The file was modifiedllvm/unittests/Support/FileCheckTest.cpp
The file was modifiedllvm/docs/CommandGuide/FileCheck.rst
The file was modifiedllvm/lib/Support/FileCheck.cpp
Commit a888fc6b3412574f5869a8680acf4ed2bed1d2a2 by a.bataev
[OPENMP50]Initial support for use_device_addr clause.

Summary:
Added parsing/sema analysis/serialization support for use_device_addr
clauses.

Reviewers: jdoerfert

Subscribers: yaxunl, guansong, arphaman, sstefan1, llvm-commits, cfe-commits, caomhin

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80404
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPKinds.def
The file was modifiedclang/test/OpenMP/target_map_messages.cpp
The file was modifiedclang/tools/libclang/CIndex.cpp
The file was modifiedclang/include/clang/AST/OpenMPClause.h
The file was modifiedclang/lib/Parse/ParseOpenMP.cpp
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was removedclang/test/OpenMP/target_data_use_device_ptr_ast_print.cpp
The file was modifiedclang/lib/AST/OpenMPClause.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedclang/test/OpenMP/target_teams_map_messages.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was addedclang/test/OpenMP/target_data_use_device_ptr_addr_ast_print.cpp
The file was modifiedclang/lib/Basic/OpenMPKinds.cpp
The file was modifiedclang/lib/AST/StmtProfile.cpp
The file was removedclang/test/OpenMP/target_data_use_device_ptr_messages.cpp
The file was modifiedclang/test/OpenMP/target_data_messages.c
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was addedclang/test/OpenMP/target_data_use_device_ptr_addr_messages.cpp
Commit 31f40f603d0c00b313397196124c5f39090badf0 by jpienaar
[mlir] Add simple generator for return types

Take advantage of equality constrains to generate the type inference interface.
This is used for equality and trivially built types. The type inference method
is only generated when no type inference trait is specified already.

This reorders verification that changes some test error messages.

Differential Revision: https://reviews.llvm.org/D80484
The file was modifiedmlir/lib/TableGen/Attribute.cpp
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/include/mlir/TableGen/Attribute.h
The file was modifiedmlir/test/mlir-tblgen/types.mlir
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/test/mlir-tblgen/op-decl.td
The file was modifiedmlir/lib/TableGen/Operator.cpp
The file was modifiedmlir/include/mlir/TableGen/Operator.h
Commit 6022efb0e9cbb350f7b690acd0cfa4b87b1dfe87 by llvm-dev
CoverageFilters.h - reduce unnecessary includes to forward declarations. NFC.
The file was modifiedllvm/tools/llvm-cov/CoverageFilters.cpp
The file was modifiedllvm/tools/llvm-cov/CoverageFilters.h
The file was modifiedllvm/tools/llvm-cov/CodeCoverage.cpp
Commit aca3d067efe194539efd1e0fcf03820a2c377753 by jyknight
Fix Darwin 'constinit thread_local' variables.

Unlike other platforms using ItaniumCXXABI, Darwin does not allow the
creation of a thread-wrapper function for a variable in the TU of
users. Because of this, it can set the linkage of the thread-local
symbol to internal, with the assumption that no TUs other than the one
defining the variable will need it.

However, constinit thread_local variables do not require the use of
the thread-wrapper call, so users reference the variable
directly. Thus, it must not be converted to internal, or users will
get a link failure.

This was a regression introduced by the optimization in
00223827a952f66e7426c9881a2a4229e59bb019.

Differential Revision: https://reviews.llvm.org/D80417
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/test/CodeGenCXX/cxx2a-thread-local-constinit.cpp
Commit b0404681171d8cfebdb1f439f45aeb1001321eb7 by michael.hliao
Fix warning `-Wpedantic`. NFC.
The file was modifiedllvm/include/llvm/Support/SpecialCaseList.h
Commit 495f18292b2bc90a162b79d187c6d14ecfbe98f9 by paul.walker
[VFABI] Fix parsing of uniform parameters that shouldn't expect step or positional data.

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80575
The file was modifiedllvm/unittests/Analysis/VectorFunctionABITest.cpp
The file was modifiedllvm/lib/Analysis/VFABIDemangling.cpp
Commit 1af3705c7fe23db9d5308bfdf07bfbd04398b895 by listmail
Start migrating away from statepoint's inline length prefixed argument bundles

In the current statepoint design, we have four distinct groups of operands to the call: call args, gc transition args, deopt args, and gc args. This format prexisted the support in IR for operand bundles and was in fact one of the inspirations for the extension. However, we never went back and rearchitected statepoints to fully leverage bundles.

This change is the first in a small sequence to do so. All this does is extend the SelectionDAG lowering code to allow deopt and gc transition operands to be specified in either inline argument bundles or operand bundles.

Differential Revision: https://reviews.llvm.org/D8059
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/test/CodeGen/X86/statepoint-gctransition-call-lowering.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/statepoint-regs.ll
Commit 5ba874e4724e72838dfbb3e4b40392e0b24cc6f4 by david.truby
[MLIR] [OpenMP] Add basic OpenMP parallel operation

Summary:
This includes a basic implementation for the OpenMP parallel
operation without a custom pretty-printer and parser.
The if, num_threads, private, shared, first_private, last_private,
proc_bind and default clauses are included in this implementation.

Currently the reduction clause is omitted as it is more complex and
requires analysis to see if we can share implementation with the loop
dialect. The allocate clause is also omitted.

A discussion about the design of this operation can be found here:
https://llvm.discourse.group/t/openmp-parallel-operation-design-issues/686

The current OpenMP Specification can be found here:
https://www.openmp.org/wp-content/uploads/OpenMP-API-Specification-5.0.pdf

Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>

Reviewers: jdoerfert

Subscribers: mgorny, yaxunl, kristof.beyls, guansong, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, frgossen, Kayjukh, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79410
The file was modifiedmlir/test/Dialect/OpenMP/ops.mlir
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
The file was modifiedmlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
Commit 4f0eba28eba873de402d9742d62fcae89f4c2363 by thakis
[gn build] (manually) port dedaf3a2ac5
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Commit 0d20ed664ff2d51dae14f9324a64e4433e6b663e by bmahjour
[DDG] Data Dependence Graph - Add query function for memory dependencies between two nodes

Summary:
When working with the DDG it's useful to be able to query details of the
memory dependencies between two nodes connected by a memory edge. The DDG
does not hold a copy of the dependencies, but it contains a reference to a
DependenceInfo object through which dependence information can be queried.
This patch adds a query function to the DDG to obtain all the Dependence
objects that exist between instructions of two nodes.

Authored By: bmahjour

Reviewers: Meinersbur, Whitney, etiotto

Reviewed By: Whitney

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80529
The file was addedllvm/unittests/Analysis/DDGTest.cpp
The file was modifiedllvm/unittests/Analysis/CMakeLists.txt
The file was modifiedllvm/include/llvm/Analysis/DDG.h
Commit bed78845e555790c0bcbe34d04436fae41a3fa5f by llvmgnsyncbot
[gn build] Port 0d20ed664ff
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Commit 29f8056b54ea5ea6b333e3b8f11de2cc327d1421 by ties.stuij
[CodeGen] fix typo `def nxv1bf32` -> `def nxv1f32`

The `Add bfloat MVT type` patch introduced a typo in the nxv1f32 definition
in llvm/include/llvm/CodeGen/ValueTypes.td:
https://reviews.llvm.org/D79706/new/#inline-740433

This patch fixes that.
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.td
Commit 4d6f44f5f0925f2d05431065d9f197644d07b1b5 by ravishankarm
[mlir][spirv] Lower allocation/deallocations of workgroup memory.

This allocation of a workgroup memory is lowered to a
spv.globalVariable. Only static size allocation with element type
being int or float is handled. The lowering does account for the
element type that are not supported in the lowered spv.module based on
the extensions/capabilities and adjusts the number of elements to get
the same byte length.

Differential Revision: https://reviews.llvm.org/D80411
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
The file was addedmlir/test/Conversion/StandardToSPIRV/alloc.mlir
The file was modifiedmlir/test/Conversion/GPUToSPIRV/loop.mlir
The file was modifiedmlir/test/Conversion/GPUToSPIRV/load-store.mlir
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRV.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h
Commit 5b4cd2d4c42360469ccc9f59aa04a1a24b290df9 by maskray
[X86] Assemble movzb 1280(%rbx, %r12), %r12 after D80608

ffmpeg/libavcodec/x86/h264_cabac.c inline assembly may produce
movzb 1280(%rbx, %r12), %r12

After D80608, llvm-mc errors:

error: unknown use of instruction mnemonic without a size suffix
The file was modifiedllvm/test/MC/X86/x86-64.s
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
Commit 74a51753a6c2c587f650174e19f99279e8e4ef35 by Raphael Isemann
[lldb] Make order of completions for expressions deterministic and sorted by Clang's priority values.

Summary:

It turns out that the order in which we provide completions for expressions is
nondeterministic. This leads to confusing user experience and also breaks the
reproducer tests (as two LLDB tests can go out of sync due to the
non-determinism in the completion lists)

The reason for the non-determinism is that the CompletionConsumer informs us
about decls in the order in which it finds declarations in the lookup store of
the DeclContexts it visits (mainly this snippet in SemaLookup.cpp):

``` lang=c++
    // Enumerate all of the results in this context.
    for (DeclContextLookupResult R :
         Load ? Ctx->lookups()
              : Ctx->noload_lookups(/*PreserveInternalState=*/false)) {
       [...]
```

This storage of the lookup is sorted by pointer values (see the hash of
`DeclarationName`) and can therefore be non-deterministic. The LLDB code
completion consumer that receives these calls originally expected that the order
of declarations is defined by Clang, but it seems the API expects the client to
provide an order to the completions.

This patch fixes the issue as follows:

* We sort the completions we get from Clang alphabetically and also by the
priority value we get from Clang (with priority value sorting having precedence
over the alphabetical sorting)

* We make all the functions/variables that touch a completion before the sorting
const-qualified. The idea is that this should prevent that we never have
observable side-effect from touching these declarations in a non-deterministic
order (e.g., we don't try to complete the type by accident).

This way we behave like the other parts of Clang which also sort the results by
some deterministic value (usually the name or something computed from a name,
e.g., edit distance to a given string).

We most likely also need to fix the Clang code to make the loop I listed above
deterministic to prevent these issues in the future (tracked in rdar://63442513
). This wouldn't replace the functionality provided in this patch though as we
would still need the priority and overall alphabetical sorting.

Note: I had to increase the lldb-vscode completion limit to 100 as the tests
look for strings that aren't in the first 50 results anymore due to variable
names starting with letters like 'v' (which are now always shown much further
down in the list due to the alphabetical sorting).

Fixes rdar://63200995

Reviewers: JDevlieghere, clayborg

Reviewed By: JDevlieghere

Subscribers: mgrang, abidh

Differential Revision: https://reviews.llvm.org/D80292
The file was modifiedlldb/tools/lldb-vscode/lldb-vscode.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
The file was modifiedlldb/test/API/commands/expression/completion/TestExprCompletion.py
Commit 07cd19efa2a63b01aea9b516a7a003cb7f750a12 by arsenm2
AMDGPU: Fix dropping MI flags when rewriting instructions

All 3 passes that change instruction encodings were dropping MI
flags. This avoids scheduling regressions caused by setting
mayRaiseFPExceptions on FP instructions for non-strictfp functions.
The file was modifiedllvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
The file was addedllvm/test/CodeGen/AMDGPU/shrink-instructions-flags.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/dpp_combine.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-ops.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
Commit e7f1067ad6f116ff1e4bfc0f7fe1977f172b0ea0 by Jonas Devlieghere
[lldb/Reproducers] Skip API logging in the DUMMY macro

The purpose of the LLDB_RECORD_DUMMY macro is twofold: it is used in
functions that take arguments that we don't know how to serialize (e.g.
void*) and it's used by function where we want to avoid doing excessive
work because they can be called from a signal handler (e.g.
setTerminalWidth).

To support the latter case, I've disabled API logging form the Recorder
ctor used by the DUMMY macro. This ensures we don't allocate memory when
called from a signal handler.
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
The file was modifiedlldb/include/lldb/Utility/ReproducerInstrumentation.h
Commit 6407aa9d2e0e225bc81d3b2602d6e6ed79912ec2 by kadircet
[clangd] Add access specifier information to hover contents

Summary:
For https://github.com/clangd/clangd/issues/382

This commit adds access specifier information to the hover
contents. For example, the hover information of a class field or
member function will now indicate if the field or member is private,
public, or protected. This can be particularly useful when a developer
is in the implementation file and wants to know if a particular member
definition is public or private.

Reviewers: kadircet

Reviewed By: kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80472
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was modifiedclang-tools-extra/clang-doc/MDGenerator.cpp
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp
The file was modifiedclang/lib/AST/DeclPrinter.cpp
The file was modifiedclang-tools-extra/clang-doc/HTMLGenerator.cpp
The file was modifiedclang-tools-extra/clang-doc/Generators.cpp
The file was modifiedclang-tools-extra/clangd/Hover.cpp
The file was modifiedclang/include/clang/Basic/Specifiers.h
The file was modifiedclang-tools-extra/clangd/Hover.h
The file was modifiedclang/lib/AST/JSONNodeDumper.cpp
The file was modifiedclang-tools-extra/clang-doc/Generators.h
Commit a2a3e9f0a6e91103a0d1fa73086dbdf109c48f69 by maskray
[Driver] Support -fsanitize=shadow-call-stack on aarch64_be

Fixes https://bugs.llvm.org/show_bug.cgi?id=46076

Reviewed By: nickdesaulniers, pcc

Differential Revision: https://reviews.llvm.org/D80647
The file was modifiedclang/lib/Driver/SanitizerArgs.cpp
The file was modifiedclang/test/Driver/fsanitize.c
Commit d37ce53ad30f3d5e7fb37b5bb9c49793ca33d2df by Matthew.Arsenault
AMDGPU: Set StackPointerRegisterToSaveRestore

This will enable selecting non-entry block allocas. Skip the SP write
check in the base isSchedulingBoundary implementation to preserve the
previous scheduling behavior and avoid test churn. It's apparently for
compile time reasons, but if we were to use this more work would be
needed since in some of the failing tests, we seem to incorrectly get
hazard nops inserted.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit 8d9ff2318530d91be04ccced107c3ef04ba2255f by jasonliu
[NFC][XCOFF][AIX] Return function entry point symbol with dedicate function

Use getFunctionEntryPointSymbol whenever possible to enclose the
implementation detail and reduce duplicate logic.

Differential Revision: https://reviews.llvm.org/D80402
The file was modifiedllvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/include/llvm/Target/TargetLoweringObjectFile.h
Commit b9c6871a9570975827dc0bbeb39131c99c8daf8e by maskray
[Driver] Support -fsanitize=shadow-call-stack and cfi-icall on aarch64_be

D80647 did not fix https://bugs.llvm.org/show_bug.cgi?id=46076
This is the fix.
The file was modifiedclang/test/Driver/fsanitize.c
The file was modifiedclang/lib/Driver/ToolChain.cpp
Commit eadf2959567c89bebff153feac873cbc1b71eb04 by whitneyt
[CodeMoverUtils] Use dominator tree level to decide the direction of
code motion

Summary: Currently isSafeToMoveBefore uses DFS numbering for determining
the relative position of instruction and insert point which is not
always correct. This PR proposes the use of Dominator Tree depth for the
same. If a node is at a higher level than the insert point then it is
safe to say that we want to move in the forward direction.
Authored By: RithikSharma
Reviewer: Whitney, nikic, bmahjour, etiotto, fhahn
Reviewed By: Whitney
Subscribers: fhahn, hiraditya, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D80084
The file was modifiedllvm/lib/Analysis/OrderedInstructions.cpp
The file was modifiedllvm/include/llvm/Analysis/OrderedInstructions.h
The file was modifiedllvm/unittests/Transforms/Utils/CodeMoverUtilsTest.cpp
The file was modifiedllvm/lib/Transforms/Utils/CodeMoverUtils.cpp
Commit c295a65da496f5e982402e8f83e417659c7dd166 by ajcbik
[mlir] [VectorOps] Add 'vector.flat_transpose' operation

Summary:
Provides a representation of the linearized LLVM instrinsic.
With tests and lowering implementation to LLVM IR dialect.
Prepares better lowering for 2-D vector.transpose.

Reviewers: nicolasvasilache, ftynse, reidtatge, bkramer, dcaballe

Reviewed By: ftynse, dcaballe

Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80419
The file was modifiedmlir/test/Dialect/Vector/invalid.mlir
The file was modifiedmlir/test/Dialect/Vector/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Commit 2368bf52cd7725a34f09f4b27a9c205cda06f478 by lei
[PowerPC] Add support for -mcpu=pwr10 in both clang and llvm

Summary:
This patch simply adds support for the new CPU in anticipation of
Power10. There isn't really any functionality added so there are no
associated test cases at this time.

Reviewers: stefanp, nemanjai, amyk, hfinkel, power-llvm-team, #powerpc

Reviewed By: stefanp, nemanjai, amyk, #powerpc

Subscribers: NeHuang, steven.zhang, hiraditya, llvm-commits, wuzish, shchenz, cfe-commits, kbarton, echristo

Tags: #clang, #powerpc, #llvm

Differential Revision: https://reviews.llvm.org/D80020
The file was modifiedclang/lib/Driver/ToolChains/Arch/PPC.cpp
The file was modifiedllvm/lib/Support/Host.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedllvm/test/CodeGen/PowerPC/check-cpu.ll
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedclang/test/Preprocessor/init-ppc64.c
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Commit 13f6c81c5d9a7a34a684363bcaad8eb7c65356fd by yhs
[BPF] simplify zero extension with MOV_32_64

The current pattern matching for zext results in the following code snippet
being produced,

  w1 = w0
  r1 <<= 32
  r1 >>= 32

Because BPF implementations require zero extension on 32bit loads this
both adds a few extra unneeded instructions but also makes it a bit
harder for the verifier to track the r1 register bounds. For example in
this verifier trace we see at the end of the snippet R2 offset is unknown.
However, if we track this correctly we see w1 should have the same bounds
as r8. R8 smax is less than U32 max value so a zero extend load should keep
the same value. Adding a max value of 800 (R8=inv(id=0,smax_value=800)) to
an off=0, as seen in R7 should create a max offset of 800. However at the
end of the snippet we note the R2 max offset is 0xffffFFFF.

  R0=inv(id=0,smax_value=800)
  R1_w=inv(id=0,umax_value=2147483647,var_off=(0x0; 0x7fffffff))
  R6=ctx(id=0,off=0,imm=0) R7=map_value(id=0,off=0,ks=4,vs=1600,imm=0)
  R8_w=inv(id=0,smax_value=800,umax_value=4294967295,var_off=(0x0; 0xffffffff))
  R9=inv800 R10=fp0 fp-8=mmmm????
58: (1c) w9 -= w8
59: (bc) w1 = w8
60: (67) r1 <<= 32
61: (77) r1 >>= 32
62: (bf) r2 = r7
63: (0f) r2 += r1
64: (bf) r1 = r6
65: (bc) w3 = w9
66: (b7) r4 = 0
67: (85) call bpf_get_stack#67
  R0=inv(id=0,smax_value=800)
  R1_w=ctx(id=0,off=0,imm=0)
  R2_w=map_value(id=0,off=0,ks=4,vs=1600,umax_value=4294967295,var_off=(0x0; 0xffffffff))
  R3_w=inv(id=0,umax_value=800,var_off=(0x0; 0x3ff))
  R4_w=inv0 R6=ctx(id=0,off=0,imm=0)
  R7=map_value(id=0,off=0,ks=4,vs=1600,imm=0)
  R8_w=inv(id=0,smax_value=800,umax_value=4294967295,var_off=(0x0; 0xffffffff))
  R9_w=inv(id=0,umax_value=800,var_off=(0x0; 0x3ff))
  R10=fp0 fp-8=mmmm????

After this patch R1 bounds are not smashed by the <<=32 >>=32 shift and we
get correct bounds on R2 umax_value=800.

Further it reduces 3 insns to 1.

Signed-off-by: John Fastabend <john.fastabend@gmail.com>

Differential Revision: https://reviews.llvm.org/D73985
The file was modifiedllvm/lib/Target/BPF/BPFISelLowering.cpp
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-peephole-phi-1.ll
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-peephole-phi-2.ll
The file was modifiedllvm/lib/Target/BPF/BPFInstrInfo.td
The file was addedllvm/test/CodeGen/BPF/32-bit-subreg-zext.ll
The file was modifiedllvm/lib/Target/BPF/BPFMIPeephole.cpp
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-cond-select.ll
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-peephole-phi-3.ll
The file was modifiedllvm/test/CodeGen/BPF/32-bit-subreg-peephole.ll
Commit 4b4496312e3380d8c427ef836f2b0a38d145652b by arsenm2
AMDGPU: Start adding MODE register uses to instructions

This is the groundwork required to implement strictfp. For now, this
should be NFC for regular instructoins (many instructions just gain an
extra use of a reserved register). Regalloc won't rematerialize
instructions with reads of physical registers, but we were suffering
from that anyway with the exec reads.

Should add it for all the related FP uses (possibly with some
extras). I did not add it to either the gpr index mode instructions
(or every single VALU instruction) since it's a ridiculous feature
already modeled as an arbitrary side effect.

Also work towards marking instructions with FP exceptions. This
doesn't actually set the bit yet since this would start to change
codegen. It seems nofpexcept is currently not implied from the regular
IR FP operations. Add it to some MIR tests where I think it might
matter.
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP1Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/v_swap_b32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/dpp_combine.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frint.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/dead-lane.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrFormats.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/mode-register.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOPInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-waitcnts-callee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoal-subrange-join.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP3PInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-gfx9.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
The file was modifiedllvm/unittests/MI/LiveIntervalTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOPCInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/shrink-instructions-flags.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-permute.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frint.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/bundle-latency.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-back-edge-loop.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-kill.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/madak-inline-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/merge-m0.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoalesce-prune.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/mai-hazards.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/movrels-bug.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/endpgm-dce.mir
Commit 48cb380abdca27d177520aea4fe4dfe8d628b466 by spatel
[InstCombine] add tests for vector demanded elements of select condition; NFC
The file was modifiedllvm/test/Transforms/InstCombine/vec_demanded_elts.ll
Commit fa3b587196dbc04e445257ae38e7906e5c0c4888 by mtrofin
[llvm]NFC] Simplify ProfileSummaryInfo state transitions

ProfileSummaryInfo is updated seldom, as result of very specific
triggers. This patch clearly demarcates state updates from read-only uses.
This, arguably, improves readability and maintainability.
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
The file was modifiedllvm/include/llvm/Analysis/ProfileSummaryInfo.h
The file was modifiedllvm/lib/Analysis/ProfileSummaryInfo.cpp
Commit 8e7e6a8d6bae19c5a18e0d0daa0614272b85598c by craig.topper
[X86] Restore selection of MULX on BMI2 targets.

Looking back over gcc and icc behavior it looks like icc does
use mulx32 on 32-bit targets and mulx64 on 64-bit targets. It's
also used when dividing i32 by constant on 32-bit targets and
i64 by constant on 64-bit targets.

gcc uses it multiplies producing a 64 bit result on 32-bit targets
and 128-bit results on a 64-bit target. gcc does not appear to use
it for division by constant.

After this patch clang is closer to the icc behavior. This
basically reverts d1c61861ddc94457b08a5a653d3908b7b38ebb22, but
there were no strong feelings at the time.

Fixes PR45518.

Differential Revision: https://reviews.llvm.org/D80498
The file was modifiedllvm/test/CodeGen/X86/i128-mul.ll
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/pr35636.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll
The file was modifiedllvm/test/CodeGen/X86/mulx64.ll
The file was modifiedllvm/test/CodeGen/X86/mulx32.ll
The file was modifiedllvm/test/CodeGen/X86/hoist-invariant-load.ll
The file was modifiedllvm/test/CodeGen/X86/bmi2-x86_64.ll
The file was modifiedllvm/test/CodeGen/X86/bmi2.ll
Commit fe9d8442e0dfc8c83e9a0a31f5079e7a70b54d9d by Jonas Devlieghere
[lldb/Test] Generate YAML binary in build directory

Although it's not entirely clear to me why, this test was generating its
binary in the source directory instead of the build directory. This
patch fixes that following the same approach as other tests.
The file was modifiedlldb/test/API/functionalities/show_location/TestShowLocationDwarf5.py
Commit c30c2368c77f05a1447bb7442c6ac2fad2912a57 by Jonas Devlieghere
[lldb/Reproducers] Skip tests relying on timeouts

The reproducer don't model timeouts so tests that rely on them end up
with unexpected packets during replay. Skip them until we can handle
this scenario.
The file was modifiedlldb/test/API/commands/expression/no-deadlock/TestExprDoesntBlock.py
The file was modifiedlldb/test/API/commands/expression/timeout/TestCallWithTimeout.py
Commit 334552150770faaa407fecab42f5333bb2a898a6 by Adrian Prantl
Also cache negative results in GetXcodeSDKPath (NFC)

This fixes a performance issue in the failure case.

rdar://63547920

Differential Revision: https://reviews.llvm.org/D80595
The file was modifiedlldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
Commit eb1092ada32d6855dcb4f763ce48ede21f4d7441 by alex-t
[AMDGPU] Fix for the lost CarryOut/CarryIn register operands in S_ADD/SUB_CO_PSEUDO.

Summary: This fixes the 5b898bddff51 bug when the carry-in and carry-out registers became lost in lowering S_ADD/SUB_CO_PSEUDO.

Reviewers: rampitec, arsenm

Reviewed By: arsenm

Subscribers: msearles, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80158
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir
Commit d24dd2b279ffe60d579b425fb74f6e4904323a34 by dvyukov
tsan: fix test in debug mode

sanitizer-x86_64-linux-autoconf has failed after the previous tsan commit:

FAIL: ThreadSanitizer-x86_64 :: java_finalizer2.cpp (245 of 403)
******************** TEST 'ThreadSanitizer-x86_64 :: java_finalizer2.cpp' FAILED ********************
Script:
--
: 'RUN: at line 1';      /b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/./bin/clang  --driver-mode=g++ -fsanitize=thread -Wall  -m64   -gline-tables-only -I/b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/../ -std=c++11 -I/b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/../ -nostdinc++ -I/b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/tools/clang/runtime/compiler-rt-bins/lib/tsan/libcxx_tsan_x86_64/include/c++/v1 -O1 /b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/java_finalizer2.cpp -o /b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/tools/clang/runtime/compiler-rt-bins/test/tsan/X86_64Config/Output/java_finalizer2.cpp.tmp &&  /b/sanitizer-x86_64-linux-autoconf/build/tsan_debug_build/tools/clang/runtime/compiler-rt-bins/test/tsan/X86_64Config/Output/java_finalizer2.cpp.tmp 2>&1 | FileCheck /b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/java_finalizer2.cpp
--
Exit Code: 1

Command Output (stderr):
--
/b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/test/tsan/java_finalizer2.cpp:82:11: error: CHECK: expected string not found in input
// CHECK: DONE
          ^
<stdin>:1:1: note: scanning from here
FATAL: ThreadSanitizer CHECK failed: /b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/lib/tsan/rtl/tsan_sync.cpp:69 "((*meta)) == ((0))" (0x4000003e, 0x0)
^
<stdin>:5:12: note: possible intended match here
#3 __tsan::OnUserAlloc(__tsan::ThreadState*, unsigned long, unsigned long, unsigned long, bool) /b/sanitizer-x86_64-linux-autoconf/build/llvm-project/compiler-rt/lib/tsan/rtl/tsan_mman.cpp:225:16 (java_finalizer2.cpp.tmp+0x4af407)
           ^

http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/51143/steps/test%20tsan%20in%20debug%20compiler-rt%20build/logs/stdio

Fix heap object overlap by offsetting java heap as other tests are doing.
The file was modifiedcompiler-rt/test/tsan/java_finalizer2.cpp
Commit c593bf534222f2206f89b6a61993125b2475b954 by Jessica Paquette
[GlobalISel] Don't combine instructions which are fed by memory instructions.

If we have a memory instruction (e.g. a load), we shouldn't combine it away in
some trivial combine.

It's possible that, say, a call lives between the instructions. This could
modify the value loaded, making the load instructions not safe to fold.

Differential Revision: https://reviews.llvm.org/D80053
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-not-really-equiv-insts.mir
Commit 49688b3c306d0bf918c0abeee030cfd56a17c348 by michael.hliao
Fix `-Wpedantic` warning. NFC.
The file was modifiedllvm/tools/llvm-cov/CoverageFilters.h
Commit c6fa2efd481a58c979a8e9f95119b4278b13d99a by ravishankarm
[mlir][Linalg] Fix build failure from D80188

Differential Revision: https://reviews.llvm.org/D80657
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
Commit 79aa9bfdb819c02faa3c6c78e307b20ae7f69057 by ntv
[mlir] Fix RunnerUtils template specialization

Undoing a spurious change that broke SFINAE for some out of core use
cases.
The file was modifiedmlir/include/mlir/ExecutionEngine/CRunnerUtils.h
Commit 54b64572407c8305c7bb8cc20c46a5e0c66b2979 by aqjune
[TargetPassConfig] Add CanonicalizeFreezeInLoops before LSR

Summary:
This patch adds CanonicalizeFreezeInLoops before LSR.
Relevant patch: https://reviews.llvm.org/D77523

Reviewers: spatel, efriedma, jdoerfert, fhahn, nikic, reames, xbolva00

Reviewed By: nikic

Subscribers: xbolva00, nikic, lebedev.ri, hiraditya, llvm-commits, sanwou01, nlopes

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77524
The file was modifiedllvm/test/CodeGen/X86/O3-pipeline.ll
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll
The file was modifiedllvm/test/Transforms/CanonicalizeFreezeInLoops/aarch64.ll
The file was modifiedllvm/test/CodeGen/AArch64/O3-pipeline.ll
Commit b2773823116157aa73ea4ac01270b22042d6bb42 by silvasean
Remove error-prone mlir::ExecutionEngine::invoke overload.

I just spent a bunch of time debugging a mysterious bug that ended being due to my SmallVector getting passed to the Args&... overload instead of the MutableArrayRef overload, with disastrous results.

I appreciate the intent of this API, but for a function that does a bunch of unsafe casts, adding in potential overload confusion is just too much C++ footgun. If we end up needing this functionality, having something like a separate `packArgs(Args&...) -> SmallVector` overload would be preferable.

Turns out this API is unused and untested (even out of tree as far as I can tell, modulo the optional passing of no args to the other invoke as I fixed in this patch), so it's an easy fix -- just delete it and touch up the other overload.

Differential Revision: https://reviews.llvm.org/D80607
The file was modifiedmlir/include/mlir/ExecutionEngine/ExecutionEngine.h
Commit 14f33575868556f928434192bd6141f4be16a7a4 by Vitaly Buka
[StackSafety] Bailout more aggressively
Many edge cases, e.g. wrapped ranges, can be processed
precisely without bailout. However it's very unlikely that
memory access with min/max integer offsets will be
classified as safe anyway.
Early bailout may help with ThinLTO where we can
drop unsafe parameters from summaries.
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 804a39a201567f5f615246bf99cf8e8ff7e006c8 by Vitaly Buka
[NFC,StackSafety] Rename some variables
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
Commit 03481287ca530494512d128cbbdc9c87f2d84921 by michael.hliao
Refactor argument attribute specification in intrinsic definition. NFC.

- Argument attribute needs specifiying through `ArgIndex<n>`
  (corresponding to `FirstArgIndex`) to distinguish explicitly from the
  index number from the overloaded type list.
- In addition, `RetIndex` (corresponding to `ReturnIndex`) and
  `FuncIndex` (corresponding to `FunctionIndex`) are introduced for us
  to associate attributes on the return value and potentially function
  itself.

Differential Revision: https://reviews.llvm.org/D80422
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsX86.td
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsHexagon.td
The file was modifiedllvm/utils/TableGen/IntrinsicEmitter.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsARM.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsNVVM.td
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/test/TableGen/GlobalISelEmitter-immarg-literal-pattern.td
The file was modifiedllvm/test/TableGen/immarg.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsMips.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsHexagonDep.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsXCore.td
The file was modifiedllvm/utils/TableGen/CodeGenIntrinsics.h
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsBPF.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsSystemZ.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsWebAssembly.td
The file was modifiedllvm/test/TableGen/GlobalISelEmitter-SDNodeXForm-timm.td
Commit fa342b5c8054dad4cfd1032ac580d71f0f4943d3 by michael.hliao
Enable `align <n>` to be used in the intrinsic definition.

- This allow us to specify the (minimal) alignment on an intrinsic's
  arguments and, more importantly, the return value.

Differential Revision: https://reviews.llvm.org/D80422
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td
The file was modifiedllvm/lib/IR/Attributes.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll
The file was modifiedllvm/utils/TableGen/CodeGenIntrinsics.h
The file was modifiedllvm/include/llvm/IR/Attributes.h
The file was modifiedllvm/utils/TableGen/IntrinsicEmitter.cpp
Commit 98ef93eabd768e51aa58c7623a9fe220ab471715 by mtrofin
[llvm] Add function feature extraction analysis

Summary:
This patch introduces an analysis pass to extract function features,
which will be needed by the ML InlineAdvisor.

RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-April/140763.html

Reviewers: davidxl, dblaikie, jdoerfert

Subscribers: mgorny, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80579
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was addedllvm/lib/Analysis/ML/CMakeLists.txt
The file was addedllvm/unittests/Analysis/ML/CMakeLists.txt
The file was addedllvm/include/llvm/Analysis/ML/InlineFeaturesAnalysis.h
The file was modifiedllvm/lib/Analysis/CMakeLists.txt
The file was modifiedllvm/unittests/Analysis/CMakeLists.txt
The file was addedllvm/unittests/Analysis/ML/InlineFeaturesAnalysisTest.cpp
The file was addedllvm/lib/Analysis/ML/InlineFeaturesAnalysis.cpp
The file was modifiedllvm/lib/Passes/PassRegistry.def
Commit 9546d8b108dce03e03e0448cebbca5fa0fe4be21 by silvasean
[mlir][core] Add IndexElementsAttr helpers.

Summary:
In a follow-up, I'll update the Shape dialect to use this instead of
I64ElementsAttr.

Differential Revision: https://reviews.llvm.org/D80601
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/lib/IR/Attributes.cpp
The file was modifiedmlir/test/mlir-tblgen/types.mlir
The file was modifiedmlir/lib/IR/Builders.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/include/mlir/IR/Builders.h
Commit 25132b36a8b39e7c2b0b28aa73772e57191b6df4 by silvasean
[mlir][shape] Use IndexElementsAttr in Shape dialect.

Summary:
Index is the proper type for storing shapes when constant folding, so
this fixes the previous code (which was using i64).

Differential Revision: https://reviews.llvm.org/D80600
The file was modifiedmlir/test/Dialect/Shape/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
Commit 5f97a540ad8dd4baac47873fa4bdfba2f37e0f82 by Jonas Devlieghere
[lldb/Reproducers] Differentiate active and passive replay unexpected packet.
The file was modifiedlldb/test/API/functionalities/conditional_break/TestConditionalBreak.py
The file was modifiedlldb/test/API/functionalities/step_scripted/TestStepScripted.py
The file was modifiedlldb/test/API/lang/objc/modules/TestObjCModules.py
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestGDBRemoteClient.py
The file was modifiedlldb/test/API/python_api/hello_world/TestHelloWorld.py
The file was modifiedlldb/test/API/lang/objc/foundation/TestRuntimeTypes.py
The file was modifiedlldb/test/API/commands/command/script/TestCommandScript.py
The file was modifiedlldb/test/API/functionalities/breakpoint/scripted_bkpt/TestScriptedResolver.py
The file was modifiedlldb/test/API/commands/process/attach-resume/TestAttachResume.py
The file was modifiedlldb/test/API/commands/expression/issue_11588/Test11588.py
The file was modifiedlldb/test/API/functionalities/signal/TestSendSignal.py
The file was modifiedlldb/test/API/commands/process/attach/TestProcessAttach.py
The file was modifiedlldb/test/API/lang/objc/print-obj/TestPrintObj.py
Commit f9bea9bc4acf4c412eab4767c31674d0caa60322 by Jonas Devlieghere
[lldb/Reproducers] Skip & add FIXME to tests failing with unexpected packet.

Add skip decorator to tests failing with an unexpected packet during
passive replay.
The file was modifiedlldb/test/API/commands/expression/unwind_expression/TestUnwindExpression.py
The file was modifiedlldb/test/API/lang/objc/hidden-ivars/TestHiddenIvars.py
The file was modifiedlldb/test/API/functionalities/gdb_remote_client/TestRestartBug.py
Commit f46bb9dd5ca0b5b553590da5ff177767be0b75b5 by Louis Dionne
[NFC] Reformat TEST_FOO macros in test_macros.h

To make them easier to read and to make it easier to add new ones.
The file was modifiedlibcxx/test/support/test_macros.h
Commit a57a67c59b3f7529f4aa30009b214248772b544b by Adrian Prantl
Fix a use-after-free in GetXcodeSDKPath

Introduced in https://reviews.llvm.org/D80595. Thanks Jonas for noticing!

Differential Revision: https://reviews.llvm.org/D80666
The file was modifiedlldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
Commit 0a072b8a0da7399eeeb670330b7baeddf1bb407a by ravishankarm
[mlir][Linalg] Add missing library linkage for shared library builds.

Differential Revision: https://reviews.llvm.org/D80664
The file was modifiedmlir/lib/Dialect/Linalg/Utils/CMakeLists.txt
Commit 2d068e534f1671459e1b135852c1b3c10502e929 by amccarth
Fix Windows command line bug when last token in response file is ""

Patch by Neil Dhar <dhar@alumni.duke.edu>

Current state machine for parsing tokens from response files in Windows
does not correctly handle the case where the last token is "". The current
implementation handles the last token by only adding it if it is not empty,
however this does not cover the case where the last token is meant to be
the empty string. We can cover this case by checking whether the state
machine was last in the UNQUOTED state, which indicates that the last
character of the input was a non-whitespace character.

Differential Revision: https://reviews.llvm.org/D78346
The file was modifiedllvm/lib/Support/CommandLine.cpp
The file was modifiedllvm/unittests/Support/CommandLineTest.cpp
Commit cf86a234ba86acf0bb875e21d27833be36e08be4 by mtrofin
Fix shared libs build break introduced in rG98ef93eabd76
The file was modifiedllvm/lib/Passes/CMakeLists.txt
The file was modifiedllvm/lib/Analysis/ML/CMakeLists.txt