Started 1 mo 18 days ago
Took 19 hr on green-dragon-09

Failed Build #5459 (Sep 1, 2019 5:00:10 PM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 370620
  • http://llvm.org/svn/llvm-project/cfe/trunk : 370609
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 370390
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 370599
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 370527
Changes
  1. [X86] Add initial support for unfolding broadcast loads from arithmetic instructions to enable LICM hoisting of the load

    MachineLICM can hoist an invariant load, but if that load is folded it needs to be unfolded. On AVX512 sometimes this load is an broadcast load which we were previously unable to unfold. This patch adds initial support for that with a very basic list of supported instructions as a starting point.

    Differential Revision: https://reviews.llvm.org/D67017 (detail/ViewSVN)
    by ctopper
  2. [DAGCombiner] improve throughput of shift+logic+shift

    The motivating case for this is a long way from here:
    https://bugs.llvm.org/show_bug.cgi?id=43146
    ...but I think this is where we have to start.

    We need to canonicalize/optimize sequences of shift and logic to ease
    pattern matching for things like bswap and improve perf in general.
    But without the artificial limit of '!LegalTypes' (early combining),
    there are a lot of test diffs, and not all are good.

    In the minimal tests added for this proposal, x86 should have better
    throughput in all cases. AArch64 is neutral for scalar tests because
    it can fold shifts into bitwise logic ops.

    There are 3 shift opcodes and 3 logic opcodes for a total of 9 possible patterns:
    https://rise4fun.com/Alive/VlI
    https://rise4fun.com/Alive/n1m
    https://rise4fun.com/Alive/1Vn

    Differential Revision: https://reviews.llvm.org/D67021 (detail/ViewSVN)
    by spatel
  3. Fix MSVC unreferenced formal parameter warning. NFCI. (detail/ViewSVN)
    by rksimon
  4. Fix MSVC unreferenced formal parameter warning. NFCI. (detail/ViewSVN)
    by rksimon
  5. [X86][AVX] Rename + cleanup lowerShuffleAsLanePermuteAndBlend. NFCI.

    Rename to lowerShuffleAsLanePermuteAndShuffle to make it clear that not just blends are performed.

    Cleanup the in-lane shuffle mask generation to make it more obvious what's going on.

    Some prep work noticed while investigating the poor shuffle code mentioned in D66004. (detail/ViewSVN)
    by rksimon
  6. Fix shadow variable warning. NFCI. (detail/ViewSVN)
    by rksimon
  7. Fix variable HasArrayDesignator set but not used warning. NFCI. (detail/ViewSVN)
    by rksimon
  8. [ConstantFolding] Fix 'undef' folding for @llvm.[us]{add,sub}.with.overflow ops (PR43188)

    As we have already established/fixed in
      https://bugs.llvm.org/show_bug.cgi?id=42209
      https://reviews.llvm.org/D63065
      https://reviews.llvm.org/rL363522
    the InstSimplify handling for @llvm.with.overflow ops with undefs
    is correct. Therefore if ConstantFolding produces different results,
    then it is wrong.

    This duplication of code hints at the need for some refactoring,
    but for now address the brokenness of ConstantFolding by
    copying the known-good handling from rL363522.

    Fixes https://bugs.llvm.org/show_bug.cgi?id=43188 (detail/ViewSVN)
    by lebedevri
  9. [ARM] Remove MVE masked loads/stores

    These were never enabled correctly and are causing other problems. Taking them
    out for the moment, whilst we work on the issues.

    This reverts r370329. (detail/ViewSVN)
    by dmgreen
  10. [TargetLowering] Fix Bugzilla ID 43183 to avoid soften comparison broken with constant inputs

    Summary:
      This fixes the bugzilla id 43183 which triggerd by the following commit:
      [RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCall (detail/ViewSVN)
    by shiva
  11. AMDGPU: Remove unused custom node definition (detail/ViewSVN)
    by arsenm
  12. [GlobalISel][NFC] Regression test cases for aarch64 legalizer (s128 sext+icmp).

    There were legalizer asserts in aarch64 globalisel (in debug mode) with s128
    sext+icmp before r367060 and r366943 landed. These are just a couple reduced
    mir and ir regression tests that came from a build where these were encountered. (detail/ViewSVN)
    by zer0
  13. [X86] Replace some COPY_TO_REGCLASS from GR32/GR64 to VR128 in isel patterns with VMOVDI2PDIrr/VMOV64toPQIrr.

    This is what the copies will eventually be turned into. We don't
    use COPY_TO_REGCLASS for scalar_to_vector patterns. So we should
    use the real instruction here too. (detail/ViewSVN)
    by ctopper
  14. [X86] Compress the flag bits in the folding tables to make room for more bits in an upcoming patch. (detail/ViewSVN)
    by ctopper
  15. [libc++] Fix directory_iterator compilation on Win32

    This patch fixes some typos and other small errors in
    directory_iterator.cpp that prevented this file from being compiled for
    Win32.

    Patch by Stefan Schmidt <thrimbor.github@gmail.com>!

    Differential Revision: https://reviews.llvm.org/D66986 (detail/ViewSVN)
    by nico

Started by upstream project Clang Stage 2: cmake, R -g Tsan, using Stage 1 RA build number 18228
originally caused by:

Started by upstream project Clang Stage 2: cmake, R -g Tsan, using Stage 1 RA build number 18229
originally caused by:

Started by upstream project Clang Stage 2: cmake, R -g Tsan, using Stage 1 RA build number 18230
originally caused by:

Started by upstream project Clang Stage 2: cmake, R -g Tsan, using Stage 1 RA build number 18231
originally caused by:

Started by upstream project Clang Stage 2: cmake, R -g Tsan, using Stage 1 RA build number 18232
originally caused by:

Started by upstream project Clang Stage 2: cmake, R -g Tsan, using Stage 1 RA build number 18233
originally caused by:

Started by upstream project Clang Stage 2: cmake, R -g Tsan, using Stage 1 RA build number 18234
originally caused by:

Started by upstream project Clang Stage 2: cmake, R -g Tsan, using Stage 1 RA build number 18235
originally caused by:

This run spent:

  • 10 hr waiting;
  • 19 hr build duration;
  • 1 day 5 hr total from scheduled to completion.

Identified problems

Regression test failed

This build failed because a regression test in the test suite FAILed. See the test report for details.
Indication 1

Ninja target failed

Below is a link to the first failed ninja target.
Indication 2

Missing test results

The test result file Jenkins is looking for does not exist after the build.
Indication 3

Compile Error

This build failed because of a compile error. Below is a list of all errors in the build log:
Indication 4