FailedChanges

Summary

  1. [NFC][Codegen][X86][AArch64] Add "(x s% C) == 0" tests Much like with `urem`, the same optimization (albeit with slightly different algorithm) applies for the signed case, too. I'm simply copying the test coverage from `urem` case for now, i believe it should be (close to?) sufficient.
Revision 366640 by lebedevri:
[NFC][Codegen][X86][AArch64] Add "(x s% C) == 0" tests

Much like with `urem`, the same optimization (albeit with slightly
different algorithm) applies for the signed case, too.

I'm simply copying the test coverage from `urem` case for now,
i believe it should be (close to?) sufficient.
Change TypePath in RepositoryPath in Workspace
The file was added/llvm/trunk/test/CodeGen/AArch64/srem-seteq-optsize.llllvm.src/test/CodeGen/AArch64/srem-seteq-optsize.ll
The file was added/llvm/trunk/test/CodeGen/AArch64/srem-seteq-vec-nonsplat.llllvm.src/test/CodeGen/AArch64/srem-seteq-vec-nonsplat.ll
The file was added/llvm/trunk/test/CodeGen/AArch64/srem-seteq-vec-splat.llllvm.src/test/CodeGen/AArch64/srem-seteq-vec-splat.ll
The file was added/llvm/trunk/test/CodeGen/AArch64/srem-seteq.llllvm.src/test/CodeGen/AArch64/srem-seteq.ll
The file was added/llvm/trunk/test/CodeGen/X86/srem-seteq-optsize.llllvm.src/test/CodeGen/X86/srem-seteq-optsize.ll
The file was added/llvm/trunk/test/CodeGen/X86/srem-seteq-vec-nonsplat.llllvm.src/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
The file was added/llvm/trunk/test/CodeGen/X86/srem-seteq-vec-splat.llllvm.src/test/CodeGen/X86/srem-seteq-vec-splat.ll
The file was added/llvm/trunk/test/CodeGen/X86/srem-seteq.llllvm.src/test/CodeGen/X86/srem-seteq.ll