SuccessChanges

Summary

  1. Reland [ELF] Loose a condition for relocation with a symbol This patch was not the reason of the buildbot failure. Deleted code was introduced as a work around for a bug in the gold linker (http://sourceware.org/PR16794). Test case that was given as a reason for this part of code, the one on previous link, now works for the gold. This condition is too strict and when a code is compiled with debug info it forces generation of numerous relocations with symbol for architectures that do not have relocation addend. Reviewers: arsenm, espindola Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D64327
  2. AMDGPU/GlobalISel: Remove unnecessary code The minnum/maxnum case are dead, and the cvt is handled by the default.
  3. [ARM] Fix for MVE VPT block pass We need to ensure that the number of T's is correct when adding multiple instructions into the same VPT block. Differential revision: https://reviews.llvm.org/D65049
  4. Updated the signature for some stack related intrinsics (CLANG) Modified the intrinsics int_addressofreturnaddress, int_frameaddress & int_sponentry. This commit depends on the changes in rL366679 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D64563
  5. Revert the change to the [[nodiscard]] feature test macro value. This value only gets bumped once both P1301 and P1771 are implemented.
  6. [X86] EltsFromConsecutiveLoads - support common source loads (REAPPLIED) This patch enables us to find the source loads for each element, splitting them into a Load and ByteOffset, and attempts to recognise consecutive loads that are in fact from the same source load. A helper function, findEltLoadSrc, recurses to find a LoadSDNode and determines the element's byte offset within it. When attempting to match consecutive loads, byte offsetted loads then attempt to matched against a previous load that has already been confirmed to be a consecutive match. Next step towards PR16739 - after this we just need to account for shuffling/repeated elements to create a vector load + shuffle. Fixed out of bounds load assert identified in rL366501 Differential Revision: https://reviews.llvm.org/D64551
  7. AMDGPU/GlobalISel: Fix tests without asserts The legality check is only done under NDEBUG, so the failure cases are different in a release build.
  8. Added address-space mangling for stack related intrinsics Modified the following 3 intrinsics: int_addressofreturnaddress, int_frameaddress & int_sponentry. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D64561
Revision 366686 by nikolaprica:
Reland [ELF] Loose a condition for relocation with a symbol

This patch was not the reason of the buildbot failure.

Deleted code was introduced as a work around for a bug in the gold linker
(http://sourceware.org/PR16794). Test case that was given as a reason for
this part of code, the one on previous link, now works for the gold.
This condition is too strict and when a code is compiled with debug info
it forces generation of numerous relocations with symbol for architectures
that do not have relocation addend.

Reviewers: arsenm, espindola

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D64327
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/MC/ELFObjectWriter.cpp (diff)llvm.src/lib/MC/ELFObjectWriter.cpp
The file was modified/llvm/trunk/test/MC/ELF/basic-elf-32.s (diff)llvm.src/test/MC/ELF/basic-elf-32.s
The file was modified/llvm/trunk/test/MC/ELF/compression.s (diff)llvm.src/test/MC/ELF/compression.s
The file was modified/llvm/trunk/test/MC/ELF/relocation-386.s (diff)llvm.src/test/MC/ELF/relocation-386.s
The file was modified/llvm/trunk/test/MC/Mips/elf-relsym.s (diff)llvm.src/test/MC/Mips/elf-relsym.s
The file was modified/llvm/trunk/test/MC/Mips/xgot.s (diff)llvm.src/test/MC/Mips/xgot.s
Revision 366685 by arsenm:
AMDGPU/GlobalISel: Remove unnecessary code

The minnum/maxnum case are dead, and the cvt is handled by the
default.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Revision 366684 by dmgreen:
[ARM] Fix for MVE VPT block pass

We need to ensure that the number of T's is correct when adding multiple
instructions into the same VPT block.

Differential revision: https://reviews.llvm.org/D65049
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/Thumb2ITBlockPass.cpp (diff)llvm.src/lib/Target/ARM/Thumb2ITBlockPass.cpp
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir (diff)llvm.src/test/CodeGen/Thumb2/mve-vpt-block2.mir
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir (diff)llvm.src/test/CodeGen/Thumb2/mve-vpt-block3.mir
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir (diff)llvm.src/test/CodeGen/Thumb2/mve-vpt-block4.mir
The file was modified/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir (diff)llvm.src/test/CodeGen/Thumb2/mve-vpt-block5.mir
Revision 366683 by cdevadas:
Updated the signature for some stack related intrinsics (CLANG)

Modified the intrinsics
int_addressofreturnaddress,
int_frameaddress & int_sponentry.
This commit depends on the changes in rL366679

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D64563
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/CodeGen/CGBuiltin.cpp (diff)clang.src/lib/CodeGen/CGBuiltin.cpp
The file was modified/cfe/trunk/lib/CodeGen/CGException.cpp (diff)clang.src/lib/CodeGen/CGException.cpp
The file was modified/cfe/trunk/test/CodeGen/builtin-sponentry.c (diff)clang.src/test/CodeGen/builtin-sponentry.c
The file was modified/cfe/trunk/test/CodeGen/exceptions-seh.c (diff)clang.src/test/CodeGen/exceptions-seh.c
The file was modified/cfe/trunk/test/CodeGen/integer-overflow.c (diff)clang.src/test/CodeGen/integer-overflow.c
The file was modified/cfe/trunk/test/CodeGen/ms-intrinsics.c (diff)clang.src/test/CodeGen/ms-intrinsics.c
The file was modified/cfe/trunk/test/CodeGen/ms-setjmp.c (diff)clang.src/test/CodeGen/ms-setjmp.c
The file was modified/cfe/trunk/test/CodeGenOpenCL/builtins-generic-amdgcn.cl (diff)clang.src/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
Revision 366682 by aaronballman:
Revert the change to the [[nodiscard]] feature test macro value.

This value only gets bumped once both P1301 and P1771 are implemented.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/Attr.td (diff)clang.src/include/clang/Basic/Attr.td
The file was modified/cfe/trunk/test/Preprocessor/has_attribute.cpp (diff)clang.src/test/Preprocessor/has_attribute.cpp
Revision 366681 by rksimon:
[X86] EltsFromConsecutiveLoads - support common source loads (REAPPLIED)

This patch enables us to find the source loads for each element, splitting them into a Load and ByteOffset, and attempts to recognise consecutive loads that are in fact from the same source load.

A helper function, findEltLoadSrc, recurses to find a LoadSDNode and determines the element's byte offset within it. When attempting to match consecutive loads, byte offsetted loads then attempt to matched against a previous load that has already been confirmed to be a consecutive match.

Next step towards PR16739 - after this we just need to account for shuffling/repeated elements to create a vector load + shuffle.

Fixed out of bounds load assert identified in rL366501

Differential Revision: https://reviews.llvm.org/D64551
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)llvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/clear_upper_vector_element_bits.ll (diff)llvm.src/test/CodeGen/X86/clear_upper_vector_element_bits.ll
The file was modified/llvm/trunk/test/CodeGen/X86/load-partial.ll (diff)llvm.src/test/CodeGen/X86/load-partial.ll
Revision 366680 by arsenm:
AMDGPU/GlobalISel: Fix tests without asserts

The legality check is only done under NDEBUG, so the failure cases are
different in a release build.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir (diff)llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
Revision 366679 by cdevadas:
Added address-space mangling for stack related intrinsics

Modified the following 3 intrinsics:
int_addressofreturnaddress,
int_frameaddress & int_sponentry.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D64561
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/IR/Intrinsics.td (diff)llvm.src/include/llvm/IR/Intrinsics.td
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (diff)llvm.src/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modified/llvm/trunk/lib/CodeGen/SjLjEHPrepare.cpp (diff)llvm.src/lib/CodeGen/SjLjEHPrepare.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86WinEHState.cpp (diff)llvm.src/lib/Target/X86/X86WinEHState.cpp
The file was modified/llvm/trunk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp (diff)llvm.src/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
The file was modified/llvm/trunk/lib/Transforms/Instrumentation/SanitizerCoverage.cpp (diff)llvm.src/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
The file was modified/llvm/trunk/test/Bitcode/compatibility-3.6.ll (diff)llvm.src/test/Bitcode/compatibility-3.6.ll
The file was modified/llvm/trunk/test/Bitcode/compatibility-3.7.ll (diff)llvm.src/test/Bitcode/compatibility-3.7.ll
The file was modified/llvm/trunk/test/Bitcode/compatibility-3.8.ll (diff)llvm.src/test/Bitcode/compatibility-3.8.ll
The file was modified/llvm/trunk/test/Bitcode/compatibility-3.9.ll (diff)llvm.src/test/Bitcode/compatibility-3.9.ll
The file was modified/llvm/trunk/test/Bitcode/compatibility-4.0.ll (diff)llvm.src/test/Bitcode/compatibility-4.0.ll
The file was modified/llvm/trunk/test/Bitcode/compatibility-5.0.ll (diff)llvm.src/test/Bitcode/compatibility-5.0.ll
The file was modified/llvm/trunk/test/Bitcode/compatibility-6.0.ll (diff)llvm.src/test/Bitcode/compatibility-6.0.ll
The file was modified/llvm/trunk/test/Bitcode/compatibility.ll (diff)llvm.src/test/Bitcode/compatibility.ll
The file was modified/llvm/trunk/test/Instrumentation/HWAddressSanitizer/alloca.ll (diff)llvm.src/test/Instrumentation/HWAddressSanitizer/alloca.ll
The file was modified/llvm/trunk/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll (diff)llvm.src/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
The file was modified/llvm/trunk/test/Instrumentation/SanitizerCoverage/stack-depth.ll (diff)llvm.src/test/Instrumentation/SanitizerCoverage/stack-depth.ll
The file was modified/llvm/trunk/test/Verifier/intrinsic-immarg.ll (diff)llvm.src/test/Verifier/intrinsic-immarg.ll