Started 2 mo 27 days ago
Took 1 hr 7 min on green-dragon-22

Success Build rL:366813 - C:366792 - #63435 (Jul 23, 2019 7:50:31 AM)

  • : 366813
  • : 366792
  1. [llvm-ar] Fix support for archives with members larger than 4GB

    llvm-ar outputs a strange error message when handling archives with
    members larger than 4GB due to not checking file size when passing the
    value as an unsigned 32 bit integer. This overflow issue caused
    malformed archives to be created.:

    This change allows for members above 4GB and will error in a case that
    is over the formats size limit, a 10 digit decimal integer.

    Differential Revision: (detail/ViewSVN)
    by gbreynoo
  2. [ARM][LowOverheadLoops] Fix branch target codegen
    While lowering test.set.loop.iterations, it wasn't checked how the
    brcond was using the result and so the wls could branch to the loop
    preheader instead of not entering it. The same was true for
    So brcond and br_cc and now lowered manually when using the hwloop
    intrinsics. During this we now check whether the result has been
    negated and whether we're using SETEQ or SETNE and 0 or 1. We can
    then figure out which basic block the WLS and LE should be targeting.

    Differential Revision: (detail/ViewSVN)
    by sam_parker
  3. Fix MSVC warning about extending a uint32_t shift result to uint64_t. NFCI. (detail/ViewSVN)
    by rksimon
  4. [SLPVectorizer] Revert local change that got accidently got committed in rL366799

    This wasn't part of D63281 (detail/ViewSVN)
    by rksimon
  5. Revert [RISCV] Re-enable rv32i-aliases-invalid.s test

    This reverts r366797 (git commit 53f9fec8e8b58f5a904bbfb4a1d648cde65aa860) (detail/ViewSVN)
    by lenary
  6. [NFC][InstCombine] Fixup commutative/negative tests with icmp preds in @llvm.umul.with.overflow tests (detail/ViewSVN)
    by lebedevri
  7. [InstSimplify][NFC] Tests for skipping 'div-by-0' checks before inverted @llvm.umul.with.overflow

    It would be already handled by the non-inverted case if we were hoisting
    the `not` in InstCombine, but we don't (granted, we don't sink it
    in this case either), so this is a separate case. (detail/ViewSVN)
    by lebedevri
  8. [NFC][PhaseOredering][SimplifyCFG] Add more runlines to umul.with.overflow tests

    This way it will be more obvious that the problem is both
    in cost threshold and in hardcoded benefit check,
    plus will show how the instsimplify cleans this all in the end. (detail/ViewSVN)
    by lebedevri
  9. [TargetLowering] Add SimplifyMultipleUseDemandedBits

    This patch introduces the DAG version of SimplifyMultipleUseDemandedBits, which attempts to peek through ops (mainly and/or/xor so far) that don't contribute to the demandedbits/elts of a node - which means we can do this even in cases where we have multiple uses of an op, which normally requires us to demanded all bits/elts. The intention is to remove a similar instruction - SelectionDAG::GetDemandedBits - once SimplifyMultipleUseDemandedBits has matured.

    The InstCombine version of SimplifyMultipleUseDemandedBits can constant fold which I haven't added here yet, and so far I've only wired this up to some basic binops (and/or/xor/add/sub/mul) to demonstrate its use.

    We do see a couple of regressions that need to be addressed:

        AMDGPU unsigned dot product codegen retains an AND mask (for ZERO_EXTEND) that it previously removed (but otherwise the dotproduct codegen is a lot better).

        X86/AVX2 has poor handling of vector ANY_EXTEND/ANY_EXTEND_VECTOR_INREG - it prematurely gets converted to ZERO_EXTEND_VECTOR_INREG.

    The code owners have confirmed its ok for these cases to fixed up in future patches.

    Differential Revision: (detail/ViewSVN)
    by rksimon

Started by an SCM change (7 times)

This run spent:

  • 2 hr 9 min waiting;
  • 1 hr 7 min build duration;
  • 3 hr 16 min total from scheduled to completion.
LLVM/Clang Warnings: 0 warnings.
Test Result (no failures)