Started 3 mo 1 day ago
Took 3 hr 18 min on green-dragon-16

Success Build rL:371542 - C:371530 - #537 (Sep 10, 2019 11:34:19 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 371542
  • http://llvm.org/svn/llvm-project/cfe/trunk : 371530
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 371453
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/zorg/trunk : 371154
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 371324
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 371504
Changes
  1. GlobalISel/TableGen: Handle REG_SEQUENCE patterns

    The scalar f64 patterns don't work yet because they fail on multiple
    results from the unused implicit def of scc in the result bit
    operation. (detail/ViewSVN)
    by arsenm

Started by an SCM change

This run spent:

  • 32 min waiting;
  • 3 hr 18 min build duration;
  • 3 hr 50 min total from scheduled to completion.
LLVM/Clang Warnings: 1 warning.
    Test Result (no failures)