Commit
3e80686186828bc0287407cbe406de728a6b1f40
by i[test] Fix clang/test/CodeGen tests
|
 | clang/test/CodeGen/thinlto-distributed-cfi-devirt.ll |
| clang/test/CodeGen/thinlto-distributed-cfi.ll |
Commit
e19ec9ca41b8549d8683cc221445b0ce1dc29924
by llvmgnsyncbot[gn build] Port 0b50fa99452f
|
| llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn |
Commit
61a66e4b5ec18e9e73c2f6334f6b7f7dd4bca77e
by rnkRevert "Suppress non-conforming GNU paste extension in all standard-conforming modes"
This reverts commit f4537935dcdbf390c863591cf556e76c3abab9c1.
This reverts commit b43c26d036dcbf7a6881f39e4434cf059364022a.
This GNU and MSVC extension turns out to be very popular. Most projects
are not using C++20, so cannot use the new __VA_OPT__ feature to be
standards conformant. The other workaround, using -std=gnu*, enables too
many language extensions and isn't viable.
Until there is a way for users to get the behavior provided by the
`, ## __VA_ARGS__` extension in the -std=c++17 and earlier language
modes, we need to revert this.
|
| clang/test/Preprocessor/macro_fn_comma_swallow2.c |
| clang/lib/Lex/TokenLexer.cpp |
Commit
810599241868f05c71da961f6293a19aec176548
by julian.lettner[lit][NFC] Use enum to represent test order
Use an enum to more explicitly represent the test execution order.
|
| llvm/utils/lit/lit/cl_arguments.py |
| llvm/utils/lit/lit/main.py |
Commit
98c21ae7a8ec587febc899753b63054ae9aea9d6
by mvanotti[sanitizer][fuchsia] Implement ReleaseMemoryPagesToOS
The `zx_vmar_op_range` allows us to decommit memory pages without
needing a handle to the underlying vmo, as long as we have a handle to
a vmar that contains this mapping. This allows us to implement the
`ReleaseMemoryPagesToOS` function by decommitting the memory using a
handle to the root vmar.
Reviewed By: mcgrathr
Differential Revision: https://reviews.llvm.org/D95384
|
| compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp |
Commit
d90bb66dd931a45cae3399dc76942bf8e412fa7b
by sivachandra[libc] Include only the relevant header files in the integration test.
|
| libc/utils/HdrGen/PrototypeTestGen/PrototypeTestGen.cpp |
| libc/config/linux/aarch64/headers.txt |
Commit
ab93c18c125f0ee51959ef225fa8f09f4dc29e35
by spatel[LoopVectorize] use IR fast-math-flags exclusively (not FP function attributes)
I am trying to untangle the fast-math-flags propagation logic
in the vectorizers (see a6f022127 for SLP).
The loop vectorizer has a mix of checking FP function attributes,
IR-level FMF, and just wrong assumptions.
I am trying to avoid regressions while fixing this, and I think
the IR-level logic is good enough for that, but it's hard to say
for sure. This would be the 1st step in the clean-up.
The existing test that I changed to include 'fast' actually shows
a miscompile: the function only had the equivalent of nnan, but we
created new instructions that had fast (all FMF set). This is
similar to the example in https://llvm.org/PR35538
Differential Revision: https://reviews.llvm.org/D95452
|
| llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp |
| llvm/lib/Transforms/Vectorize/VPlan.h |
| llvm/unittests/Transforms/Vectorize/VPlanTest.cpp |
| llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h |
| llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
| llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll |
Commit
5748a71ba3da69e9f0bfb2024eadfe6eeacade01
by jrtc27[builtins] Fix integer/pointer confusion in gcc_personality_v0.c
This fixes the implementation for architectures like CHERI with strong
pointer provenance (pointers, and thus uintptr_t, are represented as
hardware capabilities). Specifically, adding two uintptr_t's together
(as is done for `start + length` and `funcStart + landingPad`) has
ambiguous provenance, whereas using a plain integer (such as size_t) for
the offset operand does not. Also, readULEB128 is creating a plain
integer, not a pointer.
On all currently-supported architectures this should be an NFC, as
size_t and uintptr_t end up being the same underlying plain integer
type.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D95537
|
| compiler-rt/lib/builtins/gcc_personality_v0.c |
Commit
e47a388bd6486d0af7066f1d8b033a13d0ffc7df
by jrtc27[builtins] Fix build after D95537 due to missing size_t
Strangely int_lib.h only includes stdint.h and not stddef.h, so we need
to include the latter to be able to use size_t here.
|
| compiler-rt/lib/builtins/gcc_personality_v0.c |
Commit
a40e01e4423ca13052f0fe0e5bc14abec1dd866e
by craig.topper[RISCV] Rework fault first only load isel.
-Remove the ISD opcode for READ_VL. Just emit the MachineSDNode directly.
-Move segmented fault first only load intrinsic handling completely to
RISCVISelDAGToDAG.cpp and emit the ReadVL MachineSDNode there
instead of lowering to ISD opcodes first.
|
| llvm/lib/Target/RISCV/RISCVISelLowering.h |
| llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
| llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
Commit
e958d491570633b7ae5ef5cbc83be43cc0e4c0fe
by sivachandra[libc] Fix the CMake var name of the list of public headers.
|
| libc/config/linux/aarch64/headers.txt |
Commit
ff038b316d771f97e66f7882bcaef70cc6a74dc5
by craig.topper[RISCV] Reduce field sizes in searchable tables to reduce binary size.
|
| llvm/lib/Target/RISCV/RISCVISelLowering.h |
Commit
9f87c6b47df977f2be04535021e7fd08abb9376d
by jonathan.l.peyton[OpenMP] Fix HWLOC topology detection for 2.0.x
HWLOC 2.0 has numa nodes as separate children and are not in the main
parent/child topology tree anymore. This change takes this into
account. The main topology detection loop in the create_hwloc_map()
routine starts at a hardware thread within the initial affinity mask and
goes up the topology tree setting the socket/core/thread labels
correctly.
This change also introduces some of the more generic changes that the
future kmp_topology_t structure will take advantage of including a
generic ratio & count array (finding all ratios of topology layers like
threads/core cores/socket and finding all counts of each topology
layer), generic radix1 reduction step, generic uniformity check, and
generic printing of topology (en_US.txt)
Differential Revision: https://reviews.llvm.org/D95156
|
| openmp/runtime/src/i18n/en_US.txt |
| openmp/runtime/src/kmp.h |
| openmp/runtime/src/kmp_affinity.cpp |
Commit
598c590b3c9684471a5186221c500b1fd7a4e325
by jonathan.l.peyton[OpenMP] Add cpuid leaf 1f topology discovery
This patch adds the new algorithm for topology discovery using cpuid
leaf 1f. Only the new die level is detected and integrated into the
current affinity mechanisms including KMP_AFFINITY (granularity level
and compact/scatter algorithm), OMP_PLACES=dies, and KMP_HW_SUBSET.
Differential Revision: https://reviews.llvm.org/D95157
|
| openmp/runtime/src/i18n/en_US.txt |
| openmp/runtime/src/kmp_global.cpp |
| openmp/runtime/src/kmp.h |
| openmp/runtime/src/kmp_settings.cpp |
| openmp/runtime/src/kmp_affinity.cpp |
Commit
8e6713436462daa43d84f8450d07a54f7657c31b
by jonathan.l.peyton[OpenMP] Fix misleading warning for OMP_PLACES
When OMP_PLACES contains an invalid value, the warning informs the user
that the fallback is OMP_PLACES=threads, but the actual internal setting
is OMP_PLACES=cores and is detected as such with KMP_SETTINGS=1.
This patch informs the user that OMP_PLACES=cores is being used instead
of OMP_PLACES=threads.
Differential Revision: https://reviews.llvm.org/D95170
|
| openmp/runtime/src/kmp_settings.cpp |
 | openmp/runtime/test/affinity/omp-places-invalid-syntax.c |
Commit
9f2c7effd7f386e95aff3358500bc30974d35b0d
by aaronParse different attribute syntaxes in arbitrary order
In Clang today, we parse the different attribute syntaxes
(__attribute__, __declspec, and [[]]) in a fairly rigid order. This
leads to confusion for users when they guess the order incorrectly,
and leads to bug reports like PR24559 or necessitates changes like
D94788.
This patch adds a helper function to allow us to more easily parse
attributes in arbitrary order, and then updates all of the places
where we would parse two or more different syntaxes in a rigid order to
use the helper method. The patch does not attempt to handle Microsoft
attributes ([]) because those are ambiguous with other code constructs
and we don't have any attributes that use the syntax.
|
| clang/lib/Parse/ParseDecl.cpp |
| clang/test/SemaOpenCL/address-spaces.cl |
| clang/lib/Parse/ParseObjc.cpp |
| clang/lib/Parse/ParseDeclCXX.cpp |
| clang/lib/Parse/ParseExprCXX.cpp |
| clang/include/clang/Parse/Parser.h |
| clang/test/Parser/attr-order.cpp |
Commit
0436ec2128c9775ba13b0308937238fc79673fdd
by richardPermit __VA_OPT__ in all language modes and allow it to be detected with #ifdef.
These changes are intended to give code a path to move away from the GNU
,##__VA_ARGS__ extension, which is non-conforming in some situations and
which we'd like to disable in our conforming mode in those cases.
|
| clang/lib/Lex/Preprocessor.cpp |
| clang/test/Preprocessor/macro_vaopt_check.cpp |
| clang/lib/Lex/PPExpressions.cpp |
| clang/lib/Lex/PPMacroExpansion.cpp |
| clang/include/clang/Lex/VariadicMacroSupport.h |
| clang/test/Preprocessor/macro_vaopt_expand.cpp |
| clang/include/clang/Lex/Preprocessor.h |
| clang/lib/Lex/PPDirectives.cpp |
Commit
ba379fe5276b4a922ab19eb8af9ba5bece81cdff
by kostyak[scudo][standalone] Restore GWP-ASan flag parsing
With D92696, the Scudo Standalone GWP-ASan flag parsing was changed to
the new GWP-ASan optional one. We do not necessarily want this, as this
duplicates flag parsing code in Scudo Standalone when using the
GWP-ASan integration.
This CL reverts the changes within Scudo Standalone, and increases
`MaxFlags` to 20 as an addionnal option got us to the current max.
Differential Revision: https://reviews.llvm.org/D95542
|
| compiler-rt/lib/scudo/standalone/combined.h |
| compiler-rt/lib/scudo/standalone/CMakeLists.txt |
| compiler-rt/lib/scudo/standalone/tests/flags_test.cpp |
| compiler-rt/lib/scudo/standalone/flags_parser.h |
| compiler-rt/lib/scudo/standalone/tests/CMakeLists.txt |
| compiler-rt/test/scudo/standalone/unit/lit.site.cfg.py.in |
| compiler-rt/lib/scudo/standalone/flags.cpp |
Commit
c23a6dcb6660bc29134121018fcb197cc8b8b68b
by aaronSilence a -Wlogical-op-parentheses diagnostic; NFC
|
| clang/include/clang/Parse/Parser.h |
Commit
ec5a782c10aee9393e712501e67ea10b5812dee2
by sivachandra[libc] Fix list of public headers usable on aarch64.
|
| libc/config/linux/aarch64/headers.txt |
Commit
5d3dca24aab847f0fdfd558987c1c28469e2f31e
by aaronIgnore unknown attribute warnings in this test
We're testing the parsing behavior, not the actual attributes used, and
the attribute name cannot be elided for __declspec attributes.
|
| clang/test/Parser/attr-order.cpp |
Commit
262c50856a377371cbea673419143ae45c590b7e
by eugenis[sanitizer] Fix crash on empty strings.
Patch by Vyacheslav Chigrin.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D95431
|
| compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp |
Commit
ab5591e1d8f5abcfa9e75193d3e8a29087b61425
by a20012251Fix runInTerminal failures on Windows
stella.stemenova mentioned in https://reviews.llvm.org/D93951 failures on Windows for this test.
I'm fixing the macro definitions and disabling the tests for python
versions lower than 3.7. I'll figure out that actual issue with
python3.6 after the buildbots are fine again.
|
| lldb/tools/lldb-vscode/lldb-vscode.cpp |
| lldb/tools/lldb-vscode/FifoFiles.cpp |
| lldb/test/API/tools/lldb-vscode/runInTerminal/TestVSCode_runInTerminal.py |
| lldb/tools/lldb-vscode/FifoFiles.h |
Commit
2fb0a0fef8bfccf317b788ecae8379c8a1d6b650
by david.green[ARM] Add BE check variants for soft-fp test. NFC
|
| llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll |
Commit
e53247ca42059f0270385ef0ccf550dd600c2d2d
by eugenisRevert "[sanitizer] Fix crash on empty strings."
Wrong author name, will recommit shortly.
This reverts commit 262c50856a377371cbea673419143ae45c590b7e.
|
| compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp |
Commit
f79937140d07e176924a05d9870e3d5060469b08
by eugenis[sanitizer] Fix crash on empty strings.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D95431
|
| compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp |
Commit
44f792966e0f2935ea9e0ce96a4f35e01bfe6b61
by varun_gandhi[Demangle] Support demangling Swift calling convention in MS demangler.
Previously, Clang was able to mangle the Swift calling
convention but 'MicrosoftDemangle.cpp' was not able to demangle it.
Reviewed By: compnerd, rnk
Differential Revision: https://reviews.llvm.org/D95053
|
| clang/lib/AST/MicrosoftMangle.cpp |
| llvm/lib/Demangle/MicrosoftDemangleNodes.cpp |
| llvm/include/llvm/Demangle/MicrosoftDemangleNodes.h |
| llvm/lib/Demangle/MicrosoftDemangle.cpp |
| llvm/test/Demangle/ms-mangle.test |
Commit
5dfa37a76153f2a18ac7fe30721cc1332b672ea2
by richardDon't allow __VA_OPT__ to be detected by #ifdef.
More study has discovered this to not actually be useful: because
current C++20 implementations reject `#ifdef __VA_OPT__`, this can't
really be used as a feature-test mechanism. And it's not too hard to
detect __VA_OPT__ without this, for example:
#define THIRD_ARG(a, b, c, ...) c
#define HAS_VA_OPT(...) THIRD_ARG(__VA_OPT__(,), 1, 0, )
#if HAS_VA_OPT(?)
Partially reverts 0436ec2128c9775ba13b0308937238fc79673fdd.
|
| clang/include/clang/Lex/Preprocessor.h |
| clang/lib/Lex/PPMacroExpansion.cpp |
| clang/lib/Lex/Preprocessor.cpp |
| clang/lib/Lex/PPExpressions.cpp |
| clang/lib/Lex/PPDirectives.cpp |
| clang/test/Preprocessor/macro_vaopt_check.cpp |
Commit
58aa049b9b80e342e3f6769f0834dabf41476bef
by craig.topper[RISCV] Move RISCVVPseudosTable from RISCVBaseInfo.h to RISCVInstrInfo.h. NFC
RISCVBaseInfo.h belongs to the MC layer, but the Pseudo instructions
are only used by the CodeGen layer. So it makes sense to keep this
table in the CodeGen layer.
|
| llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h |
| llvm/lib/Target/RISCV/RISCVInstrInfo.cpp |
| llvm/lib/Target/RISCV/RISCVInstrInfo.h |
| llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp |
Commit
9c7aeaebb3ac1b94200b59b111742cb6b8f090c2
by jyknightItanium Mangling: Mangle `__alignof__` differently than `alignof`.
The two operations have acted differently since Clang 8, but were
unfortunately mangled the same. The new mangling uses new "vendor
extended expression" syntax proposed in
https://github.com/itanium-cxx-abi/cxx-abi/issues/112
GCC had the same mangling problem, https://gcc.gnu.org/PR88115, and
will hopefully be switching to the same mangling as implemented here.
Additionally, fix the mangling of `__uuidof` to use the new extension
syntax, instead of its previous nonstandard special-case.
Adjusts the demangler accordingly.
Differential Revision: https://reviews.llvm.org/D93922
|
| clang/test/CodeGenCXX/microsoft-uuidof-mangling.cpp |
| libcxxabi/src/demangle/ItaniumDemangle.h |
| libcxxabi/test/test_demangle.pass.cpp |
| clang/lib/AST/ItaniumMangle.cpp |
| clang/test/CodeGenCXX/mangle-alignof.cpp |
| llvm/include/llvm/Demangle/ItaniumDemangle.h |
Commit
8ca33605ff0cfc536f5c6710fb5f6378bf11959a
by jyknightItanium Mangling: Fix handling of <expr-primary> in <template-arg>.
Previously, we were emitting an extraneous X .. E in <template-arg>
around an <expr-primary> if the template argument was constructed from
an expression (rather than an already-evaluated literal value). In
such a case, we would then e.g. emit 'XLi0EE' instead of 'Li0E'.
We had one special-case for DeclRefExpr expressions, in particular, to
omit them the mangled-name without the surrounding X/E. However,
unfortunately, that special case also triggered for ParmVarDecl (a
subtype of VarDecl), and _incorrectly_ emitted 'L_Z .. E' instead of
the proper 'Xfp_E'.
This change causes mangleExpression itself to be responsible for
emitting X/E around non-primary expressions, which removes the
special-case, and corrects both these problems.
Differential Revision: https://reviews.llvm.org/D95487
|
| clang/lib/AST/ItaniumMangle.cpp |
| clang/test/CodeGenCXX/mangle-template.cpp |
| clang/test/CodeGenCXX/clang-abi-compat.cpp |
| clang/test/CodeGenCXX/microsoft-uuidof-mangling.cpp |
| clang/test/CodeGenCXX/mangle.cpp |
| clang/test/CodeGenCXX/mangle-concept.cpp |
| clang/test/CodeGenCXX/mangle-abi-tag.cpp |
| clang/test/CodeGenCXX/matrix-type.cpp |
Commit
a7246ba02a8923f316419a62d836dbe1c0b437bd
by jyknightItanium Mangling: In 'enable_if', omit X/E around <expr-primary>.
The Clang enable_if extension is mangled as an <extended-qualifier>,
which is supposed to contain <template-args>. However, we were
unconditionally emitting X/E around its arguments, neglecting the fact
that <expr-primary> should be emitted directly without the surrounding
X/E.
Differential Revision: https://reviews.llvm.org/D95488
|
| clang/lib/AST/ItaniumMangle.cpp |
| clang/test/CodeGenCXX/clang-abi-compat.cpp |
| clang/test/CodeGenCXX/enable_if.cpp |
| clang/test/CodeGen/enable_if.c |
Commit
7e6c87ee045497ee0b6b7e55e54921b274e8a9f2
by dblaikieDebugInfo: Deduplicate addresses in debug_addr
Experimental, using non-existent DWARF support to use an expr for the
location involving an addr_index (to compute address + offset so
addresses can be reused in more places).
The global variable debug info had to be deferred until the end of the
module (so bss variables would all be emitted first - so their labels
would have the relevant section). Non-bss variables seemed to not have
their label assigned to a section even at the end of the module, so I
didn't know what to do there.
Also, the hashing code is broken - doesn't know how to hash these
expressions (& isn't hashing anything inside subprograms, which seems
problematic), so for test purposes this change just skips the hash
computation. (GCC's actually overly sensitive in its hash function, it
seems - I'm forgetting the specific case right now - anyway, we might
want to just use the frontend-known file hash and give up on optimistic
.dwo/.dwp reuse)
|
| llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp |
| llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h |
| llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp |
| llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h |
| llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp |
| llvm/test/DebugInfo/X86/ranges_always.ll |
| llvm/lib/CodeGen/AsmPrinter/DIE.cpp |
Commit
fb12df4a8e33d759938057718273dfb434b2d9c4
by tianshilei1992[OpenMP][NVPTX] Disable building NVPTX deviceRTL by default on a non-CUDA system
D95466 dropped CUDA to build NVPTX deviceRTL and enabled it by default.
However, the building requires some libraries that are not available on non-CUDA
system by default, which could break the compilation. This patch disabled the
build by default. It can be enabled with `LIBOMPTARGET_BUILD_NVPTX_BCLIB=ON`.
Reviewed By: kparzysz
Differential Revision: https://reviews.llvm.org/D95556
|
| openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt |
Commit
3d25fdc5c21f174d38ac78dd01ccaf6eec655bc0
by Jessica Paquette[AArch64][GlobalISel] Allow vector store legalization into 128-bit-wide types
We are allowed to store 128-bit-wide values using the q registers on AArch64.
GlobalISel was clamping the number of elements in vector stores into 64 bits
instead.
This results in some poor codegen like below:
https://godbolt.org/z/E56dq8
```
; SDAG uses a stp + q registers in both cases here.
define void @float(<16 x float> %val, <16 x float>* %ptr) {
store <16 x float> %val, <16 x float>* %ptr
ret void
}
define void @double(<8 x double> %val, <8 x double>* %ptr) {
store <8 x double> %val, <8 x double>* %ptr
ret void
}
```
This adds similar legalization for vector stores with s8 and s16 elements.
Differential Revision: https://reviews.llvm.org/D95107
|
| llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpext.mir |
| llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir |
| llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir |
| llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp |
Commit
7e88942d2548704b35ac92bd327b38f9c6a991d2
by lebedev.ri[CodeGen] IndirectBrExpandPass: preserve Dominator Tree, if available
This fully de-pessimizes the common case of no indirectbr's,
(where we don't actually need to do anything to preserve domtree)
and avoids domtree recomputation in the case there were indirectbr's.
Note that two indirectbr's could have a common successor, and not all
successors of an indirectbr's are meant to survive the expansion.
Though, the code assumes that an indirectbr's doesn't have
duplicate successors, those *should* have been deduplicated
by simplifycfg or something already.
|
| llvm/test/CodeGen/X86/opt-pipeline.ll |
| llvm/lib/CodeGen/IndirectBrExpandPass.cpp |
Commit
764a7a2155c6747ec8d0b38d8edbb65960eae874
by thakisclang: Fix static_assert in a few contexts in microsoft mode
Follow-up to D17444. Fixes PR48904. See bug for details.
Differential Revision: https://reviews.llvm.org/D95559
|
| clang/lib/Parse/ParseDecl.cpp |
| clang/test/Sema/static-assert.c |
Commit
6110e7716cd0000fdeb2a7edfbec7c9991f1a08a
by pklausler[flang] Search for #include "file" in right directory (take 2)
Make the #include "file" preprocessing directive begin its
search in the same directory as the file containing the directive,
as other preprocessors and our Fortran INCLUDE statement do.
Avoid current working directory for all source files except the original.
Resolve tests.
Differential Revision: https://reviews.llvm.org/D95481
|
| flang/lib/Parser/prescan.cpp |
| flang/include/flang/Parser/provenance.h |
| flang/include/flang/Parser/source.h |
| flang/lib/Parser/source.cpp |
| flang/test/Flang-Driver/Inputs/basictestmoduleone.mod |
| flang/test/Flang-Driver/include-module.f90 |
| flang/lib/Frontend/FrontendActions.cpp |
| flang/unittests/Frontend/FrontendActionTest.cpp |
| flang/test/Flang-Driver/Inputs/module-dir/basictestmoduletwo.mod |
| flang/lib/Parser/parsing.cpp |
| flang/test/Flang-Driver/Inputs/module-dir/basictestmoduleone.mod |
| flang/test/Flang-Driver/include-header.f90 |
| flang/lib/Parser/provenance.cpp |
| flang/lib/Parser/preprocessor.cpp |
| flang/tools/f18/f18.cpp |
Commit
1487747e990ce9f8851f3d92c3006a74134d7518
by tejohnson[LTO] Prevent devirtualization for symbols dynamically exported
Identify dynamically exported symbols (--export-dynamic[-symbol=],
--dynamic-list=, or definitions needed to preempt shared objects) and
prevent their LTO visibility from being upgraded.
This helps avoid use of whole program devirtualization when there may
be overrides in dynamic libraries.
Differential Revision: https://reviews.llvm.org/D91583
|
| lld/test/ELF/lto/devirt_vcall_vis_public.ll |
| llvm/lib/LTO/LTOCodeGenerator.cpp |
| llvm/tools/gold/gold-plugin.cpp |
| lld/ELF/LTO.cpp |
| llvm/lib/LTO/LTO.cpp |
| llvm/include/llvm/LTO/LTO.h |
| lld/ELF/Symbols.h |
| llvm/lib/LTO/ThinLTOCodeGenerator.cpp |
| lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll |
| llvm/include/llvm/Transforms/IPO/WholeProgramDevirt.h |
| llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp |
| llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll |
| llvm/tools/opt/opt.cpp |
| llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll |
Commit
727fc31a9898dfb89610ca1bc05ff86204a77177
by richard[cxx_status] Mark P0732R2 as only 'partial', not 'Clang 12', as some of
the changes were reverted.
|
| clang/www/cxx_status.html |
Commit
6612c2bb68becda5504099b48082c844503c6d4c
by i[llvm-c] Move LLVMX86_AMXTypeKind & LLVMPoisonValueValueKind to the bottom to avoid value changes compared with LLVM<=11
Fixes PR48905
|
| llvm/include/llvm-c/Core.h |
Commit
d91ee2f782ebeec7ae0b5f8ca879c4f10dccb29f
by Stanislav.Mekhanoshin[AMDGPU] Do not reassign spilled registers
We cannot call LRM::unassign() if LRM::assign() was never called
before, these are symmetrical calls. There are two ways of
assigning a physical register to virtual, via LRM::assign() and
via VRM::assignVirt2Phys(). LRM::assign() will call the VRM to
assign the register and then update LiveIntervalUnion. Inline
spiller calls VRM directly and thus LiveIntervalUnion never gets
updated. A call to LRM::unassign() then asserts about inconsistent
liveness.
We have to note that not all callers of the InlineSpiller even
have LRM to pass, RegAllocPBQP does not have it, so we cannot
always pass LRM into the spiller.
The only way to get into that spiller LRE_DidCloneVirtReg() call
is from LiveRangeEdit::eliminateDeadDefs if we split an LI.
This patch refuses to reassign a LiveInterval created by a split
to workaround the problem. In fact we cannot reassign a spill
anyway as all registers of the needed class are occupied and we
are spilling.
Fixes: SWDEV-267996
Differential Revision: https://reviews.llvm.org/D95489
|
| llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp |
| llvm/test/CodeGen/AMDGPU/regbank-reassign-split.mir |
| llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp |
| llvm/test/CodeGen/AMDGPU/nsa-reassign.mir |
Commit
29472bb76915c4929aecc938300f6df31f63ac29
by sam.mccall[clangd] Log warning when using legacy (theia) semantic highlighting.
The legacy protocol will be removed on trunk after the 12 branch cut,
and gone in clangd 13.
Differential Revision: https://reviews.llvm.org/D95031
|
| clang-tools-extra/clangd/ClangdLSPServer.cpp |
Commit
c3df9d58c75e0f89ca95e947804d65e79a491adc
by sam.mccall[clangd] Parse Diagnostics block, and nest ClangTidy block under it.
(ClangTidy configuration block hasn't been in any release, so we should be OK
to move it around like this)
Differential Revision: https://reviews.llvm.org/D95362
|
| clang-tools-extra/clangd/ConfigCompile.cpp |
| clang-tools-extra/clangd/Config.h |
| clang-tools-extra/clangd/ConfigYAML.cpp |
| clang-tools-extra/clangd/TidyProvider.cpp |
| clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp |
| clang-tools-extra/clangd/ConfigFragment.h |
| clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp |
Commit
02bc4c95f0729cc819776f73ec94a25405579183
by riddleriver[mlir][PassManager] Only reinitialize the pass manager if the context registry changes
This prevents needless reinitialization for clients that want to reuse a pass manager multiple times. A new `getRegisryHash` function is exposed by the context to give a rough indicator of when the context registry has changed.
Differential Revision: https://reviews.llvm.org/D95493
|
| mlir/include/mlir/IR/MLIRContext.h |
| mlir/lib/IR/MLIRContext.cpp |
| mlir/lib/Pass/Pass.cpp |
| mlir/include/mlir/Pass/PassManager.h |
Commit
8a77056256d9970387595a5c729d894e3fe07131
by atmndp[OpenMP][Libomptarget] Fix conditional in CMake for remote plugin
The remote offloading plugin's CMakeLists was trying to build if its
flag was enabled even if it didn't find gRPC/protobuf. The conditional
was wrong, it's fixed by this.
Differential Revision: https://reviews.llvm.org/D95574
|
| openmp/libomptarget/plugins/remote/CMakeLists.txt |
Commit
dd7297e1bffeaea533a2353489ead3b388ceed14
by dblaikieDebugInfo: Fix bug in addr+offset exprloc to use DWARFv5 addrx op instead of DWARFv4 GNU extension
|
| llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp |
| llvm/test/DebugInfo/X86/ranges_always.ll |
Commit
8d8be879795a27ec9a964b462b7530ab99d6f6e6
by carl.ritson[AMDGPU][NFC] Generate llvm.amdgcn.set.inactive tests
This is a pre-commit for D95509.
|
| llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll |
| llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll |
Commit
0fc90873b2ef9049c4aa100631acad806c3cfa72
by vyacheslav.p.zakharin[libomptarget][NFC] Link plugins with threads support library due to std::call_once usage.
Differential Revision: https://reviews.llvm.org/D95572
|
| openmp/libomptarget/cmake/Modules/LibomptargetGetDependencies.cmake |
| openmp/libomptarget/plugins/remote/src/CMakeLists.txt |
| openmp/libomptarget/plugins/remote/server/CMakeLists.txt |
| openmp/libomptarget/plugins/cuda/CMakeLists.txt |
| openmp/libomptarget/plugins/CMakeLists.txt |
Commit
2b9ed4fca64d3eaacca016621fa3735052a7fb1c
by carl.ritson[AMDGPU][NFC] Pre-commit test for D95509
|
| llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll |
| llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll |
Commit
5c1cea6f406366b85f3c200a1c48f713da4450ba
by sepavloff[Support] Fix build for Haiku
This change fixes two issues with building LLVM on Haiku. The first issue is
that LLVM requires wait4(), which on Haiku is hidden behind the _BSD_SOURCE
feature flag when using the --std=c++14 flag. Additionally, the wait4()
function is only available in libbsd.so, so this is now a dependency.
The other fix is that Haiku does not have the (non-standard) rusage.maxrss
member, so by default the used memory info will be set to 0 on this platform.
Reviewed By: sepavloff
Differential Revision: https://reviews.llvm.org/D87920
Patch by Niels Sascha Reedijk.
|
| llvm/lib/Support/Unix/Program.inc |
| llvm/lib/Support/CMakeLists.txt |
Commit
b7d63244226ba2c0df651622fe7fe3f5f8aba262
by iIntrinsicEmitter: Change IntrinsicsToAttributesMap from uint8_t[] to uint16_t[]
We need at least 252 UniqAttributes now, which will soon overflow.
Actually with downstream backends we can easily use up the last few values.
So bump to uint16_t.
|
| llvm/utils/TableGen/IntrinsicEmitter.cpp |
Commit
5d05cdf55cdb3910d152ceb967de13bdd6295f56
by craig.topper[RISCV] Copy isUnneededShiftMask from X86.
In d2927f786e877410d90c1e6f0e0c7d99524529c5, I added patterns
to remove (and X, 31) from sllw/srlw/sraw shift amounts.
There is code in SelectionDAGISel.cpp that knows to use
computeKnownBits to fill in bits of the mask that were removed
by SimplifyDemandedBits based on bits being known zero.
The non-W shift patterns use immbottomxlenset which allows the
mask to have more than log2(xlen) trailing ones, but doesn't
have a call to computeKnownBits to fill in bits of the mask that may
have been cleared by SimplifyDemandedBits.
This patch copies code from X86 to handle more than log2(xlen)
bottom bits set and uses computeKnownBits to fill in missing bits
before counting.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D95422
|
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
| llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll |
| llvm/lib/Target/RISCV/RISCVInstrInfo.td |
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h |
| llvm/test/CodeGen/RISCV/atomic-rmw.ll |
| llvm/test/CodeGen/RISCV/shift-masked-shamt.ll |
Commit
7e99bddfeaab2713a8bb6ca538da25b66e6efc59
by hoy[CSSPGO] Support of CS profiles in extended binary format.
This change brings up support of context-sensitive profiles in the format of extended binary. Existing sample profile reader/writer/merger code is being tweaked to reflect the fact of bracketed input contexts, like (`[...]`). The paired brackets are also needed in extbinary profiles because we don't yet have an otherwise good way to tell calling contexts apart from regular function names since the context delimiter `@` can somehow serve as a part of the C++ mangled names.
Reviewed By: wmi, wenlei
Differential Revision: https://reviews.llvm.org/D95547
|
| llvm/tools/llvm-profdata/llvm-profdata.cpp |
| llvm/include/llvm/ProfileData/SampleProfReader.h |
| llvm/tools/llvm-profgen/ProfileGenerator.cpp |
| llvm/lib/Transforms/IPO/SampleContextTracker.cpp |
| llvm/lib/ProfileData/SampleProfReader.cpp |
| llvm/test/Transforms/SampleProfile/profile-context-tracker.ll |
| llvm/test/tools/llvm-profdata/Inputs/cs-sample.proftext |
| llvm/include/llvm/ProfileData/SampleProf.h |
| llvm/lib/ProfileData/SampleProfWriter.cpp |
| llvm/test/tools/llvm-profdata/cs-sample-profile.test |
Commit
50f1aa1db5c59499b40abda1f565a3db1ebd7ee4
by powerman1st[AVR] Optimize 16-bit int shift
Reviewed By: dylanmckay
Differential Revision: https://reviews.llvm.org/D90092
|
| llvm/lib/Target/AVR/AVRISelLowering.h |
| llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp |
| llvm/test/CodeGen/AVR/shift.ll |
| llvm/lib/Target/AVR/AVRInstrInfo.td |
| llvm/lib/Target/AVR/AVRISelLowering.cpp |
Commit
f82b5a647eb7c89cc217f1f1e60225c19f70b8f9
by kazu[DebugInfo] Forward-declare PDBFile (NFC)
NativeEnumInjectedSources.h needs PDBFile but relies on a
forward declaration of PDBFile in InjectedSourceStream.h.
This patch adds a forward declaration right in
NativeEnumInjectedSources.h.
While we are at it, this patch removes the one in
InjectedSourceStream.h, where it is unnecessary.
|
| llvm/include/llvm/DebugInfo/PDB/Native/InjectedSourceStream.h |
| llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumInjectedSources.h |
Commit
f890fd5f9130e67aae43f3bfd00c8530cdd6edc7
by kazu[llvm] Use llvm::is_sorted (NFC)
|
| llvm/lib/Target/ARM/ARMConstantIslandPass.cpp |
| llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp |
| llvm/lib/Target/X86/X86FloatingPoint.cpp |
| llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp |
Commit
0da15ea581297fe99b9fadcbbcb10f956f3286f2
by kazu[llvm] Use append_range (NFC)
|
| llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp |
| llvm/lib/IR/IRBuilder.cpp |
| llvm/lib/CodeGen/InterleavedAccessPass.cpp |
| llvm/lib/CodeGen/MachineSSAUpdater.cpp |
| llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp |
| llvm/lib/Remarks/BitstreamRemarkSerializer.cpp |
| llvm/lib/IR/SafepointIRVerifier.cpp |
| llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp |
| llvm/lib/DebugInfo/DWARF/DWARFContext.cpp |
Commit
fc8e7411218c846386650cfba111b62827c71da0
by Piotr Sobczak[AMDGPU] Avoid an illegal operand in si-shrink-instructions
Before the patch it was possible to trigger a constant bus
violation when folding immediates into a shrunk instruction.
The patch adds a check to enforce the legality of the new operand.
Differential Revision: https://reviews.llvm.org/D95527
|
| llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp |
| llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir |
Commit
68195b15a36c338751b7abe28819345617dd70fb
by grimar[yaml2obj] - Allow empty SectionHeaderTable definitions.
Currently we don't allow the following definition:
```
Sections:
- Type: SectionHeaderTable
- Name: .foo
Type: SHT_PROGBITS
```
We report an error: "SectionHeaderTable can't be empty. Use 'NoHeaders' key to drop the section header table".
It was implemented in this way earlier, when `SectionHeaderTable`
was a dedicated key outside of the `Sections` list. And we did not
allow to select where the table is written.
Currently it makes sense to allow it, because a user might
want to place the default section header table at an arbitrary position,
e.g. before other sections. In this case it is not convenient and error prone
to require specifying all sections:
```
Sections:
- Type: SectionHeaderTable
Sections:
- Name: .foo
- Name: .strtab
- Name: .shstrtab
- Name: .foo
Type: SHT_PROGBITS
```
This patch allows empty SectionHeaderTable definitions.
Differential revision: https://reviews.llvm.org/D95341
|
| llvm/test/tools/yaml2obj/ELF/section-headers.yaml |
| llvm/lib/ObjectYAML/ELFEmitter.cpp |
| llvm/include/llvm/ObjectYAML/ELFYAML.h |
| llvm/lib/ObjectYAML/ELFYAML.cpp |
Commit
bf649181504fbfa406c4eda887564b4352d6b68e
by yuanke.luo[X86][AMX] Prevent shape def being scheduled across ldtilecfg.
Differential Revision: https://reviews.llvm.org/D95582
|
| llvm/test/CodeGen/X86/AMX/amx-sched.ll |
| llvm/lib/Target/X86/X86InstrInfo.cpp |
Commit
8644eb024bbd5bab7d8de9f5df97d931f1a8847b
by nullptr.cpp[NFC][Transforms][Coroutines] Remove unused variable
|
| llvm/lib/Transforms/Coroutines/CoroSplit.cpp |
Commit
fc4e8a3e8b4aa9a8aaa9cb8ebc44c7fda465648b
by nullptr.cpp[NFC][IR][AsmWriter] Fix Wreturn-type gcc warning
GCC warning:
```
/llvm-project/llvm/lib/IR/AsmWriter.cpp:3175:1: warning: control reaches end of non-void function [-Wreturn-type]
3175 | }
| ^
```
|
| llvm/lib/IR/AsmWriter.cpp |
Commit
01b9e613c28b833327ab4de93d0638a5c8d3514f
by tomas.matheson[Clang][Codegen] Truncate initializers of union bitfield members
If an initial value is given for a bitfield that does not fit in the
bitfield, the value should be truncated. Constant folding for
expressions did not account for this truncation in the case of union
member functions, despite a warning being emitted. In some contexts,
evaluation of expressions was not enabled unless C++11, ROPI or RWPI
was enabled.
Differential Revision: https://reviews.llvm.org/D93101
|
| clang/test/CodeGenCXX/bitfield-layout.cpp |
| clang/lib/AST/ExprConstant.cpp |
Commit
b9ed8ebe0e2ffa803b0bda60f9bbc9bb26f95000
by tomas.matheson[ARM][RegisterScavenging] Don't consider LR liveout if it is not reloaded
https://bugs.llvm.org/show_bug.cgi?id=48232
When PrologEpilogInserter writes callee-saved registers to the stack, LR is not reloaded but is instead loaded directly into PC.
This was not taken into account when determining if each callee-saved register was liveout for the block.
When frame elimination inserts virtual registers, and the register scavenger tries to scavenge LR, it considers it liveout and tries to spill again.
However there is no emergency spill slot to use, and it fails with an error:
fatal error: error in backend: Error while trying to spill LR from class GPR: Cannot scavenge register without an emergency spill slot!
This patch pervents any callee-saved registers which are not reloaded (including LR) from being marked liveout.
They are therefore available to scavenge without requiring an extra spill.
|
| llvm/test/CodeGen/AArch64/scavenge-lr.mir |
| llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll |
| llvm/lib/CodeGen/LiveRegUnits.cpp |
Commit
374862d71c1a2f63557a27f1555b37ff0f75117e
by Jan Svoboda[clang][cli] Use variadic macros for parsing/generating
This patch makes all macros forwarding to `PARSE_OPTION_WITH_MARSHALLING` and `GENERATE_OPTION_WITH_MARSHALLING` variadic.
Sice we will be splitting up all CompilerInvocation parts, this will allow us to avoid a lot of boilerplate code.
The local macros prefix forwarded arguments with local variables required by the main macros. The `{THIS,NO}_PREFIX` macros make it possible for forwarding macros in member functions (`parseSimpleArgs`, `generateCC1CommandLine`) to prefix keypaths with `this->`. (Some build bots seem to require that.)
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D95532
|
| clang/lib/Frontend/CompilerInvocation.cpp |
Commit
3ca502a7d60787abe14db1fa541950ff79c7585b
by rahmanlUse DataExtractor to decode SLEB128 in android_relas.
A simple refactoring patch which let us use `DataExtractor::getSLEB128` rather than using a lambda function.
Differential Revision: https://reviews.llvm.org/D95158
|
| llvm/lib/Object/ELF.cpp |
| llvm/test/tools/llvm-readobj/ELF/packed-relocs-errors.s |
Commit
2393b03239c56b9bc1f6fd8bef5cdedaf0570bc7
by Jan SvobodaRevert "[clang][cli] Use variadic macros for parsing/generating"
This reverts commit 374862d7.
Some build bots are failing with:
clang/Driver/Options.inc(4315): warning C4003: not enough arguments for function-like macro invocation 'PARSE_OPTION_WITH_MARSHALLING'
clang/Driver/Options.inc(4315): warning C4003: not enough arguments for function-like macro invocation 'NO_PREFIX'
clang/Driver/Options.inc(4315): error C2059: syntax error: ')'
clang/Driver/Options.inc(4315): error C2143: syntax error: missing ';' before '{'
clang/Driver/Options.inc(4315): error C2059: syntax error: '='
|
| clang/lib/Frontend/CompilerInvocation.cpp |
Commit
fc2f27ccf3c5982a8f89d2c85d83578a713c95c7
by fraser[RISCV] Add support for RVV int<->fp & fp<->fp conversions
This patch adds support for the full range of vector int-to-float,
float-to-int, and float-to-float conversions on legal types.
Many conversions are supported natively in RVV so are lowered with
patterns. These include conversions between (element) types of the same
size, and those that are half/double the size of the input. When
conversions take place between types that are less than half or more
than double the size we must lower them using sequences of instructions
which go via intermediate types.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D95447
|
| llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
| llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
| llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll |
| llvm/lib/Target/RISCV/RISCVISelLowering.h |
| llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll |
Commit
54e570d94af995ff58287a8288389641910a8239
by nemanja.i.ibm[PowerPC] Do not emit XXSPLTI32DX for sub 64-bit constants
If the APInt returned by BuildVectorSDNode::isConstantSplat() is narrower than
64 bits, the result produced by XXSPLTI32DX is incorrect. The result returned
by the function appears to be incorrect and we'll investigate/fix it in a
follow-up commit. However, since this causes miscompiles, we must
temporarily disable emitting this instruction for such values.
|
| llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
| llvm/test/CodeGen/PowerPC/p10-splatImm32.ll |
Commit
4b422708bac7161e7b1705d0d001a82fa3309e75
by Mirko.Brkusanin[AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset
Look throught G_PTRTOINT and G_PTR_ADD nodes when looking for constant
offset for buffer stores. This also helps with merging of these instructions
later on.
Differential Revision: https://reviews.llvm.org/D95242
|
| llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp |
| llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
| llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll |
Commit
3c979ae9ecdd324fa768a189c50103ad0aecfabf
by Mirko.Brkusanin[AMDGPU][GlobalISel] Remove redundant cmp when copying constant to vcc
Differential Revision: https://reviews.llvm.org/D95540
|
| llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll |
| llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll |
| llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
| llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll |
| llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir |
Commit
9a2bbfae6c82c8f24107f92f48b52bb2c5416b4b
by tomas.matheson[NFC] Move scavenge-lr.mir From AArch64 to Thumb2 test directory.
|
 | llvm/test/CodeGen/AArch64/scavenge-lr.mir |
| llvm/test/CodeGen/Thumb2/scavenge-lr.mir |
Commit
c1c1944e6993c4923031094f5a51ade197ad7e37
by david.green[ARM] Regenerate constant hoisting test. NFC
|
| llvm/test/CodeGen/ARM/static-addr-hoisting.ll |
Commit
279e7ea63bb898587699339271c19824f829f3dc
by kareem.ergawy[MLIR][LinAlg][Docs] Add missing example code and other small fixes.
Fixes a few small issues in the docs. It seems one of the examples was missing
the expected MLIR output due to a copy-paste typo.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D95599
|
| mlir/docs/Dialects/Linalg.md |
Commit
d0c9fb1b8ebf50ea8b489354b946da961a384c8b
by nicolas.vasilache[mlir][Linalg] Improve codegen strategy
This revision improves the usage of the codegen strategy by adding a few flags that
make it easier to control for the CLI.
Usage of ModuleOp is replaced by FuncOp as this created issues in multi-threaded mode.
A simple benchmarking capability is added for linalg.matmul as well as linalg.matmul_column_major.
This latter op is also added to linalg.
Now obsolete linalg integration tests that also take too long are deleted.
Correctness checks are still missing at this point.
Differential revision: https://reviews.llvm.org/D95531
|
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul_column_major.mlir |
| mlir/test/mlir-cpu-runner/include/mlir_test_cblas.h |
| mlir/test/mlir-cpu-runner/CMakeLists.txt |
| mlir/test/mlir-cpu-runner/mlir_test_cblas_interface.cpp |
| mlir/test/mlir-cpu-runner/linalg_integration_test.mlir |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul.mlir |
| mlir/test/mlir-cpu-runner/include/mlir_test_cblas_interface.h |
| mlir/lib/Dialect/Linalg/Transforms/CodegenStrategy.cpp |
| mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOpsSpec.tc |
| mlir/test/mlir-cpu-runner/mlir_test_cblas.cpp |
| mlir/test/CMakeLists.txt |
| mlir/test/Dialect/Linalg/codegen-strategy.mlir |
| mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul_column_major_as_row_major.mlir |
| mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp |
| mlir/test/lib/Transforms/TestLinalgCodegenStrategy.cpp |
Commit
8cfa963463d09cd4213a647f3587389612e3dd16
by lebedev.ri[SimplifyCFG] If provided, preserve Dominator Tree
SimplifyCFG is an utility pass, and the fact that it does not
preserve DomTree's, forces it's users to somehow workaround that,
likely by not preserving DomTrees's themselves.
Indeed, simplifycfg pass didn't know how to preserve dominator tree,
it took me just under a month (starting with e1133179587dd895962a2fe4d6eb0cb1e63b5ee2)
do rectify that, now it fully knows how to,
there's likely some problems with that still,
but i've dealt with everything i can spot so far.
I think we now can flip the switch.
Note that this is functionally an NFC change,
since this doesn't change the users to pass in the DomTree,
that is a separate question.
Reviewed By: kuhar, nikic
Differential Revision: https://reviews.llvm.org/D94827
|
| llvm/lib/Transforms/Utils/SimplifyCFG.cpp |
Commit
6617529a1dfe6605bd2b4064c7832ace4b0eb564
by lebedev.ri[CodeGen][DwarfEHPrepare] Preserve Dominator Tree
Now that D94827 has flipped the switch, and SimplifyCFG is officially marked
as production-ready regarding Dominator Tree preservation,
we can update this user pass to also preserve Dominator Tree.
This is a geomean compile-time win of `-0.05%`..`-0.08%`.
https://llvm-compile-time-tracker.com/compare.php?from=51a25846c198cff00abad0936f975167357afa6f&to=082499aac236a5c141e50a9e77870d5be2de5f0b&stat=instructions
Differential Revision: https://reviews.llvm.org/D95548
|
| llvm/test/CodeGen/X86/opt-pipeline.ll |
| llvm/test/CodeGen/ARM/O3-pipeline.ll |
| llvm/lib/CodeGen/DwarfEHPrepare.cpp |
Commit
526c42e76c12d9cfe83dfa5957fe1715ab8d1faf
by sven.vanhaastregt[OpenCL] Hide sampler-less read_image builtins before CL1.2
Ensure sampler-less image read functions are not available with
`-fdeclare-opencl-builtins` before OpenCL 1.2.
|
| clang/test/SemaOpenCL/fdeclare-opencl-builtins.cl |
| clang/test/CodeGenOpenCL/fdeclare-opencl-builtins.cl |
| clang/lib/Sema/OpenCLBuiltins.td |
Commit
7396f720f9436031e98e3f36ad09c1759f1edf54
by llvm-dev[DebugInfo] Remove some unused includes. NFCI.
Mainly removing a lot of <vector> includes from files that don't explicitly use std::vector
|
| llvm/include/llvm/DebugInfo/CodeView/GlobalTypeTableBuilder.h |
| llvm/include/llvm/DebugInfo/PDB/Native/PDBStringTable.h |
| llvm/include/llvm/DebugInfo/CodeView/SymbolSerializer.h |
| llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp |
| llvm/include/llvm/DebugInfo/PDB/Native/DbiModuleDescriptor.h |
| llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp |
| llvm/include/llvm/DebugInfo/PDB/Native/PDBStringTableBuilder.h |
| llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp |
| llvm/include/llvm/DebugInfo/GSYM/FunctionInfo.h |
| llvm/include/llvm/DebugInfo/CodeView/MergingTypeTableBuilder.h |
| llvm/include/llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h |
| llvm/include/llvm/DebugInfo/PDB/Native/PDBFileBuilder.h |
| llvm/include/llvm/DebugInfo/DWARF/DWARFDebugRnglists.h |
Commit
0164d546d2691c439fc06c8fff126224276c2d02
by llvm-dev[Support] Add some missing namespace closure comments. NFCI.
Fixes some clang-tidy warnings.
|
| llvm/lib/Support/BinaryStreamRef.cpp |
| llvm/lib/Support/MemoryBuffer.cpp |
| llvm/lib/Support/BuryPointer.cpp |
| llvm/lib/Support/Debug.cpp |
| llvm/lib/Support/DAGDeltaAlgorithm.cpp |
| llvm/lib/Support/Allocator.cpp |
| llvm/lib/Support/CrashRecoveryContext.cpp |
| llvm/lib/Support/MathExtras.cpp |
| llvm/lib/Support/PrettyStackTrace.cpp |
| llvm/lib/Support/ARMWinEH.cpp |
| llvm/lib/Support/APFloat.cpp |
| llvm/lib/Support/DynamicLibrary.cpp |
| llvm/lib/Support/ItaniumManglingCanonicalizer.cpp |
Commit
aa76cebab59e7ae016a96215b1567b71489a4730
by llvm-devFix "32-bit shift result used in 64-bit comparison" MSVC warning. NFCI.
|
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
Commit
da8845fc3d3bb0b0e133f020931440511fa72723
by llvm-dev[X86][AVX] Add PR48908 shuffle test case
|
| llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll |
Commit
6663330bc8c84a75ea092272297b557bfc310380
by llvm-dev[X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - don't merge VPERMILPD ops with different low/high masks.
Unlike VPERMILPS, VPERMILPD can have non-repeating masks in each 128-bit subvector, we weren't accounting for this when folding vperm2f128(vpermilpd(x,c),vpermilpd(y,c)) -> vpermilpd(vperm2f128(x,y),c).
I'm intending to add support for this but wanted to get a minimal fix in first for merging into 12.xx.
Fixes PR48908
|
| llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll |
| llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
c571b168349fdf22d1dc8b920bcffa3d5161f0a2
by tianshilei1992[OpenMP] Disabled profiling in `libomp` by default to unblock link errors
Link error occurred when time profiling in libomp is enabled by default
because `libomp` is assumed to be a C library but the dependence on
`libLLVMSupport` for profiling is a C++ library. Currently the issue blocks all
OpenMP tests in Phabricator.
This patch set a new CMake option `OPENMP_ENABLE_LIBOMP_PROFILING` to
enable/disable the feature. By default it is disabled. Note that once time
profiling is enabled for `libomp`, it becomes a C++ library.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95585
|
| openmp/runtime/src/kmp_config.h.cmake |
| openmp/CMakeLists.txt |
| openmp/docs/design/Runtimes.rst |
| openmp/runtime/src/CMakeLists.txt |
| openmp/runtime/src/kmp_runtime.cpp |
| openmp/runtime/CMakeLists.txt |
Commit
0805e40a94d79e22d62f53bc308e0c27772bae44
by llvm-devAMDGPUPrintfRuntimeBinding - don't dereference a dyn_cast<> pointer. NFCI.
We dereference the dyn_cast<> in all paths - use cast<> to silence the clang static analyzer warning.
|
| llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp |
Commit
42635856ed3c9a05957640f9deb50cf865c03825
by bradley.smith[AArch64][SVE] Allow accesses to SVE stack objects to use frame pointer
The layout of the stack frame for SVE means that using the frame pointer
rather than the stack pointer for an access to an SVE stack object
removes the need for an additional add to jump over the non-SVE objects.
Likewise the opposite is true for non-SVE stack objects.
This patch allows for the former to be done by having HasFP return true
in the presence of both SVE and non-SVE stack objects, and also fixes a
minor issue whereby the later would not be done for certain offsets.
|
| llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
| llvm/test/CodeGen/AArch64/framelayout-sve.mir |
| llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll |
| llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h |
| llvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir |
Commit
299cc5da6df6be9f3c81c54e2e952c6d3519f63b
by nicolas.vasilache[mlir][Linalg] Further improve codegen strategy and add a linalg.matmul_i8_i8_i32
This revision adds a layer of SFINAE to the composable codegen strategy so it does
not have to require statically defined ops but instead can also be used with OpInterfaces, Operation* and an op name string.
A linalg.matmul_i8_i8_i32 is added to the .tc spec to demonstrate how all this works end to end.
Differential Revision: https://reviews.llvm.org/D95600
|
| mlir/include/mlir/Dialect/Linalg/Transforms/CodegenStrategy.h |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul_i8_i8_i32.mlir |
| mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul_column_major_as_row_major.mlir |
| mlir/include/mlir/Dialect/StandardOps/EDSC/Intrinsics.h |
| mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h |
| mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul.mlir |
| mlir/lib/Dialect/Linalg/Transforms/CodegenStrategy.cpp |
| mlir/test/lib/Transforms/TestLinalgTransforms.cpp |
| mlir/lib/Dialect/Linalg/Transforms/Generalization.cpp |
| mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp |
| mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOpsSpec.tc |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul_column_major.mlir |
| mlir/test/lib/Transforms/TestLinalgCodegenStrategy.cpp |
| mlir/test/lib/Transforms/TestLinalgFusionTransforms.cpp |
Commit
40f46cb0e4301b343d99771188e6bbad01c83c62
by david.green[ARM] Add alignment checks for MVE VLDn
The MVE VLD2/4 and VST2/4 instructions require the pointer to be aligned
to at least the size of the element type. This adds a check for that
into the ARM lowerInterleavedStore and lowerInterleavedLoad functions,
not creating the intrinsics if they are invalid for the alignment of
the load/store.
Unfortunately this is one of those bug fixes that does effect some
useful codegen, as we were able to sometimes do some nice lowering of
q15 types. But they can cause problem with low aligned pointers.
Differential Revision: https://reviews.llvm.org/D95319
|
| llvm/lib/Target/ARM/ARMISelLowering.cpp |
| llvm/lib/Target/ARM/ARMISelLowering.h |
| llvm/test/CodeGen/Thumb2/mve-vst2.ll |
| llvm/test/CodeGen/Thumb2/mve-vld2.ll |
| llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp |
| llvm/test/CodeGen/Thumb2/mve-vld4.ll |
| llvm/test/CodeGen/Thumb2/mve-vst4.ll |
Commit
19248d30e4ed5250fa84abbbd52fc7b835918a45
by tianshilei1992[OpenMP][deviceRTLs] Added `[[clang::loader_uninitialized]]` explicitly
`[[clang::loader_uninitialized]]` is in macro `SHARED` but it doesn't
work for array like `parallelLevel`, so the variable will be zero initialized.
There is also a similar issue for `omptarget_nvptx_device_State` which is in
global address space. Its c'tor is also generated, which was not in the past when
building the `deviceRTLs` with CUDA. In this patch, we added the attribute to
the two variables explicitly.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95550
|
| openmp/libomptarget/deviceRTLs/common/src/omp_data.cu |
Commit
5a64794bbad4010778406dfee7748e6080258dbf
by tianshilei1992[OpenMP][NVPTX] Added the missing -O1 when building NVPTX bitcode libraries
In the past `-O1` was used when building NVPTX bitcode libraries. After
we switched to OpenMP, `-O1` was missing by mistake, leading to a huge performance
regression.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D95545
|
| openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt |
Commit
1b19c423029bd8eca75efe5cdb29ffd9f5b33feb
by tianshilei1992[OpenMP][deviceRTLs] Separate declaration of target dependent functions from `target_impl.h`
This patch created a new header file `target_interface.h` for declarations of all target dependent functions. All future targets can get things work by simply implementing all functions declared in the header and macros/data same as each `target_impl.h`.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D95300
|
| openmp/libomptarget/deviceRTLs/common/omptarget.h |
| openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h |
| openmp/libomptarget/deviceRTLs/target_interface.h |
| openmp/libomptarget/deviceRTLs/common/debug.h |
| openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip |
| openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h |
Commit
b9ff5da0c8af3b586d6bee4163e8a65b24d283d9
by Stefan Gränitz[Orc] Remove unused header from TPC server
The header would include OrcJIT headers in OrcTargetProcess, which is not desired. All common declarations should be in OrcShared.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D95606
|
| llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/OrcRPCTPCServer.h |
Commit
8900acc796bb8c4cc3315599119adb7e236da6dc
by nicolas.vasilache[mlir][Linalg] Reenable test that was mistakenly disabled
|
| mlir/test/Dialect/Linalg/tile-and-pad-tensors.mlir |
Commit
a112df63d4c8c29b4d4cf827665f06cde9dd83ec
by llvm-dev[X86] Add extload test cases from D95086
I've also added vselect variants of the vector cases
|
| llvm/test/CodeGen/X86/select-ext.ll |
Commit
0024efc69ea6cd0b630cd11cef5991b7edb73ffc
by hansRelax test expectations in debug-info-gline-tables-only-codeview.cpp
To make it pass also on 32-bit Windows, see PR48920.
|
| clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp |
Commit
7e6fe5c48a63c2a5b6ec963859070508115bf981
by nicolas.vasilache[mlir] Fix subview verifier.
The subview verifier in the rank-reduced case is plainly skipping verification
when the resulting type is a memref with empty affine map. This is generally incorrect.
Instead, form the actual expected rank-reduced MemRefType that takes into account the projections of 1's dimensions. Then, check the canonicalized expected rank-reduced type against the canonicalized candidate type.
Differential Revision: https://reviews.llvm.org/D95316
|
| mlir/test/IR/invalid-ops.mlir |
| mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp |
| mlir/lib/IR/BuiltinTypes.cpp |
| mlir/lib/Dialect/StandardOps/IR/Ops.cpp |
Commit
dfd2374ab6c393d675e7b4583bc279b2d7e9b51f
by alexfh[clang-tidy] Remove unnecessary #ifdef
The code was likely used to verify other changes in c3b9d85bd4b7249af9efe3594c6c152a032f83f8.
|
| clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp |
Commit
c818fa6729e02820c656431126d724d643001b70
by hanchung[mlir][Linalg] Replace SimplePad with PadTensor in tile-and-pad
This revision creates a build method of PadTensorOp which can be mapped to
SimplePad op. The verifier is updated to accept a static custom result type,
which has the same semantic as SimplePadOp.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D95555
|
| mlir/test/Dialect/Linalg/roundtrip.mlir |
| mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp |
| mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
| mlir/test/Dialect/Linalg/tile-and-pad-tensors.mlir |
| mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp |
Commit
70ea15b88953e56681b997373fb11c97eeb05c4e
by abidh[MC][ELF] Fix accepting abbreviated form with sh_flags and sh_entsize
Followup to D92052 as I missed an issue as shown via GCC bug https://gcc.gnu.org/PR97827, namely: (e.g.) ".rodata." implies ELF::SHF_ALLOC.
Crossref:
- D73999 / commit 75af9da755721123e62b45cd0bc0c5e688a9722a
added for LLVM 11 a check that sh_flags and sh_entsize (and sh_type)
changes are an error, in line with GNU assembler.
- D92052 / commit 1deff4009e0ae661b03682901bf6932297ce7ea1
permitted the abbreviated form which many assemblers accept and
GCC generates: while the first .section contains the flags and entsize,
subsequent sections simply contain the name without repeating entsize or
flags.
However, the latter patch missed in the check that some flags are automatically set, e.g. '.rodata." implies ELF::SHF_ALLOC.
Related https://bugs.llvm.org/show_bug.cgi?id=48201
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D94072
|
| llvm/lib/MC/MCParser/ELFAsmParser.cpp |
| llvm/test/MC/ELF/section-omitted-attributes.s |
Commit
5169627c14258595f70b4b47a2153e8d01e1c94a
by llvm-dev[APFloat] scalbn - pass DoubleAPFloat arg as const-ref. NFCI.
Avoid unnecessary copy and fix clang-tidy warning.
|
| llvm/include/llvm/ADT/APFloat.h |
| llvm/lib/Support/APFloat.cpp |
Commit
b06ccc74467be33485447eb4b2821954f2bb27aa
by llvm-dev[APFloat] Remove orphan ilogb(DoubleAPFloat) declaration. NFCI.
|
| llvm/include/llvm/ADT/APFloat.h |
Commit
bf5941afcda3ac6570ba25165758869287491e0d
by Louis Dionne[libc++] Fix extern-templates.sh.cpp test on Linux
|
| libcxx/test/libcxx/debug/extern-templates.sh.cpp |
Commit
303ef609a38e004d41e773be41ede9cc90ea803c
by nicolas.vasilache[mlir] Fix gcc-8 build
|
| mlir/include/mlir/Dialect/Linalg/Transforms/CodegenStrategy.h |
Commit
469096d18efde7622b2bc41d313e58ab7789d40e
by hanchung[mlir][Linalg] Fix tests in tile-and-pad
The check match in D95555 was wrong, this patch fixes it.
Differential Revision: https://reviews.llvm.org/D95618
|
| mlir/test/Dialect/Linalg/tile-and-pad-tensors.mlir |
Commit
5bdc771fc97ed752af42562c33a18c3ea28b098e
by csigg[mlir] Make cuda/rocm-runtime-wrappers not depend on LLVMSupport.
Depending on the headers only is fine, but we do not want to use any symbols from LLVMSupport. If we do, static registration of cl options is linked in as well, and loading multiple such libraries in the cuda/rocm-runner fails because the same cl options are registered multiple times.
The cuda/rocm-runners also depend on LLVMSupport, so one could think that already loading a single such library would fail. It does not because the map of cl options is not shared between the runner and the loaded libraries (but it is shared across all loaded libraries, presumably because it has external linkage, in contrast to the static registration which has internal linkage).
This change is a preparation step for dynamically loading the mlir_async_runtime.so and cuda-runtime-wrappers.so in the same test. The async runtime depends on LLVMSupport in a more fundamental way (llvm::ThreadPool), and as explained above there can only be one.
This change also switches to add_mlir_library to make it consistent with the other runner_utils libraries.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D95613
|
| mlir/tools/mlir-cuda-runner/cuda-runtime-wrappers.cpp |
| mlir/tools/mlir-rocm-runner/rocm-runtime-wrappers.cpp |
| mlir/tools/mlir-cuda-runner/CMakeLists.txt |
| mlir/tools/mlir-rocm-runner/CMakeLists.txt |
Commit
f84efe97bce138af0f8e21d3a03b7c5be168705b
by llvm-dev[X86][AVX] combineHorizOpWithShuffle - fix valuetype comparison typo.
Ensure we check the valuetypes of all the HOP(SHUFFLE(X,Y),SHUFFLE(X,Y)) shuffle input ops - there was a copy+paste typo (noticed by MSVC analyzer) that meant we were checking the same input from one of the shuffles twice.
I haven't been able to create a test case for this yet - I don't think its currently possible to create a target/faux binary shuffle that scales to a 2x128 shuffle mask from two different value types.
|
| llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
e29552c5aff68c1cf4be695d8b8be327968852e8
by shauryab98Revert "[DWARF] Create subprogram's DIE in DISubprogram's unit"
This reverts commit ef0dcb506300dc9644e8000c6028d14214be9d97.
This change is causing a lot of compiler crashes inside, sorry I don't have a
small repro/stacktrace with symbols to share right now.
Differential Revision: https://reviews.llvm.org/D95622
|
| llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp |
| llvm/test/DebugInfo/X86/subprogram-across-cus.ll |
| llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h |
Commit
5c0164890c2626393f954b79d2779174319dc958
by sbc[lld][WebAssembly] Update comments mentioning legacy function names. NFC
The __wasm_apply_relocs function was split into two separate
functions as part of https://reviews.llvm.org/D93066 but these
comments were not correctly updated at the time.
Differential Revision: https://reviews.llvm.org/D95623
|
| lld/wasm/Writer.cpp |
| lld/test/wasm/shared.ll |
| lld/wasm/SyntheticSections.cpp |
| lld/test/wasm/weak-undefined-pic.s |
| lld/wasm/MarkLive.cpp |
Commit
9cbef8c905cb565fea1b2fef51b75b0d00ad7ad9
by nicolas.vasilache[mlir] Fix integration tests
|
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul.mlir |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul_column_major_as_row_major.mlir |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul_i8_i8_i32.mlir |
| mlir/lib/ExecutionEngine/CRunnerUtils.cpp |
| mlir/include/mlir/ExecutionEngine/CRunnerUtils.h |
| mlir/integration_test/Dialect/Linalg/CPU/benchmark_matmul_column_major.mlir |
| mlir/lib/ExecutionEngine/RunnerUtils.cpp |
Commit
207d4be4d9d39fbb9aca30e5d5d11245db9bccc1
by arthur.j.odwyer[libc++] [P0879] constexpr std::nth_element, and rewrite its tests.
This patch is more than just adding the `constexpr` keyword, because
the old code relied on `goto`, and `goto` is not constexpr-friendly.
Refactor to eliminate `goto`, and then mark it as constexpr in C++20.
I freely admit that the name `__nth_element_partloop` is bad;
I couldn't find any better name because I don't really know
what this loop is doing, conceptually. Vice versa, I think
`__nth_element_find_guard` has a decent name.
Now the only one we're still missing from P0879 is `sort`.
Differential Revision: https://reviews.llvm.org/D93557
|
| libcxx/include/algorithm |
| libcxx/test/std/algorithms/alg.sorting/alg.nth.element/nth_element_comp.pass.cpp |
| libcxx/test/std/algorithms/alg.sorting/alg.nth.element/nth_element.pass.cpp |
Commit
081c1db02dd2b48cf736d44862f7d7e8c2869577
by koraq[libc++] Implement format_error.
This is the first step at implementing <format>. It adds the <format> header
and implements the `format_error`. class.
Implemnts parts of:
-P0645 Text Formatting
Reviewed By: ldionne, #libc, miscco, curdeius
Differential Revision: https://reviews.llvm.org/D92214
|
| libcxx/test/libcxx/double_include.sh.cpp |
| libcxx/include/version |
| libcxx/docs/FeatureTestMacroTable.rst |
| libcxx/test/std/utilities/format/format.error/format.error.pass.cpp |
| libcxx/test/libcxx/no_assert_include.compile.pass.cpp |
| libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.no_new_in_libcxx.abilist |
| libcxx/test/libcxx/min_max_macros.compile.pass.cpp |
| libcxx/src/CMakeLists.txt |
| libcxx/test/std/language.support/support.limits/support.limits.general/format.version.pass.cpp |
| libcxx/utils/generate_feature_test_macro_components.py |
| libcxx/docs/Cxx2aStatusPaperStatus.csv |
| libcxx/include/CMakeLists.txt |
| libcxx/include/module.modulemap |
| libcxx/include/format |
| libcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp |
| libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.no_new_in_libcxx.abilist |
| libcxx/src/format.cpp |
| libcxx/test/std/utilities/format/version.compile.pass.cpp |
Commit
ae82a8c86331ea400ed52e4e4a12211995e847b0
by craig.topper[RISCV] Add support for scalable vector fneg using vfsgnjn.vv
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D95568
|
| llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll |
| llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
Commit
6640b9aa8aeb772c4ebc33ba5ca73159b977272d
by ajcbik[mlir][sparse] use typenames for opaque pointers
Makes intent more readable
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D95592
|
| mlir/integration_test/Sparse/CPU/matrix-market-example.mlir |
| mlir/integration_test/Sparse/CPU/frostt-example.mlir |
Commit
18fe3fe0e74b161c723e1e5958ead795ca4fdb7e
by koraq[libc++] Implements concept constructible_from
Implements parts of:
- P0898R3 Standard Library Concepts
- P1754 Rename concepts to standard_case for C++20, while we still can
Depends on: D91004
Reviewed By: ldionne, cjdb, #libc
Differential Revision: https://reviews.llvm.org/D91986
|
| libcxx/include/concepts |
| libcxx/test/std/concepts/concept.constructible/constructible_from.compile.pass.cpp |
Commit
c5d4b77b178aaed323cf34013836e503679e376e
by craig.topper[RISCV] Remove isel patterns for Zbs *W instructions.
These instructions have been removed from the 0.94 bitmanip spec.
We should focus on optimizing the codegen without using them.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D95302
|
| llvm/lib/Target/RISCV/RISCVInstrInfoB.td |
| llvm/test/CodeGen/RISCV/rv64Zbs.ll |
Commit
0f2901201e26c236e38b11fe602d6357782f865d
by nicolas.vasilache[mlir] Fix test by adapting to C util functions moving to libmlir_c_runner_utils
|
| mlir/test/mlir-cpu-runner/sgemm_naive_codegen.mlir |
Commit
0bca9a7ce2eeaa9f1d732ffbc17769560a2b236e
by a20012251Fix lldb-vscode builds on Windows targeting POSIX
@stella.stamenova found out that lldb-vscode's Win32 macros were failing
when building on windows targetings POSIX platforms.
I'm changing these macros for LLVM_ON_UNIX, which should be more
accurate.
|
| lldb/tools/lldb-vscode/VSCode.h |
| lldb/tools/lldb-vscode/lldb-vscode.cpp |
| lldb/tools/lldb-vscode/VSCode.cpp |
| lldb/tools/lldb-vscode/IOStream.cpp |
| lldb/tools/lldb-vscode/RunInTerminal.cpp |
| lldb/tools/lldb-vscode/IOStream.h |
Commit
2dd0c4d8462658c9a721356b306aa52825612416
by Casey[libcxx][test] Update directory_entry test for C++20
P1614R2 removes most of `directory_entry`'s member comparison operators, leaving only `operator==` and `operator<=>`. This test should require the comparison expressions to be valid rather than require the member functions to be present so it is correct in both C++17 and C++20 modes.
|
| libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/comparisons.pass.cpp |
Commit
b3af96d07b8bcdbc716b04629a1ad1d3d5f6ee5f
by i[llvm-nm] Display defined weak STT_GNU_IFUNC symbols as 'i'
This patch makes the behavior match GNU nm.
Note: undefined STT_GNU_IFUNC symbols use 'U'.
Differential Revision: https://reviews.llvm.org/D95461
|
| llvm/test/tools/llvm-nm/ifunc.test |
| llvm/tools/llvm-nm/llvm-nm.cpp |
Commit
cfcc1110d7733ad6c275eefd1773d243a719f9f3
by mtrofin[NFC] Disallow unused prefixes under clang/test/CodeGenCXX
The only test that needed change had 'QUAL' as an unused prefix. The
rest of the changes are to simplify the prefix lists.
Differential Revision: https://reviews.llvm.org/D95499
|
| clang/test/CodeGenCXX/lit.local.cfg |
| clang/test/CodeGenCXX/debug-info-codeview-display-name.cpp |
Commit
62140d943cc200f66fc3274bbef5f9934e01c324
by Adrian PrantlBetter document the limitations of coro::salvageDebugInfo()
and fix a few edge cases that show up in the Swift compiler but
weren't caught by the existing tests. Most notably the old code wasn't
salvaging load operations correctly. The patch also gets rid of the
LoadFromFramePtr argument and replaces it with a more generalized
mechanism.
|
| llvm/lib/Transforms/Coroutines/CoroInternal.h |
| llvm/lib/Transforms/Coroutines/CoroFrame.cpp |
| llvm/lib/Transforms/Coroutines/CoroSplit.cpp |
| llvm/test/Transforms/Coroutines/coro-debug.ll |
Commit
51457cd50624a5f3f684b80c2ce6feff1a2b3901
by csigg[mlir] NFC: split --shared-libs option into multiple lines.
|
| mlir/test/mlir-cuda-runner/all-reduce-or.mlir |
| mlir/test/mlir-rocm-runner/vecadd.mlir |
| mlir/test/mlir-cuda-runner/shuffle.mlir |
| mlir/test/mlir-cuda-runner/all-reduce-op.mlir |
| mlir/test/mlir-rocm-runner/vector-transferops.mlir |
| mlir/test/mlir-cuda-runner/all-reduce-max.mlir |
| mlir/test/mlir-cuda-runner/all-reduce-and.mlir |
| mlir/test/mlir-cuda-runner/all-reduce-region.mlir |
| mlir/test/mlir-cuda-runner/multiple-all-reduce.mlir |
| mlir/test/mlir-rocm-runner/gpu-to-hsaco.mlir |
| mlir/test/mlir-cuda-runner/all-reduce-xor.mlir |
| mlir/test/mlir-cuda-runner/two-modules.mlir |
| mlir/test/mlir-rocm-runner/two-modules.mlir |
| mlir/test/mlir-cuda-runner/all-reduce-min.mlir |
| mlir/test/mlir-cuda-runner/gpu-to-cubin.mlir |
Commit
39ef0965dfb26a56ee02f5aa513cdf235e8187b2
by jay.foad[AMDGPU] Simplify some RUN lines. NFC.
|
| llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll |
Commit
658398c842019636376a00f7267853e96cd0d935
by thakis[gn build] (semi-manually) port 081c1db02dd2
|
| llvm/utils/gn/secondary/libcxx/src/BUILD.gn |
Commit
275c6af7d7f1ed63a03d05b4484413e447133269
by aardappel[WebAssembly] Fix Fast ISEL not lowering 64-bit function pointers
Differential Revision: https://reviews.llvm.org/D95410
|
| llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp |
| llvm/test/CodeGen/WebAssembly/fast-isel-call-indirect64.ll |
| llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp |
Commit
d6be27734764ec9718b4206c4b77dfac6c67b1d8
by zinenko[mlir] turn complex-to-llvm into a partial conversion
It is no longer necessary to also convert other "standard" ops along with the
complex dialect: the element types are now built-in integers or floating point
types, and the top-level cast between complex and struct is automatically
inserted and removed in progressive lowering.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D95625
|
| mlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir |
| mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp |
| mlir/test/Conversion/ComplexToLLVM/full-conversion.mlir |
| mlir/lib/Conversion/ComplexToLLVM/ComplexToLLVM.cpp |
| mlir/test/Dialect/LLVMIR/dialect-cast.mlir |
Commit
4318028cd2d7633a0cdeb0b5d4d2ed81fab87864
by dblaikieDebugInfo: Add a DWARF FORM extension for addrx+offset references to reduce relocations
This is an alternative to the use of complex DWARF expressions for
addresses - shaving off a few extra bytes of expression overhead.
|
| llvm/include/llvm/BinaryFormat/Dwarf.def |
| llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp |
| llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp |
| llvm/lib/CodeGen/AsmPrinter/DIE.cpp |
| llvm/lib/CodeGen/AsmPrinter/DIEHash.cpp |
| llvm/include/llvm/CodeGen/DIEValue.def |
| llvm/lib/DebugInfo/DWARF/DWARFFormValue.cpp |
| llvm/include/llvm/CodeGen/DIE.h |
| llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp |
| llvm/test/DebugInfo/X86/ranges_always.ll |
| llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h |
Commit
8c54583b2e02bdb5d857af6100283eb97f29080b
by thakis[gn build] (manually) port 3b625060fc915
|
| llvm/utils/gn/secondary/libcxx/src/BUILD.gn |
Commit
eae50bb2105abb739477f786c6c821ab1131f90e
by thakis[gn build] (manually) port 081c1db02dd2 more
|
| llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
8af0ccf5a498fb75f13aef0e3bd5c00bc348693f
by ajcbik[sparse][mlir] give all sparse kernels an explicit "output" tensor
Rationale:
Providing an output tensor, even if one is not used as input to
the kernel provides the right pattern for using lingalg sparse
kernels (in contrast with reusing a tensor just to provide the shape).
This prepares proper bufferization that will follow.
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D95587
|
| mlir/test/Dialect/Linalg/sparse_vector.mlir |
| mlir/test/Dialect/Linalg/sparse_storage.mlir |
| mlir/test/Dialect/Linalg/sparse_invalid.mlir |
| mlir/test/Dialect/Linalg/sparse_3d.mlir |
| mlir/test/Dialect/Linalg/sparse_1d.mlir |
| mlir/test/Dialect/Linalg/sparse_2d.mlir |
| mlir/test/Dialect/Linalg/sparse_nd.mlir |
| mlir/test/Dialect/Linalg/sparse_parallel.mlir |
Commit
acaf85f7000e69766f5a86a52bff0becc50aaa91
by jpienaarAdd convenience function for checking arrays of shapes compatible.
Expand existing one to handle the common case for verifying compatible
is existing and inferred. This considers arrays equivalent if they they
have the same size and pairwise compatible elements.
|
| mlir/lib/IR/TypeUtilities.cpp |
| mlir/include/mlir/IR/TypeUtilities.h |
Commit
4b68b64dcc5bcd6f29779b820791611c60438385
by tlively[WebAssembly] Prototype i8x16 to i32x4 widening instructions
As proposed in https://github.com/WebAssembly/simd/pull/395 and matching the
opcodes used in V8:
https://chromium-review.googlesource.com/c/v8/v8/+/2617385/4/src/wasm/wasm-opcodes.h
Differential Revision: https://reviews.llvm.org/D95557
|
| clang/test/CodeGen/builtins-wasm.c |
| llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td |
| llvm/test/MC/WebAssembly/simd-encodings.s |
| clang/include/clang/Basic/BuiltinsWebAssembly.def |
| clang/lib/CodeGen/CGBuiltin.cpp |
| llvm/include/llvm/IR/IntrinsicsWebAssembly.td |
| llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll |
Commit
1e790b745d7e3b0c79deec2de202a4de7e7a66c3
by hanchung[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding
This is the last revision to migrate using SimplePadOp to PadTensorOp, and the
SimplePadOp is removed in the patch. Update a bit in SliceAnalysis because the
PadTensorOp takes a region different from SimplePadOp. This is not covered by
LinalgOp because it is not a structured op.
Also, remove a duplicated comment from cpp file, which is already described in a
header file. And update the pseudo-mlir in the comment.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D95615
|
| mlir/test/Dialect/Linalg/hoist-padding.mlir |
| mlir/lib/Analysis/SliceAnalysis.cpp |
| mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h |
| mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp |
| mlir/test/Dialect/Linalg/roundtrip.mlir |
| mlir/test/lib/Transforms/TestLinalgTransforms.cpp |
| mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
Commit
2c7cc5fd20e6b8cbd4d841f6debf4d8b14405c0d
by hanchungRevert "[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding"
This reverts commit 1e790b745d7e3b0c79deec2de202a4de7e7a66c3.
Differential Revision: https://reviews.llvm.org/D95636
|
| mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
| mlir/test/Dialect/Linalg/roundtrip.mlir |
| mlir/lib/Analysis/SliceAnalysis.cpp |
| mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h |
| mlir/test/Dialect/Linalg/hoist-padding.mlir |
| mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp |
| mlir/test/lib/Transforms/TestLinalgTransforms.cpp |
Commit
85b7b5625a009c738cec626cd5b02cd04d1546d5
by dblaikieFix memory leak in 4318028cd2d7633a0cdeb0b5d4d2ed81fab87864
|
| llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp |
Commit
2e470e03b49f1d79ebc315ca9d62a690a633c0cd
by conanap[PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases
Some cases may be transformed into 32 bit splats before hitting the boolean statement, which may cause incorrect behaviour and provide XXSPLTI32DX with the incorrect values of splat. The condition was reversed so that the shortcut prevents this problem.
Differential Revision: https://reviews.llvm.org/D95634
|
| llvm/test/CodeGen/PowerPC/p10-splatImm32.ll |
| llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
Commit
fe190cf6c99e03389ded12f435da1658d52b782d
by Mike EdwardsRemoving the main to master sync GitHub workflow.
|
| .github/workflows/README.md |
| .github/workflows/main-branch-sync.yml |
Commit
39ecfe614350fa5db7b8f13f81212f8e3831a390
by Duncan P. N. Exon SmithSupport: Simplify __HAIKU__ #ifdef in llvm::sys::Wait, NFC
This just reduces the amount of code in the `#ifndef` block as a
follow-up to 5c1cea6f406366b85f3c200a1c48f713da4450ba.
|
| llvm/lib/Support/Unix/Program.inc |
Commit
6f0df3cddb3e3f38df1baa7aa4d743a74bb46688
by steveire[ASTMatchers] Avoid pathological traversal over nested lambdas
Differential Revision: https://reviews.llvm.org/D95573
|
| clang/lib/ASTMatchers/ASTMatchFinder.cpp |
| clang/include/clang/AST/RecursiveASTVisitor.h |
| clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
Commit
3c79734f29284d6b54f1867a03428a3d9fd338d9
by steveire[ASTMatchers] Add invocation matcher
Differential Revision: https://reviews.llvm.org/D94865
|
| clang/lib/ASTMatchers/Dynamic/Registry.cpp |
| clang/docs/LibASTMatchersReference.html |
| clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp |
| clang/lib/ASTMatchers/ASTMatchersInternal.cpp |
| clang/include/clang/ASTMatchers/ASTMatchers.h |
Commit
c4819eec1a2aea4758cc1ed38aefb0f1c9dec94a
by phosek[CMake][libc] Don't do CPU feature detection when cross-compiling
We won't be able to run the compiled program since it will be compiled
for different system. We instead allow passing the CPU features via
CMake option in that case.
Differential Revision: https://reviews.llvm.org/D95203
|
| libc/test/src/string/CMakeLists.txt |
| libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake |
Commit
1daaa6432e844404006aca55358e0500928d65fb
by phosek[CMake][libc] Support cross-compiling libc-hdrgen
This is useful when cross-compiling libc to another target in which
case we first need to compile libc-hdrgen for host. We rely on the
existing LLVM CMake infrastructure for that.
Differential Revision: https://reviews.llvm.org/D95205
|
| libc/cmake/modules/LLVMLibCHeaderRules.cmake |
| libc/utils/CMakeLists.txt |
| libc/CMakeLists.txt |
| libc/utils/HdrGen/CMakeLists.txt |
Commit
bacf9cf2c5cdec3567580e5030c4c82f42b3d745
by rnkRevert "[PDB] Defer relocating .debug$S until commit time and parallelize it"
This reverts commit 1a9bd5b81328adf0dd5a8b4f3ad5949463e66da3.
I suspect that this patch may have caused https://crbug.com/1171438.
|
| llvm/lib/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.cpp |
| llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp |
| lld/COFF/PDB.cpp |
| lld/COFF/Chunks.cpp |
| llvm/include/llvm/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.h |
| lld/COFF/Chunks.h |
Commit
f8122d35325d9a5d3db7d4c0d40bcdeae15bee5a
by gclaytonAdd the ability to extract the unwind rows from DWARF Call Frame Information.
This patch adds the ability to evaluate the state machine for CIE and FDE unwind objects and produce a UnwindTable with all UnwindRow objects needed to unwind registers. It will also dump the UnwindTable for each CIE and FDE when dumping DWARF .debug_frame or .eh_frame sections in llvm-dwarfdump or llvm-objdump. This allows users to see what the unwind rows actually look like for a given CIE or FDE instead of just seeing a list of opcodes.
This patch adds new classes: UnwindLocation, RegisterLocations, UnwindRow, and UnwindTable.
UnwindLocation is a class that describes how to unwind a register or Call Frame Address (CFA).
RegisterLocations is a class that tracks registers and their UnwindLocations. It gets populated when parsing the DWARF call frame instruction opcodes for a unwind row. The registers are mapped from their register numbers to the UnwindLocation in a map.
UnwindRow contains the result of evaluating a row of DWARF call frame instructions for the CIE, or a row from a FDE. The CIE can produce a set of initial instructions that each FDE that points to that CIE will use as the seed for the state machine when parsing FDE opcodes. A UnwindRow for a CIE will not have a valid address, whille a UnwindRow for a FDE will have a valid address.
The UnwindTable is a class that contains a sorted (by address) vector of UnwindRow objects and is the result of parsing all opcodes in a CIE, or FDE. Parsing a CIE should produce a UnwindTable with a single row. Parsing a FDE will produce a UnwindTable with one or more UnwindRow objects where all UnwindRow objects have valid addresses. The rows in the UnwindTable will be sorted from lowest Address to highest after parsing the state machine, or an error will be returned if the table isn't sorted. To parse a UnwindTable clients can use the following methods:
static Expected<UnwindTable> UnwindTable::create(const CIE *Cie);
static Expected<UnwindTable> UnwindTable::create(const FDE *Fde);
A valid table will be returned if the DWARF call frame instruction opcodes have no encoding errors. There are a few things that can go wrong during the evaluation of the state machine and these create functions will catch and return them.
Differential Revision: https://reviews.llvm.org/D89845
|
| llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp |
| llvm/unittests/DebugInfo/DWARF/DWARFDebugFrameTest.cpp |
| llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp |
| llvm/test/tools/llvm-objdump/eh_frame-mipsel.test |
| llvm/test/DebugInfo/X86/debug_frame-invalid-cie-offset.s |
| llvm/test/DebugInfo/X86/debug-frame-cie-id-dwarf64.s |
| llvm/include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h |
| llvm/include/llvm/DebugInfo/DWARF/DWARFExpression.h |
Commit
ac70a53653d45d0dc6cf50c65b7215d5b7bb8c19
by Andrey.Churbanov[OpenMP] NFC: disabled two flakey tests as the bug in libomp not fixed yet
|
| openmp/runtime/test/worksharing/for/kmp_set_dispatch_buf.c |
| openmp/runtime/test/env/kmp_set_dispatch_buf.c |
Commit
24261729a49feb4cf0376c6f9326374ab28ec0a5
by Jessica Paquette[GlobalISel] Add G_ASSERT_ZEXT
This adds a generic opcode which communicates that a type has already been
zero-extended from a narrower type.
This is intended to be similar to AssertZext in SelectionDAG.
For example,
```
%x_was_extended:_(s64) = G_ASSERT_ZEXT %x, 16
```
Signifies that the top 48 bits of %x are known to be 0.
This is useful in cases like this:
```
define i1 @zeroext_param(i8 zeroext %x) {
%cmp = icmp ult i8 %x, -20
ret i1 %cmp
}
```
In AArch64, `%x` must use a 32-bit register, which is then truncated to a 8-bit
value.
If we know that `%x` is already zero-ed out in the relevant high bits, we can
avoid the truncate.
Currently, in GISel, this looks like this:
```
_zeroext_param:
and w8, w0, #0xff ; We don't actually need this!
cmp w8, #236
cset w0, lo
ret
```
While SDAG does not produce the truncation, since it knows that it's
unnecessary:
```
_zeroext_param:
cmp w0, #236
cset w0, lo
ret
```
This patch
- Adds G_ASSERT_ZEXT
- Adds MIRBuilder support for it
- Adds MachineVerifier support for it
- Documents it
It also puts G_ASSERT_ZEXT into its own class of "hint instruction." (There
should be a G_ASSERT_SEXT in the future, maybe a G_ASSERT_ALIGN as well.)
This allows us to skip over hints in the legalizer etc. These can then later
be selected like COPY instructions or removed.
Differential Revision: https://reviews.llvm.org/D95564
|
| llvm/include/llvm/Support/TargetOpcodes.def |
| llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp |
| llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-hint.mir |
| llvm/include/llvm/CodeGen/TargetOpcodes.h |
| llvm/docs/GlobalISel/GenericOpcode.rst |
| llvm/test/MachineVerifier/test_g_assert_zext_register_bank_class.mir |
| llvm/include/llvm/Target/GenericOpcodes.td |
| llvm/lib/CodeGen/MachineVerifier.cpp |
| llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h |
| llvm/test/MachineVerifier/test_g_assert_zext.mir |
Commit
f22f4557a749339e6865bbd16937c4f937eb4f6c
by code[GlobalISel] Implement widenScalar for carry-in add/sub
These are widened to a wider UADDE/USUBE, with the overflow value
unused, and with the same synthesis of a new overflow value as for the
O operations.
Reviewed By: paquette
Differential Revision: https://reviews.llvm.org/D95326
|
| llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir |
| llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir |
| llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir |
| llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir |
| llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h |
| llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir |
| llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir |
| llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir |
| llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp |
| llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
| llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir |
Commit
2de2d84ed0b2e7cd27f4de9b98f5f8a38b1e6e57
by lebedev.ri[NFC][EntryExitInstrumenter] Mark Dominator Tree as preserved in legacy-PM too
This is correctly handled in new-PM wrappers, but not in old-PM.
|
| llvm/lib/Transforms/Utils/EntryExitInstrumenter.cpp |
Commit
394685481c6ff31ab0721f672ff1d13527e8e42a
by lebedev.ri[NFC][PartiallyInlineLibCalls] Port to SplitBlockAndInsertIfThen()
This makes follow-up patch for Dominator Tree preservation
somewhat more straight-forward.
|
| llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp |
Commit
0ea45a412ac6ee40307e2d851eadb045cee460f0
by lebedev.ri[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedLoad(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
|
| llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
Commit
22b84211565829089c0d372c6ac635fbe060e5fc
by lebedev.ri[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedStore(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
|
| llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
Commit
1356399a11e4fd5db88a5974e109eca96cf3328f
by lebedev.ri[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedGather(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
|
| llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
Commit
e8efc03a1e835285e044f8d40bc4220378f6fdd1
by lebedev.ri[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedScatter(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
|
| llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
Commit
2e4bb3f119eca9603e3f507da5b592b93ae896f7
by lebedev.ri[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedExpandLoad(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
|
| llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
Commit
573f74117b1a4a8f17bceccd8abd908eb019c385
by lebedev.ri[NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedCompressStore(): port to SplitBlockAndInsertIfThen()
Makes Dominator Tree preservation in a followup patch somewhat easier.
|
| llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
Commit
577fdcaa935b14bde6d51af953093b4b11e1e536
by lebedev.ri[PartiallyInlineLibCalls] Preserve Dominator Tree, if avaliable
This doesn't get rid of any Dominator Tree recalculations just yet,
there is one more pass to update..
|
| llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp |
Commit
056385921d8f31cac573873a073d645d5ddca983
by lebedev.ri[ScalarizeMaskedMemIntrin] Preserve Dominator Tree, if avaliable
This de-pessimizes the arguably more usual case of no masked mem intrinsics,
and gets rid of one more Dominator Tree recalculation.
As per llvm/test/CodeGen/X86/opt-pipeline.ll,
there's one more Dominator Tree recalculation left, we could get rid of.
|
| llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
| llvm/test/CodeGen/ARM/O3-pipeline.ll |
| llvm/test/CodeGen/X86/opt-pipeline.ll |
Commit
98835e3d9849a17e9f8eb5dcd8aee3c9d32e1e07
by ravishankarm[mlir][Linalg] Enable TileAndFusePattern to work with tensors.
Differential Revision: https://reviews.llvm.org/D94531
|
| mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp |
| mlir/tools/mlir-opt/mlir-opt.cpp |
| mlir/test/lib/Transforms/TestLinalgFusionTransforms.cpp |
| mlir/test/Dialect/Linalg/fusion-tensor-pattern.mlir |
| mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp |
Commit
231f418295ed6daa1cf2faa7a46c166ce3e779f0
by Tony.Tye[NFC][AMDGPU] Correct name of DWARF CFA extensions
Add LLVM to the DW_CFA_LLVM_def_aspace_cfa and
DW_CFA_LLVM_def_aspace_cfa_sf DWARF extensions.
Reviewed By: scott.linder
Differential Revision: https://reviews.llvm.org/D95640
|
| llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst |
Commit
4580acf6752ea3cc884657b5aa3e174bed86fc8c
by Jessica Paquette[GlobalISel] Walk through hints in getDefIgnoringCopies et al
Treat hint instructions like G_ASSERT_ZEXT like COPY instructions in helpers
which walk through copies.
This ensures that instructions like G_ASSERT_ZEXT won't impact any optimizations
that rely on these helpers.
Differential Revision: https://reviews.llvm.org/D95577
|
| llvm/lib/CodeGen/GlobalISel/Utils.cpp |
| llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
| llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-select.mir |
Commit
dcb5b5f1f2ab11d607a2dceb5b2f802871414d06
by Jessica PaquetteRevert "[GlobalISel] Walk through hints in getDefIgnoringCopies et al"
This reverts commit 4580acf6752ea3cc884657b5aa3e174bed86fc8c.
Reverting while looking into some test failures.
|
| llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
| llvm/lib/CodeGen/GlobalISel/Utils.cpp |
| llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-select.mir |
Commit
daffab1985f1b20081db774d152bcac86b840581
by Jessica PaquetteRecommit "[GlobalISel] Walk through hints in getDefIgnoringCopies et al"
Recommit of 4580acf6752ea3cc884657b5aa3e174bed86fc8c
`Opc = DefMI->getOpcode()` was in the wrong place.
|
| llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
| llvm/lib/CodeGen/GlobalISel/Utils.cpp |
| llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-select.mir |
Commit
e056fc6cb676f72d5b7dfe7ca540b3275bd1a46f
by dimitry[sanitizer] Fix msan test build on FreeBSD after 7afdc89c2054
This commit accidentally enabled fgetgrent_r() in the msan tests under
FreeBSD, but this function is not supported. Also remove FreeBSD from
the SANITIZER_INTERCEPT_FGETGRENT_R macro.
|
| compiler-rt/lib/msan/tests/msan_test.cpp |
| compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h |
Commit
17c584551d573f1693990773e29fbe6b4b6fa4f4
by Duncan P. N. Exon SmithADT: Add SFINAE to the generic IntrusiveRefCntPtr constructors
Add an `enable_if` to the generic `IntrusiveRefCntPtr` constructors so
that std::is_convertible gives an honest answer when the underlying
pointers cannot be converted. Added `static_assert`s to the test suite
to verify.
Also combine generic constructors from `IntrusiveRefCntPtr<X>&&` and
`const IntrusiveRefCntPtr<X>&`. At first glance this appears to be an
infinite loop, but the real copy/move constructors are spelled out
separately above. Added a unit test to verify.
Differential Revision: https://reviews.llvm.org/D95498
|
| llvm/unittests/ADT/IntrusiveRefCntPtrTest.cpp |
| llvm/include/llvm/ADT/IntrusiveRefCntPtr.h |
Commit
2d430f902d72b8a1d3bc036a80273ca80af1e338
by Duncan P. N. Exon SmithADT: Fix typo in static assert message from 17c584551d573f1693990773e29fbe6b4b6fa4f4
|
| llvm/unittests/ADT/IntrusiveRefCntPtrTest.cpp |
Commit
dfe26d5f44d217833a3fe3903acb61465c18913a
by richard[mlir][Linalg] Fix SFINAE check to actually check the value.
No internal functionality change intended, but this fixes out-of-tree
uses.
|
| mlir/include/mlir/Dialect/Linalg/Transforms/CodegenStrategy.h |
Commit
a1a3fdcdba52c9d0a045af5f68365c273467b127
by gclaytonFix windows buildbot build errors from D89845.
|
| llvm/unittests/DebugInfo/DWARF/DWARFDebugFrameTest.cpp |
Commit
ab2d3ce47d6fead7fb79b3c0c7c4c6ac2b930d45
by alexfh[clang-tidy] Applied clang-tidy fixes. NFC
Applied fixes enabled by the LLVM's .clang-tidy configs. Reverted files where
fixes introduced compile errors:
clang-tools-extra/clang-tidy/hicpp/NoAssemblerCheck.cpp
clang-tools-extra/clang-tidy/misc/ThrowByValueCatchByReferenceCheck.cpp
$ clang-tools-extra/clang-tidy/tool/run-clang-tidy.py -fix clang-tools-extra/clang-tidy/
Enabled checks:
llvm-else-after-return
llvm-header-guard
llvm-include-order
llvm-namespace-comment
llvm-prefer-isa-or-dyn-cast-in-conditionals
llvm-prefer-register-over-unsigned
llvm-qualified-auto
llvm-twine-local
misc-definitions-in-headers
misc-misplaced-const
misc-new-delete-overloads
misc-no-recursion
misc-non-copyable-objects
misc-redundant-expression
misc-static-assert
misc-throw-by-value-catch-by-reference
misc-unconventional-assign-operator
misc-uniqueptr-reset-release
misc-unused-alias-decls
misc-unused-using-decls
readability-identifier-naming
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D95614
|
| clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeCstyleCastCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/SuspiciousMissingCommaCheck.cpp |
| clang-tools-extra/clang-tidy/cppcoreguidelines/MacroUsageCheck.cpp |
| clang-tools-extra/clang-tidy/hicpp/MultiwayPathsCoveredCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/ReplaceRandomShuffleCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/NotNullTerminatedResultCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/UseOverrideCheck.cpp |
| clang-tools-extra/clang-tidy/misc/RedundantExpressionCheck.cpp |
| clang-tools-extra/clang-tidy/readability/AvoidConstParamsInDecls.cpp |
| clang-tools-extra/clang-tidy/ClangTidy.cpp |
| clang-tools-extra/clang-tidy/google/AvoidUnderscoreInGoogletestNameCheck.cpp |
| clang-tools-extra/clang-tidy/google/ExplicitConstructorCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/SuspiciousEnumUsageCheck.cpp |
| clang-tools-extra/clang-tidy/mpi/BufferDerefCheck.cpp |
| clang-tools-extra/clang-tidy/mpi/TypeMismatchCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/DurationFactoryFloatCheck.cpp |
| clang-tools-extra/clang-tidy/plugin/ClangTidyPlugin.cpp |
| clang-tools-extra/clang-tidy/bugprone/BranchCloneCheck.cpp |
| clang-tools-extra/clang-tidy/performance/ImplicitConversionInLoopCheck.cpp |
| clang-tools-extra/clang-tidy/readability/SimplifySubscriptExprCheck.cpp |
| clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp |
| clang-tools-extra/clang-tidy/objc/ForbiddenSubclassingCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/SpuriouslyWakeUpFunctionsCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/TimeSubtractionCheck.cpp |
| clang-tools-extra/clang-tidy/altera/KernelNameRestrictionCheck.cpp |
| clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/CopyConstructorInitCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/RedundantStrcatCallsCheck.cpp |
| clang-tools-extra/clang-tidy/misc/NoRecursionCheck.cpp |
| clang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.cpp |
| clang-tools-extra/clang-tidy/readability/FunctionCognitiveComplexityCheck.cpp |
| clang-tools-extra/clang-tidy/utils/ASTUtils.cpp |
| clang-tools-extra/clang-tidy/misc/UnusedParametersCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/UseEqualsDefaultCheck.cpp |
| clang-tools-extra/clang-tidy/readability/MakeMemberFunctionConstCheck.cpp |
| clang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.cpp |
| clang-tools-extra/clang-tidy/cert/LimitedRandomnessCheck.cpp |
| clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp |
| clang-tools-extra/clang-tidy/readability/UseAnyOfAllOfCheck.cpp |
| clang-tools-extra/clang-tidy/misc/UnusedUsingDeclsCheck.cpp |
| clang-tools-extra/clang-tidy/performance/MoveConstArgCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/UseUsingCheck.cpp |
| clang-tools-extra/clang-tidy/utils/ExprSequence.cpp |
| clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp |
| clang-tools-extra/clang-tidy/fuchsia/MultipleInheritanceCheck.cpp |
| clang-tools-extra/clang-tidy/performance/InefficientStringConcatenationCheck.cpp |
| clang-tools-extra/clang-tidy/concurrency/MtUnsafeCheck.cpp |
| clang-tools-extra/clang-tidy/google/FunctionNamingCheck.cpp |
| clang-tools-extra/clang-tidy/utils/IncludeSorter.cpp |
| clang-tools-extra/clang-tidy/objc/PropertyDeclarationCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/LambdaFunctionNameCheck.cpp |
| clang-tools-extra/clang-tidy/cert/StrToNumCheck.cpp |
| clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeMemberInitCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/DurationUnnecessaryConversionCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp |
| clang-tools-extra/clang-tidy/readability/RedundantPreprocessorCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/StringLiteralWithEmbeddedNulCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/UseNullptrCheck.cpp |
| clang-tools-extra/clang-tidy/readability/MisleadingIndentationCheck.cpp |
| clang-tools-extra/clang-tidy/GlobList.cpp |
| clang-tools-extra/clang-tidy/performance/FasterStringFindCheck.cpp |
| clang-tools-extra/clang-tidy/readability/RedundantControlFlowCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/IncorrectRoundingsCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/LoopConvertUtils.cpp |
| clang-tools-extra/clang-tidy/portability/SIMDIntrinsicsCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/TerminatingContinueCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/UseTrailingReturnTypeCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/DurationFactoryScaleCheck.cpp |
| clang-tools-extra/clang-tidy/readability/RedundantDeclarationCheck.cpp |
| clang-tools-extra/clang-tidy/performance/TypePromotionInMathFnCheck.cpp |
| clang-tools-extra/clang-tidy/cppcoreguidelines/NarrowingConversionsCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/UseAutoCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/RedundantVoidArgCheck.cpp |
| clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeVarargCheck.cpp |
| clang-tools-extra/clang-tidy/readability/BracesAroundStatementsCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/StringFindStrContainsCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/ForwardingReferenceOverloadCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/NoNamespaceCheck.cpp |
| clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp |
| clang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/DeprecatedIosBaseAliasesCheck.cpp |
| clang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp |
| clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp |
| clang-tools-extra/clang-tidy/bugprone/ArgumentCommentCheck.cpp |
| clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp |
| clang-tools-extra/clang-tidy/android/AndroidTidyModule.cpp |
| clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp |
| clang-tools-extra/clang-tidy/ClangTidyOptions.cpp |
| clang-tools-extra/clang-tidy/readability/UppercaseLiteralSuffixCheck.cpp |
| clang-tools-extra/clang-tidy/readability/NamedParameterCheck.cpp |
| clang-tools-extra/clang-tidy/cppcoreguidelines/SpecialMemberFunctionsCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/DurationDivisionCheck.cpp |
| clang-tools-extra/clang-tidy/abseil/DurationRewriter.cpp |
| clang-tools-extra/clang-tidy/bugprone/BadSignalToKillThreadCheck.cpp |
Commit
e9dc94291e7dd58d0ed14598f7d526641aefb778
by joker.ephIntroduce a new DialectIdentifier structure, extending Identifier with a Dialect information
This class is looking up a dialect prefix on the identifier on initialization
and keeping a pointer to the Dialect when found.
The NamedAttribute key is now a DialectIdentifier.
Reviewed By: rriddle, jpienaar
Differential Revision: https://reviews.llvm.org/D95418
|
| mlir/include/mlir/IR/Identifier.h |
| mlir/lib/IR/MLIRContext.cpp |
Commit
be62b3ba347d8d9e7ada364ddc9e16d7ddd05b8e
by Amara Emerson[AArch64][GlobalISel] Add a combine to fold away truncate in: G_ICMP EQ/NE (G_TRUNC(v), 0)
We try to do this optimization if we can determine that testing for the
truncated bits with an eq/ne predicate results in the same thing as testing
the lower bits.
Differential Revision: https://reviews.llvm.org/D95645
|
| llvm/lib/Target/AArch64/AArch64Combine.td |
| llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-icmp-redundant-trunc.mir |
| llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp |
Commit
d73564c510036b2d4f5858effdcd23fe54fc1063
by akhuang[DebugInfo][CodeView] Use <lambda_n> as the display name for lambdas.
Currently (for codeview) lambdas have a string like `<lambda_0>` in
their mangled name, and don't have any display name. This change uses the
`<lambda_0>` as the display name, which helps distinguish between lambdas
in -gline-tables-only, since there are no linkage names there.
It also changes how we display lambda names; previously we used
`<unnamed-tag>`; now it will show `<lambda_0>`.
I added a function to the mangling context code to create this string;
for Itanium it just returns an empty string.
Bug: https://bugs.llvm.org/show_bug.cgi?id=48432
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D95187
|
| clang/lib/CodeGen/CGDebugInfo.cpp |
| clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp |
| clang/include/clang/AST/Mangle.h |
| clang/lib/AST/ItaniumMangle.cpp |
| clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp |
| clang/lib/AST/MicrosoftMangle.cpp |
Commit
f19971d1ded2a983efd58eca0393026909368f44
by Jessica Paquette[GlobalISel] Implement computeKnownBits for G_ASSERT_ZEXT
It's the same as the ZEXT/TRUNC case, except SrcBitWidth is given by the
immediate operand.
Update KnownBitsTest.cpp and a MIR test for a concrete example.
Differential Revision: https://reviews.llvm.org/D95566
|
| llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-and-trivial-mask.mir |
| llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp |
| llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp |
Commit
12b9b778d916c721b2239f3c752196728875d290
by Amara Emerson[AArch64][GlobalISel] Enable CSE for the prelegalizer combiner.
Differential Revision: https://reviews.llvm.org/D95647
|
| llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir |
| llvm/test/CodeGen/AArch64/O0-pipeline.ll |
| llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll |
| llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp |
Commit
9b21d4b9434d2d4796b0d60d64f6ded9bac95441
by akhuangRevert "[DebugInfo][CodeView] Use <lambda_n> as the display name for lambdas."
for test failures.
This reverts commit d73564c510036b2d4f5858effdcd23fe54fc1063.
|
| clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp |
| clang/lib/AST/MicrosoftMangle.cpp |
| clang/lib/AST/ItaniumMangle.cpp |
| clang/include/clang/AST/Mangle.h |
| clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp |
| clang/lib/CodeGen/CGDebugInfo.cpp |
Commit
0e8f50595e22eb3ca8762c16d07e2fba5757cb71
by carl.ritson[AMDGPU] Mark V_SET_INACTIVE as defining SCC
V_SET_INACTIVE is implemented with S_NOT which clobbers SCC.
Mark sure it is marked appropriately.
Reviewed By: piotr
Differential Revision: https://reviews.llvm.org/D95509
|
| llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll |
| llvm/lib/Target/AMDGPU/SIInstrInfo.cpp |
| llvm/lib/Target/AMDGPU/SIInstructions.td |
| llvm/test/CodeGen/AMDGPU/wqm.mir |
Commit
43cc4f15008f8c700497d3d2b7020bfd29f5750f
by steveireEnsure that we traverse non-op() method bodys of lambdas
Differential Revision: https://reviews.llvm.org/D95644
|
| clang/include/clang/AST/RecursiveASTVisitor.h |
| clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
Commit
d5736a2746d3188f5d9a23d69da2226f9a318bda
by Jessica Paquette[GlobalISel] Implement regbankselect for G_ASSERT_ZEXT
This adds generic regbankselect support for G_ASSERT_ZEXT.
It inherits whatever register bank the source was given, always, on all targets.
I think that at the point where we run into these, the source register bank
should be decided.
This also adds some AArch64-specific code which makes sure we can handle
G_ASSERT_ZEXT when deciding on register banks for G_STORE, G_PHI, ... etc.
Differential Revision: https://reviews.llvm.org/D95649
|
| llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp |
| llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp |
| llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-zext.mir |
Commit
0824694d68d3b4aa2d6c726e395516dd1387a718
by carl.ritson[AMDGPU] Fix WMM Entry SCC preservation
SCC was not correctly preserved when entering WWM.
Current lit test was unable to detect this as entry block is
handled differently.
Additionally fix an issue where SCC was unnecessarily preserved
when exiting from WWM to Exact mode.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D95500
|
| llvm/test/CodeGen/AMDGPU/wqm.mir |
| llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp |
Commit
ad4a6ce10c43d65dd12502bda26dbc983f9bef4e
by Casey[libcxx][test] MoveOnly's comparisons are non-member
... so that comparisons with an `int` LHS and `MoveOnly` RHS are valid, as is necessary for the `partial_sort_copy` test to pass with an implementation that doesn't force a conversion to the type of the RHS as libc++ does.
|
| libcxx/test/support/MoveOnly.h |
Commit
d4eea5cf0f5d27d978184d70ce3a94e95dad8f01
by michaelrj[libc][NFC] Add a few casts to suppress loss of precision warnings
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D95646
|
| libc/utils/FPUtil/x86_64/FEnv.h |
Commit
edecee382608f6fcf1430c4bbf543359fae8330a
by Casey[libcxx][test] move libc++-specific tests into the libcxx tree
...and rename from `version.pass.cpp` to `version.compile.pass.cpp` to follow the new convention.
|
| libcxx/test/libcxx/thread/thread.semaphore/version.compile.pass.cpp |
| libcxx/test/std/thread/thread.semaphore/version.pass.cpp |
| libcxx/test/std/thread/thread.latch/version.pass.cpp |
| libcxx/test/libcxx/thread/thread.latch/version.compile.pass.cpp |
| libcxx/test/std/thread/thread.barrier/version.pass.cpp |
| libcxx/test/std/utilities/format/version.compile.pass.cpp |
| libcxx/test/libcxx/thread/thread.barrier/version.compile.pass.cpp |
| libcxx/test/libcxx/utilities/format/version.compile.pass.cpp |
Commit
d5f5deee9ee996f078fb40ee20795539409523e4
by akhuangReland "[DebugInfo][CodeView] Use <lambda_n> as the display name for lambdas"
with fix to test case and stringrefs.
Currently (for codeview) lambdas have a string like `<lambda_0>` in
their mangled name, and don't have any display name. This change uses the
`<lambda_0>` as the display name, which helps distinguish between lambdas
in -gline-tables-only, since there are no linkage names there.
It also changes how we display lambda names; previously we used
`<unnamed-tag>`; now it will show `<lambda_0>`.
I added a function to the mangling context code to create this string;
for Itanium it just returns an empty string.
Bug: https://bugs.llvm.org/show_bug.cgi?id=48432
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D95187
This reverts 9b21d4b9434d2d4796b0d60d64f6ded9bac95441
|
| clang/lib/AST/MicrosoftMangle.cpp |
| clang/include/clang/AST/Mangle.h |
| clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp |
| clang/test/CodeGenCXX/debug-info-codeview-unnamed.cpp |
| clang/lib/AST/ItaniumMangle.cpp |
| clang/lib/CodeGen/CGDebugInfo.cpp |
Commit
7ef79bb8e240aafab265107b8b7d63d3e32ddb93
by akhuangFix typo in "[DebugInfo][CodeView] Use <lambda_n> as the display name for lambdas."
(Commited in d5f5deee9ee996f078fb40ee20795539409523e4)
|
| clang/test/CodeGenCXX/debug-info-gline-tables-only-codeview.cpp |
Commit
d6d0c09e84d632f3a9954aebabb4933cd7bf64d3
by nullptr.cpp[NFC][llvm-nm] Fix unused variable warning
|
| llvm/tools/llvm-nm/llvm-nm.cpp |
Commit
e5f258cb03f249601222496e6bb350fe2cc3431e
by nullptr.cpp[NFC][DebugInfo] Fix Wreturn-type gcc warning
GCC warning:
```
/llvm-project/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp: In member function ‘llvm::Expected<long unsigned int> llvm::dwarf::CFIProgram::Instruction::getOperandAsUnsigned(const llvm::dwarf::CFIProgram&, uint32_t) const’:
/llvm-project/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp:425:1: warning: control reaches end of non-void function [-Wreturn-type]
425 | }
| ^
/llvm-project/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp: In member function ‘llvm::Expected<long int> llvm::dwarf::CFIProgram::Instruction::getOperandAsSigned(const llvm::dwarf::CFIProgram&, uint32_t) const’:
/llvm-project/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp:477:1: warning: control reaches end of non-void function [-Wreturn-type]
477 | }
| ^
```
|
| llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp |
Commit
b2545b71d121ac913e56faff3b704f3957f941b7
by Jonas Devlieghere[lldb] Use `foo is None` instead of `not foo` in darwin.py
Explicitly compare to None when checking the triple's components so we
don't bail out when one of them is the empty string.
|
| lldb/packages/Python/lldbsuite/test/builders/darwin.py |
Commit
892e4567e1357ee10ef67ee6dfbe45aeded9d2dc
by Christudasan.DevadasanSupport a list of CostPerUse values
This patch allows targets to define multiple cost
values for each register so that the cost model
can be more flexible and better used during the
register allocation as per the target requirements.
For AMDGPU the VGPR allocation will be more efficient
if the register cost can be associated dynamically
based on the calling convention.
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D86836
|
| llvm/utils/TableGen/RegisterInfoEmitter.cpp |
| llvm/utils/TableGen/CodeGenRegisters.cpp |
| llvm/lib/Target/RISCV/RISCVRegisterInfo.td |
| llvm/utils/TableGen/CodeGenRegisters.h |
| llvm/include/llvm/CodeGen/TargetRegisterInfo.h |
| llvm/test/TableGen/RegisterInfoEmitter-regcost-tuple.td |
| llvm/include/llvm/CodeGen/RegisterClassInfo.h |
| llvm/lib/Target/ARM/ARMRegisterInfo.td |
| llvm/lib/Target/X86/X86RegisterInfo.td |
| llvm/include/llvm/Target/Target.td |
| llvm/lib/Target/ARC/ARCRegisterInfo.td |
| llvm/lib/CodeGen/RegAllocGreedy.cpp |
| llvm/test/TableGen/RegisterInfoEmitter-regcost-list.td |
| llvm/test/TableGen/RegisterInfoEmitter-regcost.td |
| llvm/lib/CodeGen/RegisterClassInfo.cpp |
Commit
8a4ad8849f4898dd19e31b9dcede7ace3575d00d
by mkazantsev[SCEV] Do not cache comparison result upon reached max depth as "equivalence". PR48725
We use `EquivalenceClasses` to cache the notion that two SCEVs are equivalent,
so save time in situation when `A` is equivalent to `B` and `B` is equivalent to `C`,
making check "if `A` is equivalent to `C`?" cheaper.
We also return `0` in the comparator when we reach max analysis depth to save
compile time. After doing this, we also cache them as being equivalent.
Now, imagine the following situation:
- `A` is proved equivalent to `B`;
- `C` is proved equivalent to `D`;
- Comparison of `A` against `D` is proved non-zero;
- Comparison of `B` against `C` reaches max depth (and gets cached as equivalence).
Now, before the invocation of compare(`B`, `C`), `A` and `D` belonged
to different equivalence classes, and their comparison returned non-zero.
After the the invocation of compare(`B`, `C`), equivalence classes get merged
and `A`, `B`, `C` and `D` all fall into the same equivalence class. So the comparator
will change its behavior for couple `A` and `D`, with weird consequences following it.
This comparator is finally used in `std::stable_sort`, and this behavior change
makes it crash (looks like it's causing a memory corruption).
Solution: this patch changes `CompareSCEVComplexity` to return `None`
when the max depth is reached. So in this case, we do not cache these SCEVs
(and their parents in the tree) as being equivalent.
Differential Revision: https://reviews.llvm.org/D94654
Reviewed By: lebedev.ri
|
| llvm/test/Transforms/LoopStrengthReduce/pr48725.ll |
| llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
e15ae67a0a7b32aef883b84e127295ce3f6e9226
by wmi[LiveDebugVariables] Add cache for SkipPHIsLabelsAndDebug to prevent
iterating the same PHI/LABEL/Debug instructions repeatedly.
We run into a compiling timeout problem when building a target after its
SampleFDO profile is updated. It is because some very large blocks with
a bunch of PHIs at the beginning. LiveDebugVariables::emitDebugValues
called during VirtRegRewriter phase searchs the insertion point for those
large BBs repeatedly in SkipPHIsLabelsAndDebug, and each time
SkipPHIsLabelsAndDebug needs to go through the same set of PHIs before it
can find the first non PHI/Label/Debug instruction. This patch adds a cache
to save the last position for the sequence which has been checked in the
previous call of SkipPHIsLabelsAndDebug.
Differential Revision: https://reviews.llvm.org/D94981
|
| llvm/lib/CodeGen/LiveDebugVariables.cpp |
Commit
078f30e04d1fcb5a05d8e340f3178f3478075541
by bjoern[clang-format] Add option to control the spaces in a line comment
Differential Revision: https://reviews.llvm.org/D92257
|
| clang/lib/Format/BreakableToken.h |
| clang/unittests/Format/FormatTest.cpp |
| clang/include/clang/Format/Format.h |
| clang/unittests/Format/FormatTestComments.cpp |
| clang/docs/ClangFormatStyleOptions.rst |
| clang/lib/Format/BreakableToken.cpp |
| clang/lib/Format/Format.cpp |
| clang/docs/ReleaseNotes.rst |
| clang/lib/Format/NamespaceEndCommentsFixer.cpp |
Commit
046cfb856517c6140d5e1c0989232e26d00b05b2
by kazu[llvm] Forward-declare formatted_raw_ostream (NFC)
Various *TargetStreamer.h need formatted_raw_ostream but rely on a
forward declaration of formatted_raw_ostream in MCStreamer.h. This
patch adds forward declarations right in *TargetStreamer.h.
While we are at it, this patch removes the one in MCStreamer.h, where
it is unnecessary.
|
| llvm/include/llvm/MC/MCStreamer.h |
| llvm/lib/Target/Mips/MipsTargetStreamer.h |
| llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h |
| llvm/lib/Target/Sparc/MCTargetDesc/SparcTargetStreamer.h |
| llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h |
| llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h |
Commit
7925aa091db0f16b967fc82243601e207a29ebeb
by kazu[llvm] Populate SmallVector at construction time (NFC)
|
| llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp |
| llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp |
| llvm/lib/Target/ARM/ARMISelLowering.cpp |
| llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
| llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp |
Commit
6cedffc0ad8d9c48caf42b436acaa1f509925b4a
by kazu[MustExecute] Use ListSeparator (NFC)
|
| llvm/lib/Analysis/MustExecute.cpp |
Commit
ec812898318036f6c33579b1d35c1a7f83cf112f
by Artem Dergachev[clang-tidy] bugprone-assert-side-effect: Improve warning message.
Drop redundant "found", specify what exactly is wrong with side effects
in assert conditions.
Differential Revision: https://reviews.llvm.org/D95515
|
| clang-tools-extra/test/clang-tidy/checkers/bugprone-assert-side-effect.cpp |
| clang-tools-extra/clang-tidy/bugprone/AssertSideEffectCheck.cpp |
Commit
b92a39ac1319c796777bca19a3af2856acbc69c1
by Artem Dergachev[clang-tidy] bugprone-assert-side-effect: Warn on NSAssert by default.
NSAssert and NSCAssert are Objective-C Foundation's standard assert macros.
Differential Revision: https://reviews.llvm.org/D95519
|
| clang-tools-extra/test/clang-tidy/checkers/bugprone-assert-side-effect.m |
| clang-tools-extra/clang-tidy/bugprone/AssertSideEffectCheck.cpp |
Commit
59bd2068e954e5d6d8396c4f27b94ad7f3abf3b1
by nullptr.cpp[NFC][ScalarizeMaskedMemIntrin] Fix unused variable warning
GCC warning:
```
/llvm-project/llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp: In function ‘void scalarizeMaskedStore(llvm::CallInst*, llvm::DomTreeUpdater*, bool&)’:
/llvm-project/llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp:295:15: warning: variable ‘IfBlock’ set but not used [-Wunused-but-set-variable]
295 | BasicBlock *IfBlock = CI->getParent();
| ^~~~~~~
/llvm-project/llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp: In function ‘void scalarizeMaskedScatter(llvm::CallInst*, llvm::DomTreeUpdater*, bool&)’:
/llvm-project/llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp:555:15: warning: variable ‘IfBlock’ set but not used [-Wunused-but-set-variable]
555 | BasicBlock *IfBlock = CI->getParent();
| ^~~~~~~
```
|
| llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
Commit
f25a57e248a095054a6088b4ffc060e87cd42bc7
by hokein.wu[clangd] Add include-fixer fixit for field_incomplete_or_sizeless diagnostic.
Differential Revision: https://reviews.llvm.org/D95439
|
| clang-tools-extra/clangd/IncludeFixer.cpp |
| clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp |
Commit
4ad41f1daf0fa98a2c23fdf57390df0948164a2f
by bjoernRevert "[clang-format] Add option to control the spaces in a line comment"
This reverts commit 078f30e04d1fcb5a05d8e340f3178f3478075541.
|
| clang/lib/Format/Format.cpp |
| clang/docs/ReleaseNotes.rst |
| clang/lib/Format/BreakableToken.cpp |
| clang/unittests/Format/FormatTestComments.cpp |
| clang/unittests/Format/FormatTest.cpp |
| clang/lib/Format/BreakableToken.h |
| clang/docs/ClangFormatStyleOptions.rst |
| clang/include/clang/Format/Format.h |
| clang/lib/Format/NamespaceEndCommentsFixer.cpp |
Commit
a5154ab9b0c162cadea70d870884a70032c747c1
by grimar[llvm-readobj/elf] - Report "bitcode files are not supported" warning for bitcode files.
Fixes https://bugs.llvm.org/show_bug.cgi?id=43543
Currently we report "The file was not recognized as a valid object file" for BC files.
Also, we terminate dumping.
Instead we could report a better warning and try to continue dumping other files.
This is what this patch implements.
Differential revision: https://reviews.llvm.org/D95605
|
| llvm/tools/llvm-readobj/llvm-readobj.cpp |
| llvm/test/tools/llvm-readobj/basic.test |
Commit
83bd24220206765b1855514e3435c52ae8be8706
by chennngwang[libc][Obvious] Remove DEPS for unistd.h in CMake file of memmove.
|
| libc/src/string/CMakeLists.txt |
Commit
cba2552bfec1c9d837f7285a743e9e12fa6b043e
by saghir[llvm-jitlink] Replace use of deprecated gethostbyname by getaddrinfo.
This patch replaces use of deprecated gethostbyname by getaddrinfo.
Author: Rafik Zurob
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D95477
|
| llvm/tools/llvm-jitlink/llvm-jitlink.cpp |
Commit
d47ee525f9e9289815db0864b03e866fc8e5ba01
by sguelton[clang-tooling] Prevent llvm::fatal_error on invalid CLI option
Fail gracefully instead. Prevent further misuse by enforcing the factory builder
instead of the constructor.
Differential Revision: https://reviews.llvm.org/D94420
|
| clang-tools-extra/clang-include-fixer/tool/ClangIncludeFixer.cpp |
| clang/include/clang/Tooling/CommonOptionsParser.h |
| clang/tools/clang-refactor/ClangRefactor.cpp |
| clang/tools/clang-rename/ClangRename.cpp |
| clang/lib/Tooling/CommonOptionsParser.cpp |
| clang-tools-extra/test/clang-tidy/infrastructure/invalid-command-line.cpp |
| clang-tools-extra/clang-include-fixer/find-all-symbols/tool/FindAllSymbolsMain.cpp |
| clang-tools-extra/clang-move/tool/ClangMove.cpp |
| clang/docs/LibASTMatchersTutorial.rst |
| clang-tools-extra/clang-change-namespace/tool/ClangChangeNamespace.cpp |
| clang/tools/clang-extdef-mapping/ClangExtDefMapGen.cpp |
| clang-tools-extra/test/clang-query/invalid-command-line.cpp |
| clang/tools/clang-check/ClangCheck.cpp |
| clang-tools-extra/clang-reorder-fields/tool/ClangReorderFields.cpp |
Commit
1c762a81d20f498a93c38c0f0b10ad7c18650422
by chennngwang[libc][Obvious] Fix typo
|
| libc/test/src/math/CMakeLists.txt |
Commit
0c5e4a25ee232afd0ab21294dfe9ce290957aab6
by tpopp[mlir] Prevent segfault in Tensor canonicalization
This segfault could occur from out of bounds accesses when simplifying
tensor.extract with a constant index and a tensor created by
tensor.from_elements.
This IR is not necesarilly invalid as it might conditionally be
never executed.
Differential Revision: https://reviews.llvm.org/D95535
|
| mlir/test/Dialect/Tensor/canonicalize.mlir |
| mlir/lib/Dialect/Tensor/IR/TensorOps.cpp |
Commit
27f2fe9163ec9e96f240fa57b5e2d7c55f54e266
by sgueltonAdapt lldb-instr to d47ee525f9e92898 APi change
|
| lldb/tools/lldb-instr/Instrument.cpp |
Commit
7f5ad0e07162e0c19e569986ee37a17c147c9a27
by Andrey.Churbanov[OpenMP] libomp: fix build by cl with vs2019
Replace VLA with dynamic allocation using alloca().
This fixes https://bugs.llvm.org/show_bug.cgi?id=48919.
Differential Revision: https://reviews.llvm.org/D95627
|
| openmp/runtime/src/kmp_settings.cpp |
Commit
305ac81e1d4bbd037587190175e4d0b5631300e1
by thomaspFix macos target assumption in test
Clang test Driver/macos-apple-silicon-slice-link-libs-darwin-only.cpp
assumes the target is darwin when the host is darwin which is not
necessarily the case, causing the test to fail when it is not. This
commit adds a -triple argument to the clang invocation to ensure the
target is darwin.
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D94396
|
| clang/test/Driver/macos-apple-silicon-slice-link-libs-darwin-only.cpp |
Commit
2ff8662b5d16129ec6d1ee60dcec4f6ff8f717e2
by martin[libcxx] Implement the stat function family on top of native windows APIs
While the windows CRTs (the modern UCRT, and the legacy msvcrt.dll
that mingw still often defaults to) do provide stat functions, they're
a bit lacking - they only provide second precision on the modification
time, lack support for symlinks and a few other details.
Instead reimplement them using a couple windows native functions,
getting exactly the info we need. (Technically, the implementation
within the CRT calls these functions anyway.)
If we only need a few fields, we could also do with fewer calls, as a
later optimization.
Differential Revision: https://reviews.llvm.org/D91141
|
| libcxx/src/CMakeLists.txt |
| libcxx/src/filesystem/filesystem_common.h |
| libcxx/src/filesystem/operations.cpp |
| libcxx/src/filesystem/posix_compat.h |
Commit
592d62352933d34af62334d172c6fc665933e0de
by martin[libcxx] Implement _FilesystemClock::now() and __last_write_time for windows
Differential Revision: https://reviews.llvm.org/D91142
|
| libcxx/src/filesystem/filesystem_common.h |
| libcxx/src/filesystem/operations.cpp |
| libcxx/src/filesystem/posix_compat.h |
Commit
efec3cc6524bc536459b9cb6faca190b1e3804b6
by martin[libcxx] Hook up a number of operation functions to their windows counterparts
Use the corresponding wchar functions, named "_wfunc" instead of "func",
where feasible, or reimplement functions with native windows APIs.
Differential Revision: https://reviews.llvm.org/D91143
|
| libcxx/src/filesystem/posix_compat.h |
| libcxx/src/filesystem/operations.cpp |
Commit
f65ba25cf37a57dc87db7af389c9dc637ca7dd8c
by martin[libcxx] Sanitize paths before creating symlinks on windows
The MS STL does even more cleanup (corresponding to lexically_normal
I think), but this seems to be the very minimum needed for making the
symlinks work when the target path contains non-native paths.
Differential Revision: https://reviews.llvm.org/D91145
|
| libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_symlink/create_symlink.pass.cpp |
| libcxx/src/filesystem/posix_compat.h |
Commit
64ced3ce89a6dd429136d0ad7832853d8b3fdef0
by thakis[gn build] (semi-manually) port 2ff8662b5d16
|
| llvm/utils/gn/secondary/libcxx/src/BUILD.gn |
Commit
f3a710cade9381030f3e1e9778c5fc12f8a02fdf
by flo[LTO] Update splitCodeGen to take a reference to the module. (NFC)
splitCodeGen does not need to take ownership of the module, as it
currently clones the original module for each split operation.
There is an ~4 year old fixme to change that, but until this is
addressed, the function can just take a reference to the module.
This makes the transition of LTOCodeGenerator to use LTOBackend a bit
easier, because under some circumstances, LTOCodeGenerator needs to
write the original module back after codegen.
Reviewed By: tejohnson
Differential Revision: https://reviews.llvm.org/D95222
|
| llvm/lib/Transforms/Utils/SplitModule.cpp |
| llvm/include/llvm/LTO/LTOBackend.h |
| llvm/lib/LTO/LTOBackend.cpp |
| llvm/lib/LTO/LTO.cpp |
| llvm/tools/llvm-split/llvm-split.cpp |
| llvm/lib/LTO/LTOCodeGenerator.cpp |
| llvm/include/llvm/Transforms/Utils/SplitModule.h |
| llvm/lib/CodeGen/ParallelCG.cpp |
| llvm/include/llvm/CodeGen/ParallelCG.h |
Commit
6e52eebc2a68f34aa19a2b80f1b763aac692d542
by nikita.ppv[MemCpyOpt] Add test for incorrect optimization across lifetime (NFC)
This only affects the MemorySSA-based implementation.
|
| llvm/test/Transforms/MemCpyOpt/lifetime.ll |
Commit
42a21778f61cdc8462ce2cfb6ad7bc1992b2063c
by Abhina.Sreeskantharajan[test] Use host platform specific error message substitution in lit tests
On z/OS, the following error message is not matched correctly in lit tests.
```
EDC5129I No such file or directory.
```
This patch uses a lit config substitution to check for platform specific error messages.
Reviewed By: muiez, jhenderson
Differential Revision: https://reviews.llvm.org/D95246
|
| llvm/test/tools/llvm-ar/error-opening-directory.test |
| lld/test/MachO/invalid/no-filelist.s |
| llvm/test/tools/llvm-lipo/create-arch.test |
| llvm/test/tools/llvm-readobj/basic.test |
| llvm/test/tools/dsymutil/X86/papertrail-warnings.test |
| llvm/test/tools/llvm-ar/move.test |
| lld/test/ELF/archive-thin-missing-member.s |
| llvm/test/tools/llvm-libtool-darwin/filelist.test |
| llvm/test/DebugInfo/symbolize-missing-file.test |
| llvm/test/tools/dsymutil/archive-timestamp.test |
| llvm/test/tools/llvm-ar/response.test |
| clang/test/CodeGen/ubsan-blacklist-vfs.c |
| llvm/test/tools/llvm-mca/invalid_input_file_name.test |
| llvm/test/tools/llvm-objcopy/COFF/add-section.test |
| llvm/test/tools/llvm-ar/quick-append.test |
| llvm/test/tools/llvm-ar/print.test |
| llvm/test/tools/yaml2obj/output-file.yaml |
| llvm/utils/lit/lit/llvm/config.py |
| llvm/test/tools/llvm-size/no-input.test |
| lld/test/ELF/basic.s |
| llvm/test/tools/llvm-readobj/thin-archive.test |
| llvm/test/tools/llvm-objcopy/ELF/error-format.test |
| llvm/test/tools/llvm-profdata/weight-sample.test |
| llvm/test/tools/llvm-mc/basic.test |
| llvm/test/tools/llvm-libtool-darwin/invalid-input-output-args.test |
| clang/test/Frontend/output-paths.c |
| llvm/test/tools/llvm-profdata/weight-instr.test |
| llvm/test/tools/llvm-cxxdump/trivial.test |
| llvm/test/tools/obj2yaml/invalid_input_file.test |
| llvm/docs/TestingGuide.rst |
| llvm/test/tools/llvm-lipo/replace-invalid-input.test |
| llvm/test/Object/directory.ll |
| llvm/test/tools/llvm-objcopy/redefine-symbols.test |
| llvm/test/tools/llvm-xray/X86/no-such-file.txt |
| llvm/test/Object/archive-extract.test |
| clang/test/Frontend/stats-file.c |
| llvm/test/Object/archive-extract-dir.test |
| llvm/test/tools/llvm-lto/error.ll |
| llvm/test/tools/llvm-readobj/ELF/thin-archive-paths.test |
| lld/test/COFF/manifestinput-error.test |
| llvm/test/tools/llvm-ar/replace.test |
| llvm/test/tools/llvm-lto2/X86/stats-file-option.ll |
| llvm/test/tools/llvm-ml/basic.test |
| llvm/test/tools/llvm-symbolizer/pdb/missing_pdb.test |
| llvm/test/tools/llvm-objcopy/wasm/dump-section.test |
| llvm/test/tools/llvm-objcopy/MachO/add-section-error.test |
| llvm/test/tools/dsymutil/debug-map-parsing.test |
| llvm/test/tools/llvm-ar/missing-thin-archive-member.test |
| lld/test/COFF/pdb-type-server-invalid-signature.yaml |
| clang/test/CodeGen/basic-block-sections.c |
| clang/test/Driver/clang-offload-bundler.c |
| lld/test/ELF/symbol-ordering-file.s |
| llvm/test/tools/llvm-objcopy/ELF/add-section.test |
| lld/test/COFF/nodefaultlib.test |
| lld/test/COFF/driver.test |
| lld/test/COFF/pdb-type-server-missing.yaml |
| lld/test/ELF/reproduce-error.s |
| llvm/test/MC/Hexagon/not_found.s |
Commit
e90e455d2a0cc6e04b930a43355c3551e2c6f0e0
by hokein.wu[Syntax] Add syntax-tree-dump in clang-check.
This is useful to experiment/develop syntax trees.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D95526
|
| clang/tools/clang-check/ClangCheck.cpp |
| clang/tools/clang-check/CMakeLists.txt |
| clang/test/Tooling/clang-check-syntax-tree-dump.cpp |
Commit
229c1cff510b7a2fe9eb9ddf4cb4787f08cab7bd
by thakis[gn build] port e90e455d2a0cc
|
| llvm/utils/gn/secondary/clang/tools/clang-check/BUILD.gn |
Commit
f03f3a84747c788f0f196b309785d322fa4e91a1
by sjoerd.meijer[MachineLICM] Fix wrong and confusing comment. NFC.
|
| llvm/lib/CodeGen/MachineLICM.cpp |
Commit
d0817b5f18c7bb435012d214f293d4a7839e492e
by sam.mccall[clangd] Extract symbol-scope logic out of Quality, add tests. NFC
This prepares for reuse from the semantic highlighting code.
There's a bit of yak-shaving here:
- when the enum is moved into the clangd namespace, promote it to a
scoped enum. This means teaching the decision forest infrastructure
to deal with scoped enums.
- AccessibleScope isn't quite the right name: e.g. public class members
are treated as accessible, but still have class scope. So rename to
SymbolScope.
- Rename some QualitySignals members to avoid name conflicts.
(the string) SymbolScope -> Scope
(the enum) Scope -> ScopeKind
|
| clang-tools-extra/clangd/AST.cpp |
| clang-tools-extra/clangd/quality/CompletionModelCodegen.py |
| clang-tools-extra/clangd/unittests/QualityTests.cpp |
| clang-tools-extra/clangd/Quality.h |
| clang-tools-extra/clangd/CodeComplete.cpp |
| clang-tools-extra/clangd/Quality.cpp |
| clang-tools-extra/clangd/quality/model/features.json |
| clang-tools-extra/clangd/unittests/ASTTests.cpp |
| clang-tools-extra/clangd/AST.h |
Commit
7d1b499caef6ebde09a2697a97b43b89f7fa35c8
by sam.mccallRevert "[clangd] Extract symbol-scope logic out of Quality, add tests. NFC"
On second thought, this can't properly be reused for highlighting.
Consider this example, which Quality wants to consider function-scope,
but highlighting must consider class-scope:
void foo() {
class X {
int ^y;
};
}
|
| clang-tools-extra/clangd/quality/CompletionModelCodegen.py |
| clang-tools-extra/clangd/Quality.cpp |
| clang-tools-extra/clangd/quality/model/features.json |
| clang-tools-extra/clangd/unittests/ASTTests.cpp |
| clang-tools-extra/clangd/unittests/QualityTests.cpp |
| clang-tools-extra/clangd/AST.cpp |
| clang-tools-extra/clangd/AST.h |
| clang-tools-extra/clangd/CodeComplete.cpp |
| clang-tools-extra/clangd/Quality.h |
Commit
27924b126329528024d5b3a5bf71a4f637de853a
by csigg[mlir] Remove mlir_c_runner_utils_static.
The library is not actually static when BUILD_SHARED_LIBS is on, and tests need to explicitly load it already. Also, the shared objects it was linked to did not use any symbols from it and it was therefore never linked to it.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D95612
|
| mlir/lib/ExecutionEngine/CMakeLists.txt |
Commit
d6b68d134415300cad55220bfb80e4934217ba19
by llvm-dev[X86][SSE] combineExtractWithShuffle - support zero-extending to allow extracting from narrow shuffle masks
If the shuffle mask can't be widened to match the original extracted element width, see if the upper bits are zeroable - which allows us to extract+zero-extend the smaller extraction.
|
| llvm/test/CodeGen/X86/shrink_vmul.ll |
| llvm/test/CodeGen/X86/promote-vec3.ll |
| llvm/test/CodeGen/X86/avg.ll |
| llvm/test/CodeGen/X86/buildvec-insertvec.ll |
| llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll |
| llvm/lib/Target/X86/X86ISelLowering.cpp |
| llvm/test/CodeGen/X86/udiv_fix.ll |
| llvm/test/CodeGen/X86/udiv_fix_sat.ll |
| llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll |
Commit
82847436e9258a12503dcfadb5dc373cb42fea43
by thakisclang-cl: Invent a /winsysroot concept
On non-Windows platforms, --sysroot can be used to make the compiler use
a single, hermetic directory for all header and library files.
This is useful, but difficult to do on Windows. After D95472 it's
possible to achieve this with two flags:
out/gn/bin/clang-cl win.c -fuse-ld=lld \
/vctoolsdir path/to/VC/Tools/MSVC/14.26.28801 \
/winsdkdir path/to/win_sdk
But that's still cumbersome: It requires two flags instead of one, and
it requires writing down the (changing) VC/Tools/MSVC version.
This adds a new `/winsysroot <dir>` flag that's effectively an alias to
these two flags. With this, building against a hermetic Windows
toolchain only needs:
out/gn/bin/clang-cl win.c -fuse-ld=lld /winsysroot path
`/winsysroot <dir>` is the same as adding
/vctoolsdir <dir>/VC/Tools/MSVC/<vctoolsver>
/winsdkdir <dir>/Windows Kits/<winsdkmajorversion>
`<vctoolsver>` is taken from `/vctoolsversion` if passed, or else it's
the name of the directory in `<dir>/VC/Tools/MSVC` that's the highest
numeric tuple.
`<winsdkmajorversion>` is the major version in /winsdkversion if passed,
else it's the name of the directory in `<dir>/Windows Kits` that's the
highest number.
So `/winsysroot <path>` requires this subfolder structure:
path/
VC/
Tools/
MSVC/
14.26.28801 (or another number)
include/
...
Windows Kits/
10/
Include/
10.0.19041.0/ (or another number)
um/
...
Lib/
10.0.19041.0/ (or another number)
um/
x64/
...
...
Differential Revision: https://reviews.llvm.org/D95534
|
| clang/test/Driver/cl-sysroot.cpp |
| clang/lib/Driver/ToolChains/MSVC.cpp |
| clang/include/clang/Driver/Options.td |
Commit
d087d805acb664e885e9c31a916f6cfa5dbc2186
by thakisclang-cl: Accept /std:c11, /std:c17 flags
clang-cl already defaults to C17 for .c files, but no harm
in accepting these flags. Fixes PR48185.
Differential Revision: https://reviews.llvm.org/D95575
|
| clang/test/Driver/cl-options.c |
| clang/include/clang/Driver/Options.td |
| clang/lib/Driver/ToolChains/Clang.cpp |
Commit
5046c5be8459a9631eeb149337776dcbde0e2a0b
by paul[TableGen] Fix instantiating multiclass in foreach
If multiclass argument comes from loop varaible and argument is record type,
it will not recognize the type. This patch ensures that loop variables are
resolved correctly.
Differential Revision: https://reviews.llvm.org/D95308
|
| llvm/lib/TableGen/TGParser.cpp |
| llvm/test/TableGen/foreach-multiclass.td |
Commit
543cd89d3fb5a108d4050635c00093695b2b6c6d
by psteinfeld[flang] Fix problems with constant arrays with lower bounds that are not 1
There were two problems with constant arrays whose lower bound is not 1.
First, when folding the arrays, we were creating the folded array to have lower
bounds of 1 but, we were not re-adjusting their lower bounds to the
declared values. Second, we were not calculating the extents correctly.
Both of these problems led to bogus error messages.
I fixed the first problem by adjusting the lower bounds in
NonPointerInitializationExpr() in Evaluate/check-expression.cpp. I wrote the
class ArrayConstantBoundChanger, which is similar to the existing class
ScalarConstantExpander. In the process of implementing and testing it, I found
a bug that I fixed in ScalarConstantExpander which caused it to infinitely
recurse on parenthesized expressions. I also removed the unrelated class
ScalarExpansionVisitor, which was not used.
I fixed the second problem by changing the formula that calculates upper bounds
in in the function ComputeUpperBound() in Evaluate/shape.cpp.
I added tests that trigger the bogus error messages mentioned above along with
a constant folding tests that uses array operands with shapes that conform but
have different bounds.
In the process of adding tests, I discovered that tests in
Evaluate/folding09.f90 and folding16.f90 were written incorrectly, and I
fixed them. This also revealed a bug in contant folding of the
intrinsic "lbounds" which I plan to fix in a later change.
Differential Revision: https://reviews.llvm.org/D95449
|
| flang/include/flang/Evaluate/tools.h |
| flang/test/Evaluate/folding16.f90 |
| flang/lib/Evaluate/check-expression.cpp |
| flang/lib/Evaluate/shape.cpp |
| flang/test/Evaluate/folding09.f90 |
| flang/test/Semantics/array-constr-values.f90 |
| flang/test/Evaluate/test_folding.sh |
Commit
164c6de530586a984d998522d6dd1202c0430540
by jay.foad[AMDGPU] Test all register names known to AMDGPUPALMetadata
Differential Revision: https://reviews.llvm.org/D95684
|
| llvm/test/MC/AMDGPU/pal-registers.s |
Commit
1608ba09462d877111230e9461b895f696f8fcb1
by thakisRevert "Disable rosegment for old Android versions."
This reverts commit fae16fc0eed7cf60207901818cfe040116f2ef00.
Breaks building compiler-rt android runtimes with trunk clang
but older NDK, see discussion on https://reviews.llvm.org/D95166
|
| clang/lib/Driver/ToolChains/Linux.cpp |
| clang/test/Driver/linux-ld.c |
Commit
5cf6412a27892a7a48c83e26d79f8c3ae1cfa944
by jay.foad[GlobalISel] Fix modifying a G_OR without notifying the observer
Remove the call to setFlags in favour of creating the instruction with
the correct flags in the first place, so we don't have to explicitly
notify the observer.
Differential Revision: https://reviews.llvm.org/D95681
|
| llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h |
| llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
Commit
9b64e0e205603bd558d180a0b900ccdbe105bf2b
by andrzej.warzynski[flang][docs] Add New Flang Driver Biweekly call
|
| flang/docs/GettingInvolved.md |
Commit
010b176cdefbf904d58dc92b9ed3d19df70dd2a5
by rupprecht[mlir][docs] Fix typo: even -> event
|
| mlir/docs/PassManagement.md |
Commit
c5e7e649d537067dec7111f3de1430d0fc8a4d11
by Pavel.Iliin[AArch64][Clang][Linux] Enable out-of-line atomics by default.
Generate outline atomics if compiling for armv8-a non-LSE AArch64 Linux
(including Android) targets to use LSE instructions, if they are available,
at runtime. Library support is checked by clang driver which doesn't enable
outline atomics if no proper libraries (libgcc >= 9.3.1 or compiler-rt) found.
Differential Revision: https://reviews.llvm.org/D93585
|
| clang/lib/Driver/ToolChains/Linux.cpp |
| clang/test/Driver/Inputs/aarch64-linux-gnu-tree/gcc-7.5.0/lib/gcc/aarch64-unknown-linux-gnu/7.5.0/crtbegin.o |
| clang/test/Driver/Inputs/aarch64-linux-gnu-tree/gcc-9.3.1/lib/gcc/aarch64-unknown-linux-gnu/9.3.1/crtbegin.o |
| clang/test/Driver/Inputs/aarch64-linux-gnu-tree/gcc-7.5.0/lib/gcc/aarch64-unknown-linux-gnu/7.5.0/libgcc.a |
| clang/test/Driver/Inputs/aarch64-linux-gnu-tree/gcc-9.3.0/lib/gcc/aarch64-unknown-linux-gnu/9.3.0/crtbegin.o |
| clang/lib/Driver/ToolChains/Clang.cpp |
| clang/test/Driver/Inputs/aarch64-linux-gnu-tree/gcc-9.3.0/lib/gcc/aarch64-unknown-linux-gnu/9.3.0/libgcc.a |
| clang/test/Driver/Inputs/aarch64-linux-gnu-tree/gcc-10/lib/gcc/aarch64-unknown-linux-gnu/10/libgcc.a |
| clang/test/Driver/Inputs/aarch64-linux-gnu-tree/gcc-9.3.1/lib/gcc/aarch64-unknown-linux-gnu/9.3.1/libgcc.a |
| clang/include/clang/Driver/ToolChain.h |
| clang/test/Driver/aarch64-features.c |
| clang/lib/Driver/ToolChains/Linux.h |
| clang/test/Driver/Inputs/aarch64-linux-gnu-tree/gcc-10/lib/gcc/aarch64-unknown-linux-gnu/10/crtbegin.o |
Commit
0217f1c7a31ba44715bc083a60cddc2192ffed96
by phosekMake the profile-filter.c test compatible with 32-bit systems
This addresses PR48930.
Differential Revision: https://reviews.llvm.org/D95658
|
| clang/test/CodeGen/profile-filter.c |
Commit
9f8ca86a87a73c4fba6f8f229008117f7d0f35ab
by Casey[libcxx][test] explicitly discard bitset::test's return
... just in case some implementation annotates it `[[nodiscard]]`.
|
| libcxx/test/std/utilities/template.bitset/bitset.members/test.out_of_range.pass.cpp |
Commit
5565092faa58c903206d4212377f367fe8720b67
by Casey[libcxx][test] Silence false positive MSVC /analyze warning
|
| libcxx/test/std/utilities/template.bitset/bitset.members/reset_one.pass.cpp |
Commit
7bc31018f71cac22b7060c49cefb6f3d0d2e2069
by tianshilei1992[OpenMP][NFC] Added release note for new `deviceRTLs` and hidden helper task
Added release note for new `deviceRTLs` and hidden helper task for LLVM
12.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95584
|
| openmp/docs/ReleaseNotes.rst |
Commit
67773681c0ef2a778a3c34d23b365899cd33e0c3
by terry.l.wilmarth[OpenMP] Add environment variable to force monotonic dynamic scheduling
This patch introduces a new environment variable to force monotonic
behavior for users that absolutely need it. This is in anticipation
of 5.0 change that uses non-monotonic behavior for dynamic scheduling
by default. Fixes for that and the actual switch are coming soon.
Differential Revision: https://reviews.llvm.org/D95263
|
| openmp/runtime/src/kmp.h |
| openmp/runtime/src/kmp_dispatch.cpp |
| openmp/runtime/src/kmp_global.cpp |
| openmp/runtime/src/kmp_settings.cpp |
Commit
605751790418ca4fb1df1e94dfbac34cfcc1b96f
by Casey[libcxx][test] Silence MSVC narrowing warning
|
| libcxx/test/std/utilities/function.objects/func.search/func.search.default/default.pred.pass.cpp |
Commit
caaaebcde462bf681498ce85c2659d683a07fc87
by zarko[AIX] Actually push back "-mabi=vec-extabi" when option is on.
Accidentaly ommitted the portion of pushing back the option in
https://reviews.llvm.org/D94986
|
| clang/lib/Driver/ToolChains/Clang.cpp |
Commit
ee4f8860e5f882a7ed1e1549301006c14ed4e749
by i[VE] Add include for formatted_raw_ostream after 046cfb856517c6140d5e1c0989232e26d00b05b2
|
| llvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.h |
| llvm/lib/Target/VE/MCTargetDesc/VETargetStreamer.cpp |
Commit
d6656c3b258ef2c40ad089dbb4bfcbb29fd47d9e
by Jessica Paquette[GlobalISel] Remove hint instructions in generic InstructionSelect code.
I think every target will want to remove these in the same way. Rather than
making them all implement the same code, let's just put this in
InstructionSelect.
Differential Revision: https://reviews.llvm.org/D95652
|
| llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp |
| llvm/test/CodeGen/AArch64/GlobalISel/select-hint.mir |
Commit
0703b0753c40dad30f1683403f6600bd2cb42055
by ctetreau[CMake] Actually require python 3.6 or greater
Previously, CMake would find any version of Python3. However, the project
claims to require 3.6 or greater, and 3.6 features are being used.
Reviewed By: yln
Differential Revision: https://reviews.llvm.org/D95635
|
| llvm/CMakeLists.txt |
| mlir/CMakeLists.txt |
| clang/CMakeLists.txt |
| lld/CMakeLists.txt |
Commit
d3e8b9fdc0de18ff92764f1be0a9b5a13fbbe9de
by ctetreauRevert "[CMake] Actually require python 3.6 or greater"
There are builders that do not have python 3.6. Revert until this situation can be rectified
This reverts commit 0703b0753c40dad30f1683403f6600bd2cb42055.
|
| llvm/CMakeLists.txt |
| lld/CMakeLists.txt |
| clang/CMakeLists.txt |
| mlir/CMakeLists.txt |
Commit
8d7cbcf582c5c7bc08a9de7f31fed63bf2687127
by pifon[mlir] Preserve lexicographic order after loop collapsing.
Currently, for a scf.parallel (i,j,k) after the loop collapsing to 1D is done, the
IVs would be traversed as for an scf.parallel(k,j,i).
Differential Revision: https://reviews.llvm.org/D95693
|
| mlir/test/Transforms/single-parallel-loop-collapsing.mlir |
| mlir/lib/Transforms/Utils/LoopUtils.cpp |
| mlir/test/Transforms/parallel-loop-collapsing.mlir |
Commit
632545e8ce846ccaeca8df15a3dc5e36d01a1275
by mgorny[clang-tidy] Fix linking tests to LLVMTestingSupport
LLVMTestingSupport is not part of libLLVM, and therefore can not
be linked to via LLVM_LINK_COMPONENTS. Instead, it needs to be
specified explicitly to ensure that it is linked explicitly
even if LLVM_LINK_LLVM_DYLIB is used. This is consistent with handling
in clangd.
Fixes PR#48931
Differential Revision: https://reviews.llvm.org/D95653
|
| clang-tools-extra/unittests/clang-tidy/CMakeLists.txt |
Commit
9a81a4ef79cf283fcf55a25a0bea67ba34dc0d53
by tmsriramEmit metadata when instr. profiles hash mismatch occurs.
This patch emits "instr_prof_hash_mismatch" function annotation metadata if
there is a hash mismatch while applying instrumented profiles.
During the PGO optimized build using instrumented profiles, if the CFG of
the function has changed since generating the profile, a hash mismatch is
encountered. This patch emits this information as annotation metadata. We
plan to use this with Propeller which is done at the machine IR level.
Propeller is usually applied on top of PGO and a hash mismatch during
PGO could be used to detect source drift.
Differential Revision: https://reviews.llvm.org/D95495
|
| llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp |
| llvm/test/Transforms/PGOProfile/Inputs/hash_mismatch_metadata.proftext |
| llvm/test/Transforms/PGOProfile/hash_mismatch_metadata.ll |
Commit
49a6502cd5c2361d9c6f49ae1ee36940afbdeb0a
by ctetreau[SVE] delete VectorType::getNumElements()
The previously agreed-upon deprecation period for
VectorType::getNumElements() has passed. This patch removes this method
and completes the refactor proposed in the RFC:
https://lists.llvm.org/pipermail/llvm-dev/2020-March/139811.html
Reviewed By: david-arm, rjmccall
Differential Revision: https://reviews.llvm.org/D95570
|
| llvm/include/llvm/IR/DerivedTypes.h |
Commit
a78d8feb48a536f50736f97a9ae28d5bae94e8ed
by lebedev.ri[LowerConstantIntrinsics] Preserve Dominator Tree, if avaliable
|
| llvm/test/Other/opt-O3-pipeline-enable-matrix.ll |
| llvm/test/Other/opt-Os-pipeline.ll |
| llvm/lib/Transforms/Scalar/LowerConstantIntrinsics.cpp |
| llvm/test/CodeGen/AMDGPU/opt-pipeline.ll |
| llvm/test/Other/opt-O3-pipeline.ll |
| llvm/test/Other/opt-O2-pipeline.ll |
Commit
c2534a7097c054547b2c30ef0d337088dd5da3d1
by lebedev.ri[ShadowStackGCLowering] Preserve Dominator Tree, if avaliable
This doesn't help avoid any Dominator Tree recalculations just yet,
there's one more pass to go..
|
| llvm/include/llvm/Transforms/Utils/EscapeEnumerator.h |
| llvm/include/llvm/Transforms/Utils/Local.h |
| llvm/lib/CodeGen/ShadowStackGCLowering.cpp |
| llvm/lib/Transforms/Utils/Local.cpp |
| llvm/lib/Transforms/Utils/EscapeEnumerator.cpp |
Commit
ddc4b56eef9fec990915470069a29e70bbde3711
by lebedev.ri[ExpandMemCmpPass] Preserve Dominator Tree, if available
This finishes getting rid of all the avoidable Dominator Tree recalculations
in X86 optimized codegen pipeline.
|
| llvm/test/CodeGen/ARM/O3-pipeline.ll |
| llvm/test/CodeGen/X86/opt-pipeline.ll |
| llvm/lib/CodeGen/ExpandMemCmp.cpp |
| llvm/test/CodeGen/AArch64/O3-pipeline.ll |
Commit
9dbe736cbd2c6a0c3d62a6fd6a2cf31c9ffc9577
by Stanislav.Mekhanoshin[AMDGPU] Be more specific in needsFrameBaseReg
A condition "mayLoadOrStore" is too broad for that function.
Differential Revision: https://reviews.llvm.org/D95700
|
| llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp |
Commit
e08b67f3a8ada62dcf84d41929c208adc656ba92
by kai.wang[NFC][RISCV] Remove redundant pseudo instructions for vector load/store.
Not all combinations of SEW and LMUL we need to support. For example, we
only need to support [M1, M2, M4, M8] for SEW = 64. There is no need to
define pseudos for PseudoVLSE64MF8, PseudoVLSE64MF4, and PseudoVLSE64MF2.
Differential Revision: https://reviews.llvm.org/D95667
|
| llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
Commit
282aca10aeb03bdaef0a8d4f3faa4c2ff236e527
by kai.wang[RISCV] Update the version number to v0.10 for vector.
v0.10 is tagged in V specification. Update the version to v0.10.
Differential Revision: https://reviews.llvm.org/D95680
|
| llvm/test/MC/RISCV/attribute-arch.s |
| clang/lib/Basic/Targets/RISCV.cpp |
| llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp |
| clang/lib/Driver/ToolChains/Arch/RISCV.cpp |
| llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp |
| clang/test/Driver/riscv-arch.c |
| llvm/test/CodeGen/RISCV/attributes.ll |
| llvm/lib/Target/RISCV/RISCVInstrInfoV.td |
| clang/test/Preprocessor/riscv-target-features.c |
Commit
ebe74d9592d097501f376c2086e58d35aa318896
by pklausler[flang] Support disabled alternative PARAMETER statement
Legacy Fortran implementations support an alternative form of the
PARAMETER statement; it differs syntactically from the standard's
PARAMETER statement by lacking parentheses, and semantically by
using the type and shape of the initialization expression to define
the attributes of the named constant. (GNU Fortran gets that part
wrong; Intel Fortran and nvfortran have full support.)
This patch disables the old style PARAMETER statement by default, as
it is syntactically ambiguous with conforming assignment statements;
adds a new "-falternative-parameter-statement" option to enable it;
and implements it correctly when enabled.
Fixes https://bugs.llvm.org/show_bug.cgi?id=48774, in which a user
tripped over the syntactic ambiguity.
Differential Revision: https://reviews.llvm.org/D95697
|
| flang/test/Semantics/oldparam01.f90 |
| flang/tools/f18/f18.cpp |
| flang/lib/Semantics/tools.cpp |
| flang/lib/Evaluate/shape.cpp |
| flang/include/flang/Common/Fortran-features.h |
| flang/lib/Semantics/resolve-names.cpp |
| flang/docs/Extensions.md |
| flang/lib/Semantics/type.cpp |
| flang/include/flang/Semantics/tools.h |
| flang/lib/Semantics/scope.cpp |
| flang/include/flang/Semantics/scope.h |
| flang/test/Semantics/oldparam03.f90 |
| flang/test/Semantics/oldparam02.f90 |
Commit
9847023660467a4469b5667bcf7a4c73a4780037
by kai.wang[RISCV] Update the version number to v0.10 for vector.
|
| llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
| llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
Commit
0af25275364e27d9766eb0912a5dd9731d62936b
by jpienaarUpdate ElementsAttr::isValidIndex to handle ElementsAttr with a scalar. Scalar will have rank 0.
Update ElementsAttr::isValidIndex to handle ElementsAttr with a scalar. Scalar will have rank 0.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D95663
|
| mlir/unittests/IR/AttributeTest.cpp |
| mlir/lib/IR/BuiltinAttributes.cpp |
Commit
719f778441750dcadcf7c7c411d1cfb39029d59a
by nhawes[VFS] Combine VFSFromYamlDirIterImpl and OverlayFSDirIterImpl into a single implementation (NFC)
As a fixme notes, both of these directory iterator implementations are
conceptually similar and duplicate the functionality of returning and uniquing
entries across two or more directories. This patch combines them into a single
class 'CombiningDirIterImpl'.
This also drops the 'Redirecting' prefix from RedirectingDirEntry and
RedirectingFileEntry to save horizontal space. There's no loss of clarity as
they already have to be prefixed with 'RedirectingFileSystem::' whenever
they're referenced anyway.
rdar://problem/72485443
Differential Revision: https://reviews.llvm.org/D94857
|
| lldb/source/Host/common/FileSystem.cpp |
| llvm/include/llvm/Support/VirtualFileSystem.h |
| llvm/lib/Support/VirtualFileSystem.cpp |
Commit
ad5307aaca7e3ce43918ef464ea271cfe53deccb
by craig.topper[RISCV] Merge rv32 and rv64 vector fadd/fsub/fmul/fdiv sdnode tests into single tests files with 2 run lines.
The IR and CHECK lines are identical so just keep one copy.
|
| llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv32.ll |
| llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv64.ll |
| llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv64.ll |
| llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv32.ll |
| llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv64.ll |
| llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv32.ll |
| llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv64.ll |
| llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv32.ll |
Commit
4d9336923ec33ff789ed0f32dd0d13a4f902b3aa
by jpienaarUse type alias for large tuples
Tuples can occupy quite a lot of space, instead of printing out tuple type
everywhere, just use the type alias if larger (arbitrarily chose a bound for
now).
Differential Revision: https://reviews.llvm.org/D95707
|
| mlir/lib/IR/BuiltinDialect.cpp |
Commit
c32f3998029d52df33d060e759563e3d314ce29f
by tmsriramDetect Source Drift with Propeller.
Source Drift happens when the sources are updated after profiling the binary
but before building the final optimized binary. If the source has changed since
the profiles were obtained, optimizing basic blocks might be sub-optimal. This
only applies to BasicBlockSection::List as it creates clusters of basic blocks
using basic block ids. Source drift can invalidate these groupings leading to
sub-optimal code generation with regards to performance.
PGO source drift for a particular function can be detected using function
metadata added in D95495.
When source drift is deected, disable basic block clusters by default
which can be re-enabled with -mllvm option
bbsections-detect-source-drift=false.
Differential Revision: https://reviews.llvm.org/D95593
|
| llvm/lib/CodeGen/BasicBlockSections.cpp |
| llvm/test/CodeGen/X86/basic-block-sections-source-drift.ll |
Commit
a5d9e0c79befb6856ae78a3c5f515287ad89a40f
by pengfei.wang[X86] Fix tile config register spill issue.
This is an optimized approach for D94155.
Previous code build the model that tile config register is the user of
each AMX instruction. There is a problem for the tile config register
spill. When across function, the ldtilecfg instruction may be inserted
on each AMX instruction which use tile config register. This cause all
tile data register clobber.
To fix this issue, we remove the model of tile config register. Instead,
we analyze the AMX instructions between one call to another. We will
insert ldtilecfg after the first call if we find any AMX instructions.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D95136
|
| llvm/lib/Target/X86/X86FrameLowering.cpp |
| llvm/lib/Target/X86/X86TileConfig.cpp |
| llvm/lib/Target/X86/X86RegisterInfo.td |
| llvm/lib/Target/X86/X86ISelDAGToDAG.cpp |
| llvm/lib/Target/X86/X86ExpandPseudo.cpp |
| llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll |
| llvm/lib/Target/X86/X86InstrInfo.cpp |
| llvm/lib/Target/X86/X86PreTileConfig.cpp |
| llvm/test/CodeGen/X86/AMX/amx-across-func.ll |
| llvm/lib/Target/X86/X86InstrAMX.td |
| llvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll |
| llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll |
Commit
61a5502a93ab938edc66422e41ad98757a6f920b
by gkm[llvm-objdump-macho] print per-second-level-page encodings for option --unwind-info
Compact unwind entries have 8 bits for the encoding-table offset:
* offsets 0..126 reference the global commmon-encodings table, while
* offsets 127..255 reference a per-second-level-page table.
This diff teaches `llvm-objdump` to print this per-page encodings table.
Differential Revision: https://reviews.llvm.org/D93265
|
| llvm/tools/llvm-objdump/MachODump.cpp |
| llvm/test/tools/llvm-objdump/MachO/Inputs/unwind-info-excess.macho-x86_64 |
| llvm/test/tools/llvm-objdump/MachO/unwind-info-excess-x86_64.test |
Commit
0ef25cf558bfaffda4820c8b4e4f2a02d52b0334
by gkm[lld-macho][NFC] Add new option group for versions
Coalesce all version control options into a group
Differential Revision: https://reviews.llvm.org/D94938
|
| lld/MachO/Options.td |
Commit
49556b87ae9b85b883b9b8be432a6f6a769d6021
by nullptr.cpp[NFC][VFS] Fix a build warning due to an extra semicolon
|
| llvm/lib/Support/VirtualFileSystem.cpp |
Commit
7728cc003a87b274ebd611070fe38f0e41fef2aa
by kazu[llvm] Use append_range (NFC)
|
| llvm/tools/llvm-cov/CoverageExporterLcov.cpp |
| llvm/include/llvm/Bitstream/BitstreamWriter.h |
| llvm/tools/obj2yaml/wasm2yaml.cpp |
| llvm/utils/FileCheck/FileCheck.cpp |
| llvm/tools/llvm-cov/CoverageExporterJson.cpp |
| llvm/tools/llvm-readobj/COFFDumper.cpp |
| llvm/include/llvm/Support/GenericDomTree.h |
| llvm/tools/lto/lto.cpp |
Commit
1a2d67fa23b2b65c7f07481dd0184957f8d058d9
by kazu[llvm] Use llvm::lower_bound and llvm::upper_bound (NFC)
|
| llvm/lib/Target/X86/X86IntrinsicsInfo.h |
| llvm/lib/CodeGen/LiveInterval.cpp |
| llvm/lib/CodeGen/LiveRangeCalc.cpp |
| llvm/tools/dsymutil/DwarfLinkerForBinary.cpp |
| llvm/lib/MC/MCSection.cpp |
Commit
8ed163618478dd4e7e03e34a029256b47a95d85c
by kazu[llvm] Use isa instead of dyn_cast (NFC)
|
| llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp |
| llvm/lib/Transforms/Utils/CodeExtractor.cpp |
| llvm/lib/Target/AVR/AVRISelLowering.cpp |
| llvm/lib/Target/VE/VEISelDAGToDAG.cpp |
| llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
| llvm/utils/TableGen/FixedLenDecoderEmitter.cpp |
| llvm/lib/Transforms/IPO/MergeFunctions.cpp |
| llvm/lib/Transforms/Scalar/LoopSink.cpp |
| llvm/lib/Target/BPF/BPFAdjustOpt.cpp |
| llvm/lib/Transforms/Instrumentation/ValueProfilePlugins.inc |
Commit
3949a3ed49bbd95235c3c616bf4dbae4ecac48bc
by i[ELF][test] Add --emit-relocs --gc-sections test for relocation section for a non-SHF_ALLOC section
This has been fixed by D89841.
|
| lld/test/ELF/emit-relocs-gc.s |
Commit
6a59f0560648b43324b5aed51b9ef996404a25e0
by flo[LTO] Use lto::backend for code generation.
This patch updates LTOCodeGenerator to use the utilities provided by
LTOBackend to run middle-end optimizations and backend code generation.
This is a first step towards unifying the code used by libLTO's C API
and the newer, C++ interface (see PR41541).
The immediate motivation is to allow using the new pass manager when
doing LTO using libLTO's C API, which is used on Darwin, among others.
With the changes, there are no codegen/stats differences when building
MultiSource/SPEC2000/SPEC2006 on Darwin X86 with LTO, compared
to without the patch.
Reviewed By: steven_wu
Differential Revision: https://reviews.llvm.org/D94487
|
| llvm/test/tools/lto/print-stats.ll |
| llvm/include/llvm/LTO/legacy/LTOCodeGenerator.h |
| llvm/tools/llvm-lto/llvm-lto.cpp |
| llvm/test/LTO/X86/disable-verify.ll |
| llvm/lib/LTO/LTOCodeGenerator.cpp |
Commit
7a6a2cc81aaf064e6f5bc9a9a16973f552d2bdc2
by flo[LTO] Add option enable NewPM with LTOCodeGenerator.
This patch adds an option to enable the new pass manager in
LTOCodeGenerator. It also updates a few tests with legacy PM specific
tests, which started failing after 6a59f0560648 when
LLVM_ENABLE_NEW_PASS_MANAGER=true.
|
| llvm/test/LTO/X86/disable-verify.ll |
| llvm/test/Other/X86/lto-hot-cold-split.ll |
| llvm/lib/LTO/LTOCodeGenerator.cpp |
| llvm/test/LTO/X86/diagnostic-handler-remarks.ll |
| llvm/tools/llvm-lto/llvm-lto.cpp |
| llvm/include/llvm/LTO/legacy/LTOCodeGenerator.h |
Commit
b01b964d3776956ef415a10c57cf612add55bba9
by harald[compiler-rt][tests] Define TARGET_FLAGS
D36116 refactored the logic of tests and removed the definition of TARGET_FLAGS, but left one use of it. Restore its definition for that one use, so that an x86_64 test is compiled with -m64.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D93634
|
| compiler-rt/lib/sanitizer_common/tests/CMakeLists.txt |
Commit
79125085f16540579d27c7e4987f63eef9c4aa23
by steveire[ASTMatchers] Fix traversal below range-for elements
Differential Revision: https://reviews.llvm.org/D95562
|
| clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
| clang/lib/ASTMatchers/ASTMatchFinder.cpp |
Commit
10c57268c074c3ad48f76da38fa2ba575ee3d1f9
by flo[LoopUnswitch] Properly update MSSA if header has non-clobbering stores.
This patch fixes updating MemorySSA if the header contains memory
defs that do not clobber a duplicated instruction. We need to find the
first defining access outside the loop body and use that as defining
access of the duplicated instruction.
This fixes a crash caused by bee486851c1a.
|
| llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll |
| llvm/lib/Transforms/Scalar/LoopUnswitch.cpp |
| llvm/test/Transforms/LoopUnswitch/partial-unswitch-update-memoryssa.ll |
Commit
bb57a3422a09dcdd572ccb42767a0dabb5f966dd
by steveireFix traversal with hasDescendant into lambdas
Differential Revision: https://reviews.llvm.org/D95607
|
| clang/lib/ASTMatchers/ASTMatchFinder.cpp |
| clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
Commit
d22140687500f90830fe416d9c1e317f7c4535d5
by grimar[llvm-symbolizer] - Fix the crash in GNU output style with --no-inlines and missing input file.
Fixes https://bugs.llvm.org/show_bug.cgi?id=48882.
If the input file does not exist (or has a reading error), the
following code will crash if there are two or more input addresses.
```
auto ResOrErr = Symbolizer.symbolizeInlinedCode(
ModuleName, {Offset, object::SectionedAddress::UndefSection});
Printer << (error(ResOrErr) ? DILineInfo() : ResOrErr.get().getFrame(0));
```
For the first address, `symbolizeInlinedCode` returns an error.
For the second address, `symbolizeInlinedCode` returns an empty result
(not an error) and `.getFrame(0)` will crash.
Differential revision: https://reviews.llvm.org/D95609
|
| llvm/test/tools/llvm-symbolizer/output-style-inlined.test |
| llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp |
Commit
c87dd614fd4b0b0d6290b5b90897caa09e053ef0
by fraser[RISCV] Update extractelt tests to sign-extend results (NFC)
This demonstrates a missed optimization: the `vmv.x.s` instruction is
used to extract the element from the vector, and this instruction
already sign-extends the value to XLEN.
|
| llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll |
| llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll |
Commit
b10d445307a0f3c7e5522836b4331090aacaf349
by steveire[ASTMatchers] Fix definition of decompositionDecl
|
| clang/include/clang/ASTMatchers/ASTMatchers.h |
| clang/lib/ASTMatchers/ASTMatchersInternal.cpp |
Commit
e718869bf47af20be0ec7301846f78c82d0f1140
by kazu[TableGen] Use ListSeparator (NFC)
|
| llvm/utils/TableGen/AsmMatcherEmitter.cpp |
Commit
b4e780697d1cf0c06e7ca3a908ece0ab65a470ff
by kazu[AMDGPU] Forward-declare AMDGPUTargetMachine (NFC)
AMDGPUTargetTransformInfo.h needs AMDGPUTargetMachine but relies on a
forward declaration of AMDGPUTargetMachine in AMDGPU.h. This patch
adds a forward declaration right in AMDGPUTargetTransformInfo.h.
While we are at it, this patch removes the one in
AMDGPU.h, where it is unnecessary.
|
| llvm/lib/Target/AMDGPU/AMDGPU.h |
| llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h |
Commit
627b5bda11a79785a21b1a50070415d4188aba6a
by kazu[llvm] Add missing header guards (NFC)
Identified with llvm-header-guard.
|
| llvm/lib/Target/AMDGPU/AMDGPUExportClustering.h |
| llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h |
| llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.h |
| llvm/include/llvm/Support/DataTypes.h |
| llvm/include/llvm/CodeGen/CommandFlags.h |
| llvm/include/llvm/CodeGen/GlobalISel/ConstantFoldingMIRBuilder.h |
| llvm/lib/Target/PowerPC/PPCMacroFusion.h |
| llvm/lib/Target/AArch64/AArch64MacroFusion.h |
| llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.h |
Commit
39486753d5c69d98d510c9ed43c92f076ec4c602
by flo[ConstraintElimination] Verify CS and DFSInStack are in sync.(NFC)
After the main loop is done, we should have one constraint per item in
DFSInStack. Otherwise we added a constraint without a proper DFSInStack
item.
|
| llvm/lib/Transforms/Scalar/ConstraintElimination.cpp |
Commit
26d38f6d20ff137d89cb7c891b739662de1ca508
by tianshilei1992[OpenMP][NVPTX] Refined CMake logic to choose compute capabilites
This patch refines the logic to choose compute capabilites via the
environment variable `LIBOMPTARGET_NVPTX_COMPUTE_CAPABILITIES`. It supports the
following values (all case insensitive):
- "all": Build `deviceRTLs` for all supported compute capabilites;
- "auto": Only build for the compute capability auto detected. Note that this
requires CUDA. If CUDA is not found, a CMake fatal error will be raised.
- "xx,yy" or "xx;yy": Build for compute capabilities `xx` and `yy`.
If `LIBOMPTARGET_NVPTX_COMPUTE_CAPABILITIES` is not set, it is equivalent to set
it to `all`.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95687
|
| openmp/libomptarget/cmake/Modules/LibomptargetGetDependencies.cmake |
| openmp/libomptarget/deviceRTLs/nvptx/CMakeLists.txt |
Commit
4e04a535d8f836804d39e8861ae17d7817293c5a
by craig.topper[TableGen] Avoid a couple vector copies in ExpandHwModeBasedTypes.
Use vector::swap instead of copying to a local vector and clearing
the original. We can just swap into the just created local vector
instead which will move the pointers and not the data.
Use std::move in another place to avoid a copy.
|
| llvm/utils/TableGen/CodeGenDAGPatterns.cpp |
Commit
b5e3a5785dab0d0c7aa68cc65c2dd348488e72d1
by craig.topper[TableGen] Use emplace_back to add to PatternsToMatch in GenerateVariants. Use std::move when adding to PatternsToMatch in AddPatternToMatch.
We already used emplace_back in at least one other place so be
consistent.
AddPatternToMatch already took PTM as an rvalue reference, but
we need to use std::move again to move it into the PatternToMatch
vector.
|
| llvm/utils/TableGen/CodeGenDAGPatterns.cpp |
Commit
3fdf2a56dd00ece7b6572e592f40b207ef85f96f
by craig.topper[RISCV] Use MVT instead of EVT in RISCVISelDAGToDAG.cpp
All this code runs post type legalization so we should have
exclusively legal types. The methods on MVT should be more
efficient than EVT.
|
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
Commit
6f3d322f250d2381370b256e648cbb76c6de0135
by pklausler[flang] Improve shape & length characterization
Analyze the shape of the result of TRANSFER(ptr,array) correctly
when "ptr" is an array of deferred shape. Fixing this bug led to
some refactoring and concentration of common code in TypeAndShape
member functions with code in general shape and character length
analysis, and this led to some regression test failures that have
all been cleaned up.
Differential Revision: https://reviews.llvm.org/D95744
|
| flang/lib/Semantics/expression.cpp |
| flang/include/flang/Evaluate/tools.h |
| flang/lib/Evaluate/characteristics.cpp |
| flang/lib/Evaluate/variable.cpp |
| flang/lib/Semantics/runtime-type-info.cpp |
| flang/lib/Evaluate/shape.cpp |
| flang/lib/Semantics/check-call.cpp |
| flang/include/flang/Evaluate/characteristics.h |
Commit
5ec59f021ceb09cff32c0fb4c24310362d08ea63
by springerm[mlir][AVX512] Fix result type of vp2intersect
The result values of vp2intersect are vectors of bits, i.e.,
vector<8xi1> or vector<16xi8> (instead of i8 or i16).
Differential Revision: https://reviews.llvm.org/D95678
|
| mlir/test/Dialect/AVX512/roundtrip.mlir |
| mlir/include/mlir/Dialect/AVX512/AVX512.td |
| mlir/test/Conversion/AVX512ToLLVM/convert-to-llvm.mlir |
Commit
be997cead7fa0e4a1001129cd0d80944e6cc126d
by craig.topper[RISCV] Add rv64 command line to bswap-ctlz-cttz-ctpop.ll.
|
| llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll |
Commit
095f08653f3ab0917a474888abac95c4fa99697d
by sam.mccall[docs] Clarify compile_flags.txt subtleties
See confusion e.g. in https://github.com/clangd/clangd/issues/637
|
| clang/docs/JSONCompilationDatabase.rst |
Commit
0962f1d72b1606f3224a14434c7b4500a23f8728
by sam.mccall[clangd] Quote/escape argv included in log messages.
https://github.com/clangd/clangd/issues/637
|
| clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp |
| clang-tools-extra/clangd/TUScheduler.cpp |
| clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp |
| clang-tools-extra/clangd/CompileCommands.h |
| clang-tools-extra/clangd/tool/Check.cpp |
| clang-tools-extra/clangd/QueryDriverDatabase.cpp |
| clang-tools-extra/clangd/CompileCommands.cpp |
Commit
60053a9ce28655fc6f635567c62599fa3aad57d2
by sam.mccall[clangd] Remove references to old future-based API. NFC
|
| clang-tools-extra/clangd/support/Context.h |
| clang-tools-extra/clangd/ClangdServer.h |
Commit
8869e2f969101426e8615bb3cb0e7186938c23c7
by koraq[libc++] Allow building with C++17.
After committing D92214 it was noticed libc++ no longer builds with
C++17. For now reenable building with C++17. This is intended to be a
temporary measure in the future a C++20 capable compiler will be
required.
|
| libcxx/src/format.cpp |
Commit
fb244ffb9f2d7718b0edb1566138ba454b5709bc
by a.v.lapshin[dsymutil][DWARFLinker][NFC] make AddressManager not depending on the order of checks for relocations.
Current dsymutil implementation of hasLiveMemoryLocation()/hasLiveAddressRange()
and applyValidRelocs() assume that calls should be done in certain order
(from first Dies to last). Multi-thread implementation might call these methods
in other order(it might process compilation units in order other than they are physically
located), so we remove restriction that searching for relocations should be done
in ascending order. This change does not introduce noticable performance degradation.
The testing results for clang binary:
golden-dsymutil/dsymutil 23787992
clang MD5: 5efa8fd9355ebf81b65f24db5375caa2
elapsed time=91sec
build-Release/bin/dsymutil 23855616
clang MD5: 5efa8fd9355ebf81b65f24db5375caa2
elapsed time=91sec
Differential Revision: https://reviews.llvm.org/D93106
|
| llvm/include/llvm/DebugInfo/DWARF/DWARFUnit.h |
| llvm/include/llvm/DWARFLinker/DWARFLinker.h |
| llvm/tools/dsymutil/DwarfLinkerForBinary.h |
| llvm/test/tools/dsymutil/X86/dwarf5.test |
| llvm/tools/dsymutil/DwarfLinkerForBinary.cpp |
| llvm/lib/DWARFLinker/DWARFLinker.cpp |
Commit
7a8008d0e8885d22ff9a1fa7f9965c7b2ad2569a
by sam.mccallRevert "[clangd] Quote/escape argv included in log messages."
This reverts commit 0962f1d72b1606f3224a14434c7b4500a23f8728.
http://45.33.8.238/win/32346/step_9.txt
|
| clang-tools-extra/clangd/TUScheduler.cpp |
| clang-tools-extra/clangd/tool/Check.cpp |
| clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp |
| clang-tools-extra/clangd/CompileCommands.h |
| clang-tools-extra/clangd/QueryDriverDatabase.cpp |
| clang-tools-extra/clangd/CompileCommands.cpp |
| clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp |
Commit
7de711ecca99f81da3c2ae1705cefe0b4bda70b3
by sam.mccallReland [clangd] Quote/escape argv included in log messages.
... but don't apply it where we're using hasSubstr
This reverts commit 7a8008d0e8885d22ff9a1fa7f9965c7b2ad2569a.
|
| clang-tools-extra/clangd/CompileCommands.h |
| clang-tools-extra/clangd/TUScheduler.cpp |
| clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp |
| clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp |
| clang-tools-extra/clangd/CompileCommands.cpp |
| clang-tools-extra/clangd/QueryDriverDatabase.cpp |
| clang-tools-extra/clangd/tool/Check.cpp |
Commit
8f14a08863bf295cdc660f24948ef810731b812d
by Matthew.ArsenaultAMDGPU: Add missing consts
|
| llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp |
Commit
1801e2aa249497adb5b0ab33e7fc5dd0ad4a4ab3
by Matthew.ArsenaultRegAlloc: Fix assert if all registers in class reserved
With a context instruction, this would produce a context
error. However, it would continue on and do an out of bounds access of
the empty allocation order array.
|
| llvm/lib/CodeGen/RegAllocBase.cpp |
| llvm/test/CodeGen/AMDGPU/alloc-all-regs-reserved-in-class.mir |
Commit
177b8d1ad3cd78aa789bb246c42cbf10dda8a901
by kazu[VE] Fix compiler warnings (NFC)
|
| llvm/lib/Target/VE/VEISelLowering.cpp |
Commit
6bfb02cafe4fb31fd0a4f8a9871180df3333bd49
by kazu[TableGen] Use ListSeparator (NFC)
|
| llvm/utils/TableGen/SearchableTableEmitter.cpp |
Commit
3d1200b9f6e305ea66080bb93fd34753c46066a1
by kazu[llvm] Drop unnecessary const from return types (NFC)
Identified with const-return-type.
|
| llvm/include/llvm/Analysis/LoopCacheAnalysis.h |
| llvm/include/llvm/Transforms/IPO/SampleContextTracker.h |
| llvm/tools/llvm-readobj/ELFDumper.cpp |
| llvm/include/llvm/TableGen/DirectiveEmitter.h |
| llvm/lib/Target/X86/X86MachineFunctionInfo.h |
| llvm/include/llvm/Object/WindowsResource.h |
| llvm/include/llvm/MCA/Instruction.h |
| llvm/lib/Transforms/IPO/SampleContextTracker.cpp |
| llvm/include/llvm/IR/DerivedTypes.h |
| llvm/include/llvm/Analysis/DDG.h |
| llvm/tools/dsymutil/DebugMap.h |
| llvm/tools/llvm-profgen/ProfiledBinary.h |
Commit
f43c0707f66a19236f58f5bd8be470e5fc625603
by mgorny[lldb] [Process/FreeBSDRemote] Introduce arm64 support
Introduce arm64 support in the FreeBSDRemote plugin. The code
is roughly based on Linux and reuses the same POSIX RegisterInfos
(but the buffers need to be a few bytes larger due to stricter struct
member alignment in FreeBSD structures -- luckily, they do not affect
the actual member offsets). It supports reading and writing
general-purpose and FPU registers. SVE and hardware watchpoint support
is missing due to the limitations of FreeBSD ptrace(2) API.
Differential Revision: https://reviews.llvm.org/D95297
|
| lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp |
| lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp |
| lldb/source/Plugins/Process/FreeBSDRemote/CMakeLists.txt |
| lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_arm64.h |
| lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_arm64.cpp |
Commit
9d029362d1ed48c38565aeab0ca04bf4143d3e5b
by mgorny[lldb] [Process/FreeBSDRemote] Introduce arm (32-bit) support
Introduce a NativeRegisterContextFreeBSD for 32-bit ARM platform.
This includes support for GPR + VFP registers as exposed by FreeBSD's
ptrace(2) API. Hardware breakpoints or watchpoints are not supported
due to missing kernel support. The code is roughly based on the arm64
context.
It also includes an override for GetSoftwareBreakpointTrapOpcode() based
on the matching code in the PlatformFreeBSD plugin.
Differential Revision: https://reviews.llvm.org/D95696
|
| lldb/source/Plugins/Process/FreeBSDRemote/CMakeLists.txt |
| lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp |
| lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.h |
| lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_arm.cpp |
| lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_arm.h |
| lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp |
| lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp |
Commit
2ae0f8d60083d39b6df6a1b4d073970fba3e4a0a
by flo[ConstraintElimination] Add tests for ICMP_EQ predicates.
Pre-commit test coverage for conditions with EQ predicates.
|
| llvm/test/Transforms/ConstraintElimination/eq.ll |
Commit
0d487cf87aa1b609b7db061def3e5ad068576ecf
by flo[LTOCodeGenerator] Use lto::Config for options (NFC).
This patch removes some options that have been duplicated in
LTOCodeGenerator and instead use lto::Config directly to manage the
options.
This is a cleanup after 6a59f0560648.
Reviewed By: tejohnson
Differential Revision: https://reviews.llvm.org/D95738
|
| llvm/include/llvm/LTO/legacy/LTOCodeGenerator.h |
| llvm/lib/LTO/LTOCodeGenerator.cpp |
Commit
2de4f19ecdb275bcbc6e7ee8368c19a63f99db88
by luismarques[LSan][RISCV] Enable LSan for RISCV64
Fixes the broken RISCV64 implementation of `internal_clone` and
adds RISCV64 support for LSan.
Differential Revision: https://reviews.llvm.org/D92403
|
| compiler-rt/test/lsan/TestCases/use_registers.cpp |
| compiler-rt/test/lsan/lit.common.cfg.py |
| clang/test/Driver/fsanitize.c |
| compiler-rt/test/asan/lit.cfg.py |
| compiler-rt/lib/lsan/lsan_common.h |
| clang/lib/Driver/ToolChains/Linux.cpp |
| compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp |
| compiler-rt/cmake/config-ix.cmake |
| compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h |
| compiler-rt/test/sanitizer_common/print_address.h |
| compiler-rt/lib/lsan/lsan_allocator.h |
Commit
2eb5f3454212aa906388013e6807a7a906233f18
by jpienaarFix omitted kw in type alias printer
* Fixing missing `type` keyword in alias print
* Add test for large tuple type alias & rerun output to verify printed
form can be parsed (which caught the above).
|
| mlir/lib/IR/AsmPrinter.cpp |
| mlir/test/IR/print-attr-type-aliases.mlir |
Commit
70289ea6f591bd39c631f1eee3e6f2622fbc1d46
by craig.topper[RISCV][LegalizeTypes] Try to expand BSWAP before promoting if the promoted BSWAP would expand anyway.
If we're going to end up expanding anyway, we should do it early
so we don't create extra operations to handle the bytes added by
promotion.
This is helfpul on RISCV where we might have to promote i16 all
the way to i64.
Differential Revision: https://reviews.llvm.org/D95756
|
| llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp |
| llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
| llvm/include/llvm/CodeGen/TargetLowering.h |
| llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll |
| llvm/test/CodeGen/RISCV/rv64Zbb.ll |
| llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp |
| llvm/test/CodeGen/RISCV/rv64Zbp.ll |
Commit
8f670d5b6d8f39bf9bf1d142dacef3afaed6d70b
by jyknightCFG: Create scope for non-compound range-for body.
Previously, it was omitting the destructor call from the CFG, which
could result in incorrect diagnostics.
|
| clang/test/Analysis/auto-obj-dtors-cfg-output.cpp |
| clang/lib/Analysis/CFG.cpp |
Commit
3203c968424193a519d1b52739047748038bb074
by luismarques[CMake][compiler-rt][RISCV] Support RISC-V cross-compilation
This seems to be a safe way to ensure that the Compiler-RT test compiler
flags are properly set in all cross-compilation scenarios. Without this
when `BUILTINS_TEST_TARGET_CFLAGS` is set in
`compiler-rt/test/builtins/CMakeLists.txt` the other flags are cleared.
Differential Revision: https://reviews.llvm.org/D92124
|
| compiler-rt/cmake/config-ix.cmake |
Commit
68e5614b42823cc1eef48916e1e6f551ad61a055
by luismarques[Sanitizer][RISCV] Fix FastUnwindTest
Fixes the `FastUnwindTest` unit test for RISC-V.
These changes reflect the different stack organization commonly used for
that architecture.
Differential Revision: https://reviews.llvm.org/D90574
|
| compiler-rt/lib/sanitizer_common/tests/sanitizer_stacktrace_test.cpp |
Commit
54842fa0bba0c6cf69b7eb94f4b10d8da8aa5170
by JunMa[CodeGenPrepare] Also skip lifetime.end intrinsic when check return block in dupRetToEnableTailCallOpts.
Differential Revision: https://reviews.llvm.org/D95424
|
| llvm/test/Transforms/CodeGenPrepare/X86/tailcall-assume-xbb.ll |
| llvm/lib/CodeGen/CodeGenPrepare.cpp |
| llvm/test/Transforms/CodeGenPrepare/ARM/tailcall-dup.ll |
Commit
20b1c1300c8f00d85e1292158f865c1bd0d1e12c
by jyknightFix test in "CFG: Create scope for non-compound range-for body."
The constant 4 is sometimes printed as "4L", or "4LL", in CFG dump
output, depending on platform; accept all variants.
Ammends commit 8f670d5b6d8f39bf9bf1d142dacef3afaed6d70b.
|
| clang/test/Analysis/auto-obj-dtors-cfg-output.cpp |
Commit
e94a35a744b780fcbe18e8bc6a4f774191588d45
by michael.p.rice[OpenMP] Fix comment and assertion strings (NFC).
|
| clang/lib/Sema/SemaOpenMP.cpp |
Commit
6e58539659aea0ee621c7e267d825aa82d4e7e96
by Lang Hames[JITLink] Add missing symbols for ELF ehframe testcase, re-enable on Windows.
This testcase was failing on windows due to missing definitions. This commit
adds definitions of the missing symbols (as absolute symbols) to eliminate the
errors.
|
| llvm/test/ExecutionEngine/JITLink/X86/ELF_ehframe_basic.s |
Commit
44cc5abbf9166c47a1da7027123b13d230442610
by craig.topper[RISCV] Custom lower fshl/fshr with Zbt extension.
We need to add a mask to the shift amount for these operations
to use the FSR/FSL instructions. We were previously doing this
in isel patterns, but custom lowering will make the mask
visible to optimizations earlier.
|
| llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
| llvm/lib/Target/RISCV/RISCVInstrInfoB.td |
| llvm/lib/Target/RISCV/RISCVISelLowering.h |
Commit
d2bb07949b0e66a60f26a0a1fb6bcec609da5e63
by Lang HamesRevert "[JITLink] Add missing symbols for ELF ehframe testcase, re-enable ...."
This reverts commit 6e58539659aea0ee621c7e267d825aa82d4e7e96.
This failed in http://lab.llvm.org:8011/#/builders/123/builds/2676. I guess
were're still missing some symbols, but unfortunately the specific error is
masked by a bug in python/lit that hides stderr. This test will have to remain
disabled on Windows until I can get help to debug it further.
|
| llvm/test/ExecutionEngine/JITLink/X86/ELF_ehframe_basic.s |
Commit
ff460268973533e8d39a7714223891d1b7c62d67
by craig.topper[X86] Cleanup isel patterns to use 'vnot' instead of (xor X, immAllOnesV) to improve readability. NFC
|
| llvm/lib/Target/X86/X86InstrAVX512.td |
Commit
94206f1f90fee1b92c49234a17cf8e1781179146
by craig.topper[PowerPC] Remove vnot_ppc and replace with the standard vnot.
immAllOnesV has special support for looking through bitcasts
automatically so isel patterns don't need to explicitly look
for the bitconvert.
|
| llvm/lib/Target/PowerPC/PPCInstrVSX.td |
| llvm/lib/Target/PowerPC/PPCInstrAltivec.td |
| llvm/lib/Target/PowerPC/PPCInstrPrefix.td |
Commit
ce27b327158e6ae7b726b6d867b7db5117a90b73
by craig.topper[Mips] Cleanup isel patterns to use 'vnot' instead of (xor X, immAllOnesV). NFCI
A couple patterns used bitconvert on the immAllOnesV, but
the isel matching uses ISD::isBuildVectorAllOnes which
is able to look through bitcasts. So isel patterns don't need
to do it explicitly.
|
| llvm/lib/Target/Mips/MipsMSAInstrInfo.td |
Commit
bf416d166bdde187cf3b7e99888bcb4b95a93142
by sepavloff[FPEnv] Intrinsic for setting rounding mode
To set non-default rounding mode user usually calls function 'fesetround'
from standard C library. This way has some disadvantages.
* It creates unnecessary dependency on libc. On the other hand, setting
rounding mode requires few instructions and could be made by compiler.
Sometimes standard C library even is not available, like in the case of
GPU or AI cores that execute small kernels.
* Compiler could generate more effective code if it knows that a particular
call just sets rounding mode.
This change introduces new IR intrinsic, namely 'llvm.set.rounding', which
sets current rounding mode, similar to 'fesetround'. It however differs
from the latter, because it is a lower level facility:
* 'llvm.set.rounding' does not return any value, whereas 'fesetround'
returns non-zero value in the case of failure. In glibc 'fesetround'
reports failure if its argument is invalid or unsupported or if floating
point operations are unavailable on the hardware. Compiler usually knows
what core it generates code for and it can validate arguments in many
cases.
* Rounding mode is specified in 'fesetround' using constants like
'FE_TONEAREST', which are target dependent. It is inconvenient to work
with such constants at IR level.
C standard provides a target-independent way to specify rounding mode, it
is used in FLT_ROUNDS, however it does not define standard way to set
rounding mode using this encoding.
This change implements only IR intrinsic. Lowering it to machine code is
target-specific and will be implemented latter. Mapping of 'fesetround'
to 'llvm.set.rounding' is also not implemented here.
Differential Revision: https://reviews.llvm.org/D74729
|
| llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h |
| llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
| llvm/include/llvm/IR/Intrinsics.td |
| llvm/unittests/IR/IRBuilderTest.cpp |
| llvm/docs/LangRef.rst |
| llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
| llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp |
| llvm/include/llvm/CodeGen/ISDOpcodes.h |
Commit
77f077b8c3b2e8bbf9b160d56194312e506dfe8f
by craig.topper[TableGen] Don't commute isel patterns if it would put an immAllOnesV or immAllZerosV on the left hand side.
This primarily occurs with isel patterns using vnot. This reduces
the number of variants in the isel tables.
We generally canonicalize build_vectors of constants to the RHS. I think
we might fail if there is a bitcast on the build_vector, but that
should be easy to fix if we can find a case. Usually the
bitcast is introduced by type legalization or lowering. It's
likely canonicalization would have already occured.
|
| llvm/utils/TableGen/CodeGenDAGPatterns.cpp |
Commit
c3c02d0d5a313272f6d35926bdf678fc6b884c02
by tobias[OpenMP] Fix python3 compatibility in openmp's lit.cfg
Differential Revision: https://reviews.llvm.org/D95669
|
| openmp/runtime/test/lit.cfg |
Commit
d9b953d84b332a8c4751fcbf8178e32818dc718b
by hanchung[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding
This is the last revision to migrate using SimplePadOp to PadTensorOp, and the
SimplePadOp is removed in the patch. Update a bit in SliceAnalysis because the
PadTensorOp takes a region different from SimplePadOp. This is not covered by
LinalgOp because it is not a structured op.
Also, remove a duplicated comment from cpp file, which is already described in a
header file. And update the pseudo-mlir in the comment.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D95671
|
| mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
| mlir/lib/Analysis/SliceAnalysis.cpp |
| mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp |
| mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h |
| mlir/test/Dialect/Linalg/hoist-padding.mlir |
| mlir/test/Dialect/Linalg/roundtrip.mlir |
| mlir/test/lib/Transforms/TestLinalgTransforms.cpp |
| mlir/lib/Analysis/CMakeLists.txt |
Commit
a4b7d52f3a219e7726edc8c3805c1d6dc7bd97a5
by csigg[mlir] Fix missing null termination in cuLinkAddData argument.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D95679
|
| mlir/tools/mlir-cuda-runner/mlir-cuda-runner.cpp |
Commit
2790cbedd0a886fa70c35efda40924679d1cbcd0
by tpoppRevert "[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding"
This reverts commit d9b953d84b332a8c4751fcbf8178e32818dc718b.
This commit resulted in build bot failures and the author is away from a
computer, so I am reverting on their behalf until they have a chance to
look into this.
|
| mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
| mlir/test/Dialect/Linalg/hoist-padding.mlir |
| mlir/test/Dialect/Linalg/roundtrip.mlir |
| mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp |
| mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h |
| mlir/lib/Analysis/CMakeLists.txt |
| mlir/lib/Analysis/SliceAnalysis.cpp |
| mlir/test/lib/Transforms/TestLinalgTransforms.cpp |
Commit
2939d2e1b46c05432864db333ca3d5cb7ab83533
by Raphael Isemann[lldb][docs] Attempt to disable the generated GitHub button on the LLDB website
For unknown reasons the alabaster theme on the docs server is always generating
a GitHub link in the side bar. Beside the privacy problems of having an iframe
to some third-party service, we never configured any GitHub integration so
this button just links to the GitHub main site.
The button generation should be disabled by default, but as that's apparently
not true in the alabaster theme on the server, this patch tries working around
the issue by just explicitly turning off the GitHub integration.
|
| lldb/docs/conf.py |
Commit
80cdd30eb90c3509bf315f1fa1369483e2448bbd
by jeroen.dobbelaere[LoopPeel] Use llvm.experimental.noalias.scope.decl for duplicating noalias metadata as needed.
The reduction of a sanitizer build failure when enabling the dominance check (D95335) showed that loop peeling also needs to take care of scope duplication, just like loop unrolling (D92887).
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D95544
|
| llvm/test/Transforms/LoopUnroll/peel-loop-noalias-scope-decl.ll |
| llvm/lib/Transforms/Utils/LoopPeel.cpp |
Commit
b8c81fa5c7f77a7a1267e42ddbbc9bffb10b0817
by flo[LoopUnswitch] Add shortcut if unswitched path is a no-op.
If we determine that the invariant path through the loop has no effects,
we can directly branch to the exit block, instead to unswitching first.
Besides avoiding some extra work (unswitching first, then deleting the
loop again) this allows to be more aggressive than regular unswitching
with respect to cost-modeling. This approach should always be be
desirable.
This is similar in spirit to D93734, just that it uses the previously
added checks for loop-unswitching.
I tried to add the required no-op checks from scratch, as we only check
a subset of the loop. There is potential to unify the checks with
LoopDeletion, at the cost of adding a predicate whether a block should
be considered.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95468
|
| llvm/lib/Transforms/Scalar/LoopUnswitch.cpp |
| llvm/test/Transforms/LoopUnswitch/partial-unswitch-cost.ll |
Commit
a9583a19237e66fa56fcd979511ac14232e9a3c3
by flo[LoopUnswitch] Pacify compiler warnings.
Attempt to fix some compiler warnings on some bots after
b8c81fa5c7f77a7a1267e42ddbbc9bffb10b0817.
|
| llvm/lib/Transforms/Scalar/LoopUnswitch.cpp |
Commit
4648098f97fa2a7c08c04632c70cf29293528812
by marukawa[VE] Change inetger constants 32-bit friendly
Correct integer constants like `1UL << 63` to `UINT64_C(1) << 63` in
order to make them work on 32-bit machines. Tested on both an i386
and x86_64 machines.
Reviewed By: mgorny
Differential Revision: https://reviews.llvm.org/D95724
|
| llvm/lib/Target/VE/VE.h |
Commit
6ab792b68d5779e1668a2bd6ecd0a52c91b56387
by david.green[ARM] Simplify extract of VMOVDRR
Under SoftFP calling conventions, we can be left with
extract(bitcast(BUILD_VECTOR(VMOVDRR(a, b), ..))) patterns that can
simplify to a or b, depending on the extract lane.
Differential Revision: https://reviews.llvm.org/D94990
|
| llvm/lib/Target/ARM/ARMISelLowering.cpp |
| llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll |
Commit
5211af48181fe1a1ac99aeacf15818c50bfbda7d
by llvm-dev[X86][AVX] combineExtractWithShuffle - combine extracts from 256/512-bit vector shuffles.
We can only legally extract from the lowest 128-bit subvector, so extract the correct subvector to allow us to handle 256/512-bit vector element extracts.
|
| llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll |
| llvm/lib/Target/X86/X86ISelLowering.cpp |
| llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll |
Commit
b43c395e60d2636ab5afc9b60a2046978c71e366
by jeroen.dobbelaere[Verifier] enable llvm.experimental.noalias.scope.decl dominance check.
Now that Loop Peeling has been fixed (80cdd30eb90c3509bf315f1fa1369483e2448bbd),
enable the dominance check by default.
This reverts commit 3b5d36ece21f9baf96d82944b0165cb352443bee.
|
| llvm/lib/IR/Verifier.cpp |
Commit
ad12e6ee9579149c0efb594211fa3fb8aed2d84f
by david.green[ARM] Turn sext_inreg(VGetLaneu) into VGetLaneu
This adds a DAG combine for converting sext_inreg of VGetLaneu into
VGetLanes, providing the types match correctly.
Differential Revision: https://reviews.llvm.org/D95073
|
| llvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll |
| llvm/lib/Target/ARM/ARMISelLowering.cpp |
| llvm/test/CodeGen/Thumb2/mve-div-expand.ll |
| llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll |
| llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll |
| llvm/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll |
| llvm/test/CodeGen/Thumb2/mve-vcvt.ll |
| llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll |
Commit
94fac81fccfef9917e94bed398781744fb82e159
by shivam98.tkg[Branch-Rename] Fix some links
According to the [[ https://foundation.llvm.org/docs/branch-rename/ | status of branch rename ]], the master branch of the LLVM repository is removed on 28 Jan 2021.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D95766
|
| libcxx/www/atomic_design_b.html |
| clang-tools-extra/clang-tidy/google/AvoidUnderscoreInGoogletestNameCheck.h |
| libunwind/docs/index.rst |
| clang-tools-extra/docs/clang-tidy/Contributing.rst |
| clang/docs/ControlFlowIntegrityDesign.rst |
| lldb/docs/resources/test.rst |
| compiler-rt/lib/tsan/rtl/tsan_interface.h |
| polly/www/menu.html.incl |
| clang/www/analyzer/checker_dev_manual.html |
| libcxx/www/ts1z_status.html |
| openmp/www/index.html |
| libcxx/www/atomic_design_c.html |
| libcxx/www/type_traits_design.html |
| lldb/docs/use/python-reference.rst |
| clang-tools-extra/docs/clang-tidy/Integrations.rst |
| clang/docs/ClangPlugins.rst |
| clang/www/analyzer/open_projects.html |
| clang-tools-extra/docs/clang-rename.rst |
| llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
| libcxx/www/atomic_design.html |
| mlir/docs/OpDefinitions.md |
| llvm/utils/lit/setup.py |
| libcxx/www/upcoming_meeting.html |
| clang-tools-extra/clangd/README.md |
| clang/www/hacking.html |
| mlir/docs/Tutorials/UnderstandingTheIRStructure.md |
| clang/docs/ClangTools.rst |
| compiler-rt/www/menu.html.incl |
| libcxx/www/index.html |
| clang/docs/InternalsManual.rst |
| llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
| clang/lib/CodeGen/CGOpenMPRuntime.cpp |
| flang/README.md |
| libcxx/www/atomic_design_a.html |
| flang/docs/flang-c-style.el |
| libcxx/docs/index.rst |
| clang/docs/LibTooling.rst |
| mlir/docs/Dialects/SPIR-V.md |
| llvm/docs/Vectorizers.rst |
| mlir/docs/PatternRewriter.md |
| mlir/docs/ShapeInference.md |
| flang/docs/_templates/indexsidebar.html |
| llvm/test/Transforms/SLPVectorizer/AArch64/matmul.ll |
| mlir/docs/DeclarativeRewrites.md |
| libcxxabi/www/index.html |
| lldb/docs/resources/build.rst |
| mlir/docs/Rationale/RationaleGenericDAGRewriter.md |
| clang/www/menu.html.incl |
| mlir/docs/Dialects/Vector.md |
| mlir/docs/SPIRVToLLVMDialectConversion.md |
| compiler-rt/include/sanitizer/tsan_interface_atomic.h |
Commit
b8923c002207da449ec462ade468e27a651b1f91
by medismail.bennani[lldb/API] Expose Module::IsLoadedInTarget() to SB API (NFC)
This patch adds an `SBTarget::IsLoaded(const SBModule&) const` endpoint
to lldb's Scripting Bridge API. As the name suggests, it will allow the
user to know if the module is loaded in a specific target.
rdar://37957625
Differential Review: https://reviews.llvm.org/D95686
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
|
| lldb/test/API/python_api/target/TestTargetAPI.py |
| lldb/include/lldb/API/SBTarget.h |
| lldb/source/API/SBTarget.cpp |
| lldb/bindings/interface/SBTarget.i |
Commit
99b5631649e09970769562abb05475b79eb44e3c
by dmitry.preobrazhensky[AMDGPU][MC] Corrected error position for invalid operands
Generic parser may report an incorrect error position when an offending operand is followed by a comma.
See bug 48884 for details: https://bugs.llvm.org/show_bug.cgi?id=48884.
Differential Revision: https://reviews.llvm.org/D95674
|
| llvm/test/MC/AMDGPU/gfx10_err_pos.s |
| llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp |
Commit
11e74e512d64ae2a2531156b6f0dde211b1ae19d
by martin[lldb] Remove a stray semicolon, fixing GCC warnings. NFC.
|
| lldb/tools/lldb-vscode/FifoFiles.cpp |
Commit
eefa8a9ff859153c510e740b33a9e721e42b88c5
by Jan SvobodaRevert "[clang][cli] Port OpenMP-related LangOpts to marshalling system"
This reverts commit 9ad94c12
It turns out that to correctly generate command line flags for LangOptions::OpenMP and LangOptions::OpenMPSimd, we need the flexibility of C++.
|
| clang/lib/Frontend/CompilerInvocation.cpp |
| clang/include/clang/Driver/Options.td |
Commit
754ab803b8dc659e3645d369d1b5d6d2f97be29e
by Raphael Isemann[lldb] Use current execution context in SBDebugger
Use `GetSelectedExecutionContext()` instead of
`GetCommandInterpreter().GetExecutionContext()` in
`SBDebugger::GetInternalVariableValue/SBDebugger::SetInternalVariable`. The
execution context in the command interpreter might be empty, if no commands has
been executed yet (it is updated only when handling commands or completions --
e.g.
https://github.com/llvm/llvm-project/blob/main/lldb/source/Interpreter/CommandInterpreter.cpp#L1855).
Reviewed By: teemperor
Differential Revision: https://reviews.llvm.org/D95761
|
| lldb/source/API/SBDebugger.cpp |
| lldb/test/API/python_api/debugger/TestDebuggerAPI.py |
Commit
3b8a1d581e6e1623d046b8b8da577ec4d42a544c
by sander.desmalenNFC: Migrate SpeculativeExecution to work on InstructionCost
This patch migrates cost values and arithmetic to work on InstructionCost.
When the interfaces to TargetTransformInfo are changed, any InstructionCost
state will propagate naturally.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D95356
|
| llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp |
Commit
8cda227432f1c9ceb63b88802ed8136da97274f1
by cullen.rhodes[LV] Fix crash when computing max VF too early
D90687 introduced a crash:
llvm::LoopVectorizationCostModel::computeMaxVF(llvm::ElementCount, unsigned int):
Assertion `WideningDecisions.empty() && Uniforms.empty() && Scalars.empty() &&
"No decisions should have been taken at this point"' failed.
when compiling the following C code:
typedef struct {
char a;
} b;
b *c;
int d, e;
int f() {
int g = 0;
for (; d; d++) {
e = 0;
for (; e < c[d].a; e++)
g++;
}
return g;
}
with:
clang -Os -target hexagon -mhvx -fvectorize -mv67 testcase.c -S -o -
This occurred since prior to D90687 computeFeasibleMaxVF would only be
called in computeMaxVF when a scalar epilogue was allowed, but now it's
always called. This causes the assert above since computeFeasibleMaxVF
collects all viable VFs larger than the default MaxVF, and for each VF
calculates the register usage which results in analysis being done the
assert above guards against. This can occur in computeFeasibleMaxVF if
TTI.shouldMaximizeVectorBandwidth and this target hook is implemented in
the hexagon backend to always return true.
Reported by @iajbar.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D94869
|
| llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
| llvm/test/Transforms/LoopVectorize/Hexagon/maximum-vf-crash.ll |
Commit
c2b322fc19e829162ed4c7dcd04d9e9b2cd4e66c
by Tim NorthoverGlobalISel: check type size before getZExtValue()ing it.
Otherwise getZExtValue() asserts.
|
| llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp |
| llvm/test/CodeGen/AArch64/GlobalISel/huge-switch.ll |
Commit
ee562e2315cfe339fdcb0cb9b2122284bbeda29b
by medismail.bennani[lldb/test] Skip `SBTarget::IsLoaded` test on windows (NFC)
This patch skips the test for the SBTarget::IsLoaded method on windows
since the logic is different.
Differential Revision: https://reviews.llvm.org/D95686
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
|
| lldb/test/API/python_api/target/TestTargetAPI.py |
Commit
972212d29c3ad0569afb9dbed38a6cab7311db3e
by flo[ConstraintElimination] Add tests for signed predicates.
Add test coverage for conditions with signed predicates.
|
| llvm/test/Transforms/ConstraintElimination/mixed-signed-unsigned-predicates.ll |
| llvm/test/Transforms/ConstraintElimination/sge.ll |
Commit
2556b413a7b802703290ecf318712941dec6d745
by jeroen.dobbelaereRevert "[Verifier] enable llvm.experimental.noalias.scope.decl dominance check."
the 'clang-with-lto-ubuntu' buildbot triggers the assertion.
This reverts commit b43c395e60d2636ab5afc9b60a2046978c71e366.
|
| llvm/lib/IR/Verifier.cpp |
Commit
f1e8136115ac86a633f670cd4d50cf41b71418d8
by flo[SCEV] Bail out if URem operand cannot be zero-extended.
In some cases, LHS is larger than the target expression type. Bail out
in that case for now, to avoid crashing
|
| llvm/lib/Analysis/ScalarEvolution.cpp |
| llvm/test/Analysis/ScalarEvolution/trip-multiple-guard-info.ll |
Commit
9b4fcfaa9e8f19f250c45e92dd2e5a305156b701
by kerry.mclaughlin[SVE][CodeGen] Remove performMaskedGatherScatterCombine
The AArch64 DAG combine added by D90945 & D91433 extends the index
of a scalable masked gather or scatter to i32 if necessary.
This patch removes the combine and instead adds shouldExtendGSIndex, which
is used by visitMaskedGather/Scatter in SelectionDAGBuilder to query whether
the index should be extended before calling getMaskedGather/Scatter.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D94525
|
| llvm/lib/Target/AArch64/AArch64ISelLowering.h |
| llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
| llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
| llvm/include/llvm/CodeGen/TargetLowering.h |
Commit
b63cd4db915c08e0cb4cf668a18de24b67f2c44c
by sam.mccall[clangd] Rename: merge index/AST refs path-insensitively where needed
If you have c:\foo open, and C:\foo indexed (case difference) then these
need to be considered the same file. Otherwise we emit edits to both,
and editors do... something that isn't pretty.
Maybe more centralized normalization is called for, but it's not trivial
to do this while also being case-preserving. see
https://github.com/clangd/clangd/issues/108
Fixes https://github.com/clangd/clangd/issues/665
Differential Revision: https://reviews.llvm.org/D95759
|
| clang-tools-extra/clangd/support/CMakeLists.txt |
| clang-tools-extra/clangd/unittests/RenameTests.cpp |
| clang-tools-extra/clangd/refactor/Rename.cpp |
| clang-tools-extra/clangd/GlobalCompilationDatabase.cpp |
| clang-tools-extra/clangd/support/Path.cpp |
| clang-tools-extra/clangd/support/Path.h |
Commit
313a36130f2ab7d2a442820e86009d2834fbe6db
by llvmgnsyncbot[gn build] Port b63cd4db915c
|
| llvm/utils/gn/secondary/clang-tools-extra/clangd/support/BUILD.gn |
Commit
78c22fbce991bb5ef49db36473b71fc4386e1e85
by hokein.wu[clangd] Don't rely on builtin headers for document-link.test.
This test seems to be failing at HEAD.
Reviewed By: kadircet, sammccall
Differential Revision: https://reviews.llvm.org/D95670
|
| clang-tools-extra/clangd/test/document-link.test |
Commit
c448ea948c28878735fefec734d8326ca2e4b33a
by Louis Dionne[libc++] Fix for the Bug 41784
Add deleted volatile copy-assignment operator in the most derived atomic
to fix the Bug 41784. The root cause: there is an `operator=(T) volatile`
that has better match than the deleted copy-assignment operator of the base
class when `this` is `volatile`. The compiler sees that right operand of
the assignment operator can be converted to `T` and chooses that path
without taking into account the deleted copy-assignment operator of the
base class.
The current behavior on libstdc++ is different from what we have in libc++.
On the same test compilation fails with libstdc++. Proof: https://godbolt.org/z/nebPYd
(everything is the same except the -stdlib option).
I choose the way with explicit definition of copy-assignment for atomic
in the most derived class. But probably we can fix that by moving
`operator=(T)` overloads to the base class from both specializations.
At first glance, it shouldn't break anything.
Differential Revision: https://reviews.llvm.org/D90968
|
| libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/copy.assign.volatile.verify.cpp |
| libcxx/include/atomic |
| libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/copy.assign.ptr.volatile.verify.cpp |
| libcxx/test/std/atomics/atomics.types.generic/copy_semantics_traits.pass.cpp |
Commit
ce587529ad8b5347fa8896e6811469c1857ed1a2
by llvm-dev[APFloat] multiplySignificand - pass IEEEFloat as const reference. NFCI.
Avoids unnecessary IEEEFloat copies.
|
| llvm/lib/Support/APFloat.cpp |
| llvm/include/llvm/ADT/APFloat.h |
Commit
267b573b55f7f43aaeaf4860e31101cd6a3dbba0
by paul[TableGen] Fix anonymous record self-reference in foreach and multiclass
If we instantiate self-referenced anonymous records in foreach and
multiclass, the NAME value will point to incorrect record. It's because
anonymous name is resolved too early.
This patch adds AnonymousNameInit to represent an anonymous record name.
When instantiating an anonymous record, it will update the referred name.
Differential Revision: https://reviews.llvm.org/D95309
|
| llvm/include/llvm/TableGen/Record.h |
| llvm/test/TableGen/self-reference.td |
| llvm/lib/TableGen/TGParser.cpp |
| llvm/lib/TableGen/Record.cpp |
Commit
ff4832dbff0ccf1fd29f726efe72fd1220cd645a
by sam.mccall[clangd] Respect ReferencesParams.context.includeDeclarations
Unfortunately this treats overrides declarations as declarations, not as
references. I don't plan to land this until I have a fix for that issue.
Differential Revision: https://reviews.llvm.org/D95450
|
| clang-tools-extra/clangd/Protocol.h |
| clang-tools-extra/clangd/Protocol.cpp |
| clang-tools-extra/clangd/test/references.test |
| clang-tools-extra/clangd/XRefs.h |
| clang-tools-extra/clangd/XRefs.cpp |
| clang-tools-extra/clangd/unittests/XRefsTests.cpp |
| clang-tools-extra/clangd/unittests/PreambleTests.cpp |
| clang-tools-extra/clangd/ClangdLSPServer.cpp |
Commit
5805521207852b859090c274a69fd51618b68b69
by david.green[ARM] Simplify VMOVRRD from extracts of buildvectors
Under the softfp calling convention, we are often left with
VMOVRRD(extract(bitcast(build_vector(a, b, c, d)))) for the return value
of the function. These can be simplified to a,b or c,d directly,
depending on the value of the extract.
Big endian is a little different because the bitcast switches the lanes
around, meaning we end up with b,a or d,c.
Differential Revision: https://reviews.llvm.org/D94989
|
| llvm/lib/Target/ARM/ARMISelLowering.cpp |
| llvm/test/CodeGen/ARM/func-argpassing-endian.ll |
| llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll |
| llvm/test/CodeGen/Thumb2/mve-vcreate.ll |
| llvm/test/CodeGen/ARM/vcvt.ll |
Commit
880b64aa228fdc0152b8bb9e88e4ff83f5d0e43a
by sander.desmalen[SimplifyCFG] NFC: Rename static methods to clang-tidy standards.
This patch is a precursor to D95351, which changes the signature
of these methods.
|
| llvm/lib/Transforms/Utils/SimplifyCFG.cpp |
Commit
bf294953e77089c314e431a7eb238cb353aa44d5
by sander.desmalenNFC: Migrate SimplifyCFG to work on InstructionCost
This patch migrates cost values and arithmetic to work on InstructionCost.
When the interfaces to TargetTransformInfo are changed, any InstructionCost
state will propagate naturally.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D95351
|
| llvm/lib/Transforms/Utils/SimplifyCFG.cpp |
Commit
657e76968822f6fbfc06826e2af88806025e32cb
by llvm-devRevert rGce587529ad8b5 - "[APFloat] multiplySignificand - pass IEEEFloat as const reference. NFCI."
Breaks on some buildbots
|
| llvm/lib/Support/APFloat.cpp |
| llvm/include/llvm/ADT/APFloat.h |
Commit
8712df7a621d1d00a3fd4641ef72639a8faa6284
by sam.mccall[clangd] references: decls of overrides of x are refs to x, not decls
This requires a second index query for refs to overrides, as the refs
call doesn't tell you which ref points at which symbol.
Differential Revision: https://reviews.llvm.org/D95451
|
| clang-tools-extra/clangd/index/Index.h |
| clang-tools-extra/clangd/XRefs.cpp |
| clang-tools-extra/clangd/unittests/XRefsTests.cpp |
Commit
fda48539988d2a1bdb6395799151e9090312a20b
by huberjn[OpenMP] Fix seg fault in libomptarget when using Info with multiple threads
Summary:
One option for the LIBOMPTARGET_INFO environment variable is to print the current status of the device's data mappings. These are a shared resource among threads so this needs to be protected when using multiple streams.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95786
|
| openmp/libomptarget/src/private.h |
| openmp/libomptarget/src/interface.cpp |
Commit
1eb7fd089e2fcf3fe211f865b28e2fed12128c3f
by sam.mccall[clangd] Remove some obsolete options that are now always on
- always collect main-file refs when indexing
- always build preambles asynchronously
- always use dex for fast preamble index
Retire associated flags
Differential Revision: https://reviews.llvm.org/D95571
|
| clang-tools-extra/clangd/index/Background.cpp |
| clang-tools-extra/clangd/index/FileIndex.cpp |
| clang-tools-extra/clangd/unittests/TestTU.cpp |
| clang-tools-extra/clangd/TUScheduler.cpp |
| clang-tools-extra/clangd/TUScheduler.h |
| clang-tools-extra/clangd/index/FileIndex.h |
| clang-tools-extra/clangd/tool/ClangdMain.cpp |
| clang-tools-extra/clangd/ClangdServer.h |
| clang-tools-extra/clangd/index/Background.h |
| clang-tools-extra/clangd/unittests/BackgroundIndexTests.cpp |
| clang-tools-extra/clangd/ClangdServer.cpp |
Commit
5f3c4923e4e4d5f40a64e08e407067ff551f2901
by erik.pilkington[compiler-rt] Fix AArch64 out-of-line atomics visibility on mach-o
This fixes an apparent oversight in D91156, where the symbol was defined
without the leading underscore, then the visibility was later declared with it.
rdar://73364185
Differential revision: https://reviews.llvm.org/D95639
|
| compiler-rt/lib/builtins/assembly.h |
Commit
0397dca0214ab50de41ac6c3d432aab93ff75c60
by Austin.Kerbow[AMDGPU] Fix crash with sgpr spills to vgpr disabled
This would assert with amdgpu-spill-sgpr-to-vgpr disabled when trying to
spill the FP.
Fixes: SWDEV-262704
Reviewed By: RamNalamothu
Differential Revision: https://reviews.llvm.org/D95768
|
| llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
| llvm/lib/Target/AMDGPU/SIFrameLowering.cpp |
| llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll |
Commit
e068e236c3b8e5ad4527bd9407cc9900359c3eec
by Austin.Kerbow[AMDGPU] Fix release build after 0397dca0.
|
| llvm/lib/Target/AMDGPU/SIFrameLowering.cpp |
Commit
f0ffc690d5bcb3d8c373cbe63ac9a2a3a10deee8
by pklausler[flang] Fix parsing of WRITE(I+J) with more accurate look-ahead
The parsing of I/O units uses look-ahead to discriminate between
keywords, variables and expressions as part of distinguishing internal
from external I/O. The look-ahead was inaccurate for variables that
appear as the initial parts of expressions.
Differential Revision: https://reviews.llvm.org/D95743
|
| flang/lib/Parser/io-parsers.cpp |
| flang/lib/Parser/Fortran-parsers.cpp |
Commit
ce190e41445eb52e560ac70dd1df74717a1e80d2
by flo[ConstraintElimination] Negate IR condition directly.
Instead of using ConstraintSystem::negate when adding new constraints,
flip the condition in IR.
The main advantage is that EQ predicates can be represented by 2
constraints, which makes negating based on the constraint tricky. The IR
condition can easily negated.
|
| llvm/lib/Transforms/Scalar/ConstraintElimination.cpp |
Commit
1097ee61bf3ef4f36a7e92b4d8781a5c069c93de
by craig.topper[RISCV] Optimize (srl (and X, 0xffff), C) -> (srli (slli X, 16), 16 + C).
Rather than materializing the 0xffff immediate for the AND, use
a shift left to remove the upper bits and then shift in zeros
from the right.
This pattern occurs when type legalizing an i16 right shift.
I've implemented this with custom selection code for a number of
reasons. I've limited this to the AND having a single use. We need
to compensate for SimplifyDemandedBits altering the AND mask. I'm
using *W opcodes on RV64. We may want to generlize this in the
future. For all these reason it seemed easiest to do it this way.
Reviewed By: luismarques
Differential Revision: https://reviews.llvm.org/D95774
|
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
| llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll |
| llvm/test/CodeGen/RISCV/alu16.ll |
Commit
4809663334ab84fc0e3f4ed11477d6873e642824
by Jessica Paquette[GlobalISel] Make sure G_ASSERT_ZEXT's src ends up with the same rc as dst
When replacing the dst reg with the src reg, we need to make sure that we
propagate the dst reg's register class through to the src.
Otherwise, we aren't meeting the requirements for G_ASSERT_ZEXT, and so the
verifier will fail.
Differential Revision: https://reviews.llvm.org/D95708
|
| llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp |
| llvm/test/CodeGen/AArch64/GlobalISel/select-hint.mir |
Commit
6a3ab66625cf1d440e66d9f438f05ee5ed040672
by craig.topper[RISCV] Update comment text from D95774. NFC
|
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
Commit
72b31ad4b8c1463dcdfed636be0abb8e9050c16f
by craig.topper[RISCV] Add scalable vector support for floating point FMA instructions
A follow up patch will add support for commuting operands or
changing opcode to vfmacc and friends.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D95662
|
| llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll |
| llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll |
| llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
| llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll |
Commit
7f2e0879b5b45815207a986eac2d614649aea526
by tejohnson[LTO] Move part of gold devirt test to v1.16 directory
Part of the gold test added in 1487747e990ce9f8851f3d92c3006a74134d7518
relies on more recent fixes to gold that fix the plugin behavior with
--export-dynamic-symbol and --dynamic-list. Extract those parts of the
new test into a v1.16 test.
|
| llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll |
| llvm/test/tools/gold/X86/v1.16/devirt_vcall_vis_export_dynamic.ll |
Commit
cf2be5e3bb3dae347af41ab6117f3e9b250cc8c3
by Jessica Paquette[AArch64][GlobalISel] Emit G_ASSERT_ZEXT in assignValueToReg
When we have a zeroext parameter, emit G_ASSERT_ZEXT.
Add a check that we actually emit it.
This is a 0.1% code size win on CTMark/7zip and CTMark/consumer-typeset at -Os.
Differential Revision: https://reviews.llvm.org/D95567
|
| llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll |
| llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp |
Commit
3ffc53ba16272b6475ff49c05ab6aa72f7720383
by koraq[libc++] Implements concept default_initializable.
Implements:
- LWG3149 DefaultConstructible should require default initialization
Implements parts of:
- P0898R3 Standard Library Concepts
- P1754 Rename concepts to standard_case for C++20, while we still can
Depends on D91986
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D93461
|
| libcxx/docs/Cxx2aStatusIssuesStatus.csv |
| libcxx/test/std/concepts/concept.default.init/default_initializable.compile.pass.cpp |
| libcxx/include/concepts |
| libcxx/test/std/concepts/concept.default.init/default_initializable.verify.cpp |
Commit
f0129cc35ebd4607c86f1f90cb664c86ffdb4a5c
by tianshilei1992[OpenMP] Disable tests if FileCheck is not available in in-tree building
FileCheck is required for OpenMP tests. The current detection can fail
if building OpenMP in-tree when user sets `LLVM_INSTALL_TOOLCHAIN_ONLY=ON`. As a
result, CMake will raise an error and the compilation will be broken. This patch
fixed the issue. When `FileCheck` is not a target, tests will just be skipped.
Reviewed By: jdoerfert, JonChesterfield
Differential Revision: https://reviews.llvm.org/D95689
|
| openmp/cmake/OpenMPTesting.cmake |
Commit
e640b209b24a9bf66f5998b5fafa76f0dbb388ab
by llvm-dev[X86][SSE] LowerScalarImmediateShift - use APInt::getLowBitsSet for vXi8 ISD::SRL mask generation. NFCI.
Match what we do for ISD::SHL
|
| llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
e9514429a02b1e4f8b9d54b28a934bfa9bd246ec
by llvm-dev[X86][AVX] Add 'OK' tests cases for PR48877
|
| llvm/test/MC/Disassembler/X86/x86-64-avx.txt |
| llvm/test/MC/Disassembler/X86/x86-64-avx2.txt |
Commit
3f46c209f1527530ca8e60a51d08e32e886fa11b
by clementval[flang][directive] Enforce basic semantic check for all clauses
This patch is a follow up to D94821 to ensure the correct behavior of the
general directive structure checker.
This patch add the generation of the Enter function declaration for clauses in
the TableGen backend.
This helps to ensure each clauses declared in the TableGen file has at least
a basic check.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D95108
|
| llvm/utils/TableGen/DirectiveEmitter.cpp |
| flang/lib/Semantics/check-omp-structure.cpp |
| flang/lib/Semantics/check-acc-structure.cpp |
| flang/lib/Semantics/check-acc-structure.h |
| flang/lib/Semantics/check-omp-structure.h |
Commit
c4d6f2707a1e6c4e9bd93480dd913121fef122b7
by mtrofin[NFC] Disallow unused prefixes under clang/test/Driver
Differential Revision: https://reviews.llvm.org/D95660
|
| clang/test/Driver/cuda-detect.cu |
| clang/test/Driver/rocm-device-libs.cl |
| clang/test/Driver/ps4-visibility-dllstorageclass.c |
| clang/test/Driver/amdgpu-macros.cl |
| clang/test/Driver/fsanitize.c |
| clang/test/Driver/lit.local.cfg |
Commit
cb2e2d506814dc3c06449a87aec180b29f4351d7
by michaelrj[libc] Small adjustments to fenv tests
Some libcs define non-standard FE_* macros and include them in
FE_ALL_EXCEPT. This change adjusts the fenv tests so that the
non-standard FE_* macros do not interfere when compiled with
fenv.h from another libc.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D95650
|
| libc/test/src/fenv/enabled_exceptions_test.cpp |
| libc/test/src/fenv/exception_status_test.cpp |
Commit
d23b68a8798913bda65db109e57029139197c587
by spatel[InstCombine] add tests for min/max with extend and constant operand; NFC
|
| llvm/test/Transforms/InstCombine/minmax-intrinsics.ll |
Commit
0ce2920f1707266c0d94dacc8719251b7b6a2c01
by spatel[InstCombine] try to narrow min/max intrinsics with constant operand
The constant trunc/ext may not be the optimal pre-condition,
but I think that handles the common cases.
Example of Alive2 proof:
https://alive2.llvm.org/ce/z/sREeLC
This is another step towards canonicalizing to the intrinsics.
Narrowing was identified as source of potential regression for
abs(), so we need to handle this for min/max - see:
https://llvm.org/PR48816
If this is not enough, we could process intrinsics in
the trunc-driven matching in canEvaluateTruncated().
|
| llvm/test/Transforms/InstCombine/minmax-intrinsics.ll |
| llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp |
Commit
08d46d50599a7005380e1a9eebb276ceb2b0ad93
by melanie.blower[clang][PATCH] Fix bug 48848 assertion related to recoverFromMSUnqualifiedLookup
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D95482
|
| clang/lib/Sema/SemaExprCXX.cpp |
| clang/test/SemaCXX/lambda-expressions.cpp |
Commit
771b35965457ebd5faaed8a1c3d2bcefffe721a3
by haowei[elfabi] Fix tests which failed on different timezones
This patch fixes elfabi tests on machines using a GMT+X timezone
settings.
Differential Revision: https://reviews.llvm.org/D95641
|
| llvm/test/tools/llvm-elfabi/preserve-dates-stub.test |
| llvm/test/tools/llvm-elfabi/preserve-dates-tbe.test |
Commit
c691fe14da93a7c9eff466231515d6d4d16124fa
by craig.topper[X86] Accept 64-bit GPRs for vextractps when using a register that requires EVEX.
This is consistent with the VEX version. It also fixes a sorting
issue in the matching table that caused the EVEX version to be
prioritized over VEX in intel syntax.
Fixes issue [2] from PR48991.
|
| llvm/test/MC/X86/intel-syntax-x86-64-avx512f_vl.s |
| llvm/lib/Target/X86/X86InstrAVX512.td |
| llvm/test/MC/X86/intel-syntax-x86-64-avx.s |
Commit
7739f9ff974a2b301f5b036de55820b19a0df19a
by aeubanks[NewPM][Unswitch] Add option to disable -O3 non-trivial unswitching
Some benchmarks regress with non-trivial unswitching, so add an option
to opt-out of performing non-trivial unswitching while investigating.
Reviewed By: asbirlea
Differential Revision: https://reviews.llvm.org/D95796
|
| llvm/lib/Passes/PassBuilder.cpp |
| llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll |
Commit
5b2626ea87f48eab011b616a96540b9e83c7ca88
by david.green[ARM] Flatten identity shuffles through vqdmulh nodes
Given a shuffle(vqdmulh(shuffle, shuffle), we can flatter the shuffles
out if they become an identity mask. This can come up during lane
interleaving, when we do that better.
Differential Revision: https://reviews.llvm.org/D94034
|
| llvm/lib/Target/ARM/ARMISelLowering.cpp |
| llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll |
Commit
c73c23f2a91f5a454d782da9918e2160cfe66087
by michaelrj[libc][NFC] Add a death test API adaptation macro
Fuchsia's zxtest has a slightly different death test definition, and
this macro makes our death test API work on Fuchsia.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D95648
|
| libc/utils/UnitTest/LibcTest.h |
| libc/test/src/assert/assert_test.cpp |
| libc/test/src/signal/sigaction_test.cpp |
| libc/test/src/fenv/enabled_exceptions_test.cpp |
| libc/test/src/signal/raise_test.cpp |
| libc/test/src/signal/sigdelset_test.cpp |
| libc/test/src/stdlib/abort_test.cpp |
| libc/test/src/signal/sigprocmask_test.cpp |
| libc/utils/UnitTest/FuchsiaTest.h |
Commit
35a57f39b5d126646335183f1ff0f7adb52d63bc
by koraq[libc++][format] Add basic_format_parse_context.
Implements parts of:
- P0645 Text Formatting
Depends on D92214
Reviewed By: ldionne, curdeius, #libc
Differential Revision: https://reviews.llvm.org/D93166
|
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/advance_to.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/begin.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/types.compile.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/next_arg_id.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/end.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/check_arg_id.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/ctor.pass.cpp |
| libcxx/include/format |
Commit
8bfef787225c14a67db23254b82b330e85d1c35c
by rnk[ConstantHoisting] Fix bug where constant materialization could insert into EH pad
If the incoming block to a phi node is an EH pad, then we will
materialize into an EH pad, which is not supposed to happen. To fix
this, I added a check to see if incoming block of a phi node is an EH
pad before using it as the insertion point.
Differential Revision: https://reviews.llvm.org/D95019
|
| llvm/test/Transforms/ConstantHoisting/X86/ehphi.ll |
| llvm/lib/Transforms/Scalar/ConstantHoisting.cpp |
Commit
0d9b17d0efe065f23b7f1c1f8f2b2b32491abd45
by aardappel[WebAssembly] fixed wasm64 data segment init exp not 64-bit
As defined in the spec:
https://github.com/WebAssembly/memory64/blob/master/proposals/memory64/Overview.md
Differential Revision: https://reviews.llvm.org/D95651
|
| llvm/test/MC/WebAssembly/data-section.s |
| lld/test/wasm/data-layout.ll |
| lld/wasm/OutputSections.cpp |
| llvm/lib/MC/WasmObjectWriter.cpp |
| lld/test/wasm/data-segments.ll |
| llvm/test/MC/WebAssembly/wasm64.s |
Commit
b3f611bfe7d4aac7b1393ab0200d7166a590791b
by hanchung[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding
This is the last revision to migrate using SimplePadOp to PadTensorOp, and the
SimplePadOp is removed in the patch. Update a bit in SliceAnalysis because the
PadTensorOp takes a region different from SimplePadOp. This is not covered by
LinalgOp because it is not a structured op.
Also, remove a duplicated comment from cpp file, which is already described in a
header file. And update the pseudo-mlir in the comment.
This is as same as D95615 but fixing one dep in CMakeLists.txt
Different from D95671, the fix was applied to run target.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D95785
|
| mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp |
| mlir/lib/Analysis/SliceAnalysis.cpp |
| mlir/test/lib/Transforms/TestLinalgTransforms.cpp |
| mlir/lib/Analysis/CMakeLists.txt |
| mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h |
| mlir/test/Dialect/Linalg/hoist-padding.mlir |
| mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
| mlir/test/Dialect/Linalg/roundtrip.mlir |
Commit
2a53d9a6e7736fe141cd6365be05d972ff6f0065
by listmail[Loads] Plumb through TLI argument [NFC]
This is a (rather delayed) follow up to commit 0129cd5. This commit is entirely NFC, the semantic change to leverage the new information will be submitted separate with a test case.
|
| llvm/include/llvm/Analysis/Loads.h |
| llvm/lib/Analysis/Loads.cpp |
Commit
d7b12004bd7d6d9a592f1773101cbedd9daf8492
by Andrey.Churbanov[OpenMP] libomp: implement nteams-var and teams-thread-limit-var ICVs
The change includes OMP_NUM_TEAMS, OMP_TEAMS_THREAD_LIMIT env variables,
omp_set_num_teams, omp_get_max_teams, omp_set_teams_thread_limit,
omp_get_teams_thread_limit routines.
Differential Revision: https://reviews.llvm.org/D95003
|
| openmp/runtime/test/api/omp_nteams_api_env.c |
| openmp/runtime/src/kmp_settings.cpp |
| openmp/runtime/src/kmp_runtime.cpp |
| openmp/runtime/src/dllexports |
| openmp/runtime/src/include/omp_lib.h.var |
| openmp/runtime/src/include/omp.h.var |
| openmp/runtime/test/api/omp_nteams_api.c |
| openmp/runtime/src/include/omp_lib.f90.var |
| openmp/runtime/src/kmp_ftn_os.h |
| openmp/runtime/src/kmp.h |
| openmp/runtime/src/kmp_global.cpp |
| openmp/runtime/test/api/omp_nteams_api_env2.c |
| openmp/runtime/src/kmp_ftn_entry.h |
Commit
21f1462106b9ee1e646bf409c85528828320b34e
by antiagainst[mlir][spirv] Add support for OpImageType
Support OpImageType in SPIRV Dialect.
This change doesn't support operand AccessQualifier since
it is optinal and only enables under Kernel capability.
co-authored-by: Alan Liu <alanliu.yf@gmail.com>
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D95580
|
| mlir/lib/Target/SPIRV/Deserialization/Deserializer.h |
| mlir/test/Target/SPIRV/image.mlir |
| mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp |
| mlir/lib/Target/SPIRV/Serialization/Serialization.cpp |
| mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp |
| mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td |
Commit
75347ba1fae25819a086fc29ad52d813419887a8
by antiagainstRevert "[mlir][spirv] Add support for OpImageType"
This reverts commit 21f1462106b9ee1e646bf409c85528828320b34e.
|
| mlir/lib/Target/SPIRV/Deserialization/Deserializer.h |
| mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp |
| mlir/test/Target/SPIRV/image.mlir |
| mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td |
| mlir/lib/Target/SPIRV/Serialization/Serialization.cpp |
| mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp |
Commit
0b28d756af183b9f294ddca5432a0ad5054ac9c2
by flo[ConstraintElimination] Add support for EQ predicates.
A == B map to A >= B && A <= B
(https://alive2.llvm.org/ce/z/_dwxKn).
This extends the constraint construction to return a list of
constraints, which can be used to properly de-compose nested AND & OR.
|
| llvm/lib/Transforms/Scalar/ConstraintElimination.cpp |
| llvm/test/Transforms/ConstraintElimination/eq.ll |
Commit
32ef6d89f48be765330ee5d15cf57a1f01c9b335
by joker.ephAvoid string comparisons on the fast path of MLIR Identifier lookup (NFC)
Differential Revision: https://reviews.llvm.org/D95770
|
| mlir/lib/IR/MLIRContext.cpp |
Commit
68f66f37d7d74be7beba56506c4397dadc8538dd
by joker.ephRevert "[libc++][format] Add basic_format_parse_context."
This reverts commit 35a57f39b5d126646335183f1ff0f7adb52d63bc.
A build is broken during clang bootstrap with:
In file included from ../libcxx/src/format.cpp:9:
/tmp/ci-nGNyLRM9V3/include/c++/v1/format:153:16: error: no member named 'is_constant_evaluated' in namespace 'std::__1'
if (_VSTD::is_constant_evaluated() && __id >= __num_args_)
~~~~~~~^
1 error generated.
|
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/end.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/advance_to.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/ctor.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/next_arg_id.pass.cpp |
| libcxx/include/format |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/begin.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/types.compile.pass.cpp |
| libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/check_arg_id.pass.cpp |
Commit
bbed5f2f8a04ae3a49f5e8f900c117f405101424
by spatel[LoopVectorize] improve IR fast-math-flags propagation in reductions
This is another step (see D95452) towards correcting fast-math-flags
bugs in vector reductions.
There are multiple bugs visible in the test diffs, and this is still
not working as it should. We still use function attributes (rather
than FMF) to drive part of the logic, but we are not checking for
the correct FP function attributes.
Note that FMF may not be propagated optimally on selects (example
in https://llvm.org/PR35607 ). That's why I'm proposing to union the
FMF of a fcmp+select pair and avoid regressions on existing vectorizer
tests.
Differential Revision: https://reviews.llvm.org/D95690
|
| llvm/include/llvm/Transforms/Utils/LoopUtils.h |
| llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll |
| llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
| llvm/lib/Analysis/IVDescriptors.cpp |
| llvm/lib/Transforms/Utils/LoopUtils.cpp |
| llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll |
| llvm/include/llvm/IR/Operator.h |
Commit
68b0595ccb8de1b0a9459f958dda17164341ee87
by steveireNFC: Re-generate out-of-date matchers docs
|
| clang/docs/LibASTMatchersReference.html |
Commit
73ef96c49c293e09f50bba60eff9d143db41864d
by listmail[tests] highlight cornercase w/deref hoisting from D95815
The main point of committing this early is to have a negative test in tree. Nothing fails in the current tests if we implement this (currently unsound) optimization.
|
| llvm/test/Transforms/LICM/hoist-alloc.ll |
Commit
35f746c17fd0315b235050c0a350fc521f944f20
by antiagainst[mlir][spirv] Add support for OpImageType
Support OpImageType in SPIRV Dialect.
This change doesn't support operand AccessQualifier since
it is optinal and only enables under Kernel capability.
co-authored-by: Alan Liu <alanliu.yf@gmail.com>
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D95580
|
| mlir/test/Target/SPIRV/image.mlir |
| mlir/lib/Target/SPIRV/Deserialization/DeserializeOps.cpp |
| mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp |
| mlir/lib/Target/SPIRV/Serialization/Serialization.cpp |
| mlir/lib/Target/SPIRV/Deserialization/Deserializer.h |
| mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td |
Commit
772eb24e00629faaae0244aa0d6d6204542c579b
by bjoern[clang-format] Add option to control the spaces in a line comment
Differential Revision: https://reviews.llvm.org/D92257
|
| clang/include/clang/Format/Format.h |
| clang/docs/ClangFormatStyleOptions.rst |
| clang/lib/Format/BreakableToken.cpp |
| clang/docs/ReleaseNotes.rst |
| clang/lib/Format/BreakableToken.h |
| clang/unittests/Format/FormatTestComments.cpp |
| clang/lib/Format/Format.cpp |
| clang/lib/Format/NamespaceEndCommentsFixer.cpp |
| clang/unittests/Format/FormatTest.cpp |
Commit
224fee8219bb3aed34f13ce40935e1b3ede90a0f
by hoy[CSSPGO] Tweaking inlining with pseudo probes.
Fixing up a couple places where `getCallSiteIdentifier` is needed to support pseudo-probe-based callsites.
Also fixing an issue in the extbinary profile reader where the metadata section is not fully scanned based on the number of profiles loaded only for the current module.
Reviewed By: wmi, wenlei
Differential Revision: https://reviews.llvm.org/D95791
|
| llvm/lib/Transforms/IPO/SampleContextTracker.cpp |
| llvm/test/Transforms/SampleProfile/pseudo-probe-inline.ll |
| llvm/lib/ProfileData/SampleProfReader.cpp |
| llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-inline.prof |
Commit
8e661d3d9c52ea9e5e68cbf699701d9cfa071a8f
by Stanislav.Mekhanoshin[AMDGPU] Set s-memtime-inst feature from clang
Differential Revision: https://reviews.llvm.org/D95733
|
| clang/lib/Basic/Targets/AMDGPU.cpp |
| clang/test/CodeGenOpenCL/amdgpu-features.cl |
Commit
93345e825a0733f6a67898f6d6d156ff56db80e7
by i[llvm-objcopy] -O binary: consider SHT_NOBITS sections to be empty
This is consistent with BFD objcopy.
Previously llvm objcopy would allocate space for SHT_NOBITS sections
often resulting in enormous binary files.
New test case (binary-paddr.test %t6).
Reviewed By: jhenderson, MaskRay
Differential Revision: https://reviews.llvm.org/D95569
|
| llvm/tools/llvm-objcopy/ELF/Object.cpp |
| llvm/test/tools/llvm-objcopy/ELF/binary-paddr.test |
Commit
df3e39f60b356ca9dbfc11e96e5fdda30afa7acb
by phosek[InstrProfiling] Use !associated metadata for counters, data and values
C identifier name input sections such as __llvm_prf_* are GC roots so
they cannot be discarded. In LLD, the SHF_LINK_ORDER flag overrides the
C identifier name semantics.
The !associated metadata may be attached to a global object declaration
with a single argument that references another global object, and it
gets lowered to SHF_LINK_ORDER flag. When a function symbol is discarded
by the linker, setting up !associated metadata allows linker to discard
counters, data and values associated with that function symbol.
Note that !associated metadata is only supported by ELF, it does not have
any effect on non-ELF targets.
Differential Revision: https://reviews.llvm.org/D76802
|
| llvm/test/Instrumentation/InstrProfiling/icall.ll |
| compiler-rt/test/profile/instrprof-gc-sections.c |
| llvm/include/llvm/Transforms/Instrumentation/InstrProfiling.h |
| llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp |
| llvm/test/Instrumentation/InstrProfiling/linkage.ll |
| llvm/test/Transforms/PGOProfile/associated.ll |
| llvm/include/llvm/Transforms/Instrumentation.h |
| clang/lib/CodeGen/BackendUtil.cpp |
| llvm/test/Transforms/PGOProfile/counter_promo.ll |
| llvm/test/Transforms/PGOProfile/counter_promo_mexits.ll |
Commit
bb6c23b1f50780390eafd73aac1a2a895a8971a4
by listmail[NFC][X86] Avoid redundant work inspecting callee
|
| llvm/lib/Target/X86/X86ISelLowering.cpp |
| llvm/test/CodeGen/X86/x86-no_caller_saved_registers.ll |
| llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll |
| llvm/lib/Target/X86/X86FastISel.cpp |
Commit
9d09db941ff882a0be761e5d3d170a474bf047c8
by listmail[NFC][X86] Use CallBase interface to simplify code
|
| llvm/lib/Target/X86/X86FastISel.cpp |
| llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
59186902555546b9d864065d03eb1c79cb041409
by eschweitz[flang][NFC] Rename complex type.
This change renames the CplxType class to ComplexType.
|
| flang/lib/Optimizer/Dialect/FIRType.cpp |
| flang/lib/Lower/ConvertType.cpp |
| flang/lib/Lower/FIRBuilder.cpp |
| flang/lib/Lower/Mangler.cpp |
| flang/lib/Optimizer/Dialect/FIRDialect.cpp |
| flang/include/flang/Optimizer/Dialect/FIROps.td |
| flang/lib/Lower/IntrinsicCall.cpp |
| flang/lib/Lower/ComplexExpr.cpp |
| flang/lib/Lower/IO.cpp |
| flang/include/flang/Optimizer/Dialect/FIRType.h |
Commit
f1ff6d210a5fb45dc90d063d04b12b9da0ae4110
by rahmanl[obj2yaml, yaml2obj] Use Hex64 for BBAddressMap fields.
This patch let the yaml encoding use Hex64 values for NumBlocks, BB AddressOffset, BB Size, and BB Metadata.
Additionally, it changes the decoded values in elf2yaml to uint64_t to match DataExtractor::getULEB128 return type.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D95767
|
| llvm/include/llvm/ObjectYAML/ELFYAML.h |
| llvm/tools/obj2yaml/elf2yaml.cpp |
| llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml |
Commit
fbd55071788a3e57d2fdf8cad5c79ee45a273019
by Jonas Devlieghere[lldb] Use the host architecture in TestAppleSimulatorOSType.py
|
| lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py |
Commit
46e764a628da81795af3f64bd28970b7bd4115d6
by listmail[x86] introduce no_callee_saved_registers attribute
This is directly analogous to the existing no_caller_saved_registers, but with the opposite intention. A function or call so marked shifts the responsibility of spilling the usual CSRs to it's caller.
An indirect call site and callee which don't agree on the attribute is ill defined.
The motivation for this change is that being able to prune callee saves (without modifying other details of the calling convention) is sometimes useful when generating stubs and adapters. There's no intention to expose this as a source language feature; this is expected to be used by frontends to implement adapters where warranted.
Some specific examples of use cases:
* GC compatible compiled code wants to call an externally defined library function without needing to track pointer values through CSRs.
* debug enabled code wants to call precompiled library which doesn't provide enough information to track CSRs while preserving debug quality in caller.
* adapter stub entering hand written assembler which doesn't follow normal calling conventions.
|
| llvm/lib/Target/X86/X86RegisterInfo.cpp |
| llvm/lib/Target/X86/X86FastISel.cpp |
| llvm/lib/Target/X86/X86ISelLowering.cpp |
| llvm/test/CodeGen/X86/x86-no_callee_saved_registers.ll |
Commit
b545667d0a4e8d3ca7d4789c3c4004b2816c1b84
by atmndp[OpenMP][Libomptarget] Remove possible harmful copy constructor call for RTLsTy
From https://bugs.llvm.org/show_bug.cgi?id=48973, we know that
`std::call_once(PM->RTLs.initFlag, &RTLsTy::LoadRTLs, PM->RTLs)` causes compile
time problems in libstdc++v3 5.3.1. This is because there was a defect in the
standard regarding the `call_once` (LWG 2442). This was fixed in libstdc++ soon
thereafter, but there are likely other standard libraries where this will fail.
By matching this function call with the other one, we fix this bug.
Differential Revision: https://reviews.llvm.org/D95769
|
| openmp/libomptarget/src/interface.cpp |
Commit
87f8a08ce36e5bc72f11129d2cf36b5848f86f63
by mtrofin[Utils] Add a switch controlling prefix warnings in UpdateTestChecks
The switch controls both unused prefix warnings, and warnings about
functions which differ under different runs for a prefix, and, thus, end
up not having asserts for that prefix.
(If the latter case spans to all functions, then the former case kicks
in)
The switch is on by default, and can be disabled.
Differential Revision: https://reviews.llvm.org/D95829
|
| llvm/test/tools/UpdateTestChecks/update_llc_test_checks/common-label-different-bodies.test |
| llvm/utils/UpdateTestChecks/common.py |
Commit
342d4662e1c930bd0a856c6c88d0cde5f106cc81
by ravishankarm[mlir] Add custom directive hooks for printing mixed integer or value operands.
Add printer and parser hooks for a custom directive that allows
parsing and printing of idioms that can represent a list of values
each of which is either an integer or an SSA value. For example in
`subview %source[%offset_0, 1] [4, %size_1] [%stride_0, 3]`
each of the list (which represents offset, size and strides) is a mix
of either statically know integer values or dynamically computed SSA
values. Since this is used in many places adding a custom directive to
parse/print this idiom allows using assembly format on operations
which use this idiom.
Differential Revision: https://reviews.llvm.org/D95773
|
| mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp |
| mlir/lib/Dialect/StandardOps/IR/Ops.cpp |
| mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td |
| mlir/include/mlir/Interfaces/ViewLikeInterface.h |
| mlir/lib/Interfaces/ViewLikeInterface.cpp |
| mlir/test/Dialect/Linalg/invalid.mlir |
| mlir/tools/mlir-tblgen/OpFormatGen.cpp |
| mlir/include/mlir/Dialect/StandardOps/IR/Ops.td |
Commit
41877b82f07224041a2a994f9032332fe01e4d1b
by Matthew.ArsenaultAMDGPU: Fix dbg_value handling when forming soft clause bundles
DBG_VALUES placed between memory instructions would change
codegen. Skip over these and re-insert them after the bundle instead
of giving up on bundling.
|
| llvm/lib/Target/AMDGPU/GCNRegPressure.cpp |
| llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp |
| llvm/test/CodeGen/AMDGPU/soft-clause-dbg-value.mir |
Commit
0fa61304d247a61b151cceac70e805abc69f8c1d
by i[LoopVectorize] Relax a FCmpInst assert to dyn_cast after D95690
The instruction may be `icmp eq i32`. Noticed in an internal Halide+wasm JIT test.
|
| llvm/lib/Analysis/IVDescriptors.cpp |
Commit
98768bab19b27db71f497b0e5d87dfa9e5a0f05a
by i[test] Fix unuses FileCheck prefixes in clang/test/Modules
|
| clang/test/Modules/codegen.test |
| clang/test/Modules/preprocess-nested.cpp |
Commit
3f8dda50cbc89888015b9d2f69db38d9314d6517
by i[test] Fix unuses FileCheck prefixes in lld
|
| lld/test/COFF/wrap-lto-2.ll |
| lld/test/ELF/arm-thumb-interwork-thunk.s |
| lld/test/ELF/lto/amdgcn-oses.ll |
| lld/test/ELF/mips-micro-cross-calls.s |
| lld/test/ELF/partition-notes.s |
Commit
7a37d981d90529a125b425b1ca155da530c3008a
by kazu[llvm] Use pop_back_val (NFC)
|
| llvm/lib/Analysis/BranchProbabilityInfo.cpp |
| llvm/include/llvm/Analysis/SparsePropagation.h |
Commit
094fc4d5cf9b34edcc1034e00ead287a32dd7804
by kazu[TableGen] Use ListSeparator (NFC)
|
| llvm/utils/TableGen/InstrDocsEmitter.cpp |
Commit
b167303b772d1d07fb831b2110cd26d541138bf7
by kazu[TableGen] Use range-based for loops (NFC)
|
| llvm/utils/TableGen/CodeEmitterGen.cpp |
| llvm/utils/TableGen/SubtargetEmitter.cpp |
| llvm/utils/TableGen/CodeGenRegisters.h |
| llvm/utils/TableGen/AsmMatcherEmitter.cpp |
| llvm/utils/TableGen/CodeGenDAGPatterns.cpp |
| llvm/utils/TableGen/DAGISelEmitter.cpp |
Commit
ecb00a77624c94ce38fccf9b4095e026ecf14aed
by nhawes[VFS] Add support to RedirectingFileSystem for mapping a virtual directory to one in the external FS.
Previously file entries in the -ivfsoverlay yaml could map to a file in the
external file system, but directories had to list their contents in the form of
other file entries or directories. Allowing directory entries to map to a
directory in the external file system makes it possible to present an external
directory's contents in a different location and (in combination with the
'fallthrough' option) overlay one directory's contents on top of another.
rdar://problem/72485443
Differential Revision: https://reviews.llvm.org/D94844
|
| clang/test/VFS/Inputs/vfsoverlay-directory-relative.yaml |
| llvm/unittests/Support/VirtualFileSystemTest.cpp |
| clang/test/VFS/Inputs/vfsoverlay-directory.yaml |
| clang/test/VFS/directory.c |
| lldb/source/Host/common/FileSystem.cpp |
| llvm/include/llvm/Support/VirtualFileSystem.h |
| llvm/lib/Support/VirtualFileSystem.cpp |
Commit
0b70c86e2007d3f32968f0a7d9efe8eab3bf0f0a
by kadircetclang-extra: fix incorrect use of std::lock_guard by adding variable name (identified by MSVC [[nodiscard]] error)
`std::lock_guard` is an RAII class that needs a variable name whose scope determines the guard's lifetime. This particular usage lacked a variable name, meaning the guard could be destroyed before the line that it was indented to protect.
This line was identified by building clang with the latest MSVC preview release, which declares the std::lock_guard constructor to be `[[nodiscard]]` to draw attention to such issues.
Reviewed By: kadircet
Differential Revision: https://reviews.llvm.org/D95725
|
| clang-tools-extra/clangd/support/Function.h |
Commit
327196d688585ecc6a4aa7dc1323adb7fe203c55
by i[test] Fix unused FileCheck prefixes in compiler-rt/test
|
| compiler-rt/test/profile/instrprof-value-prof-2.c |
| compiler-rt/test/ubsan/TestCases/Pointer/nullptr-and-nonzero-offset-constants.cpp |
| compiler-rt/test/ubsan/TestCases/Pointer/nullptr-and-nonzero-offset-summary.cpp |
Commit
0426be3df6180747bd68706db87a70580f064f0f
by plotfi[AArch64] Homogeneous Prolog and Epilog Size Optimization
Prologs and epilogs handle callee-save registers and tend to be irregular with
different immediate offsets that are not often handled by the MachineOutliner.
Commit D18619/a5335647d5e8 (combining stack operations) stretched irregularity
further.
This patch tries to emit homogeneous stores and loads with the same offset for
prologs and epilogs respectively. We have observed that this canonicalizes
(homogenizes) prologs and epilogs significantly and results in a greatly
increased chance of outlining, resulting in a code size reduction.
Despite the above results, there are still size wins to be had that the
MachineOutliner does not provide due to the special handling X30/LR. To handle
the LR case, his patch custom-outlines prologs and epilogs in place. It does
this by doing the following:
* Injects HOM_Prolog and HOM_Epilog pseudo instructions during a Prolog and
Epilog Injection Pass.
* Lowers and optimizes said pseudos in a AArchLowerHomogneousPrologEpilog Pass.
* Outlined helpers are created on demand. Identical helpers are merged by the linker.
* An opt-in flag is introduced to enable this feature. Another threshold flag
is also introduced to control the aggressiveness of outlining for application's need.
This reduced an average of 4% of code size on LLVM-TestSuite/CTMark targeting arm64/-Oz.
Differential Revision: https://reviews.llvm.org/D76570
|
| llvm/lib/Target/AArch64/AArch64.h |
| llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp |
| llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-no-helper.ll |
| llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-frame-tail.ll |
| llvm/lib/Target/AArch64/AArch64TargetMachine.cpp |
| llvm/lib/Target/AArch64/AArch64FrameLowering.h |
| llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
| llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-bad-outline.mir |
| llvm/lib/Target/AArch64/AArch64InstrInfo.td |
| llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog.ll |
| llvm/lib/Target/AArch64/CMakeLists.txt |
Commit
21724ddcb7033cb010d57ff1a2d593cd70d462f5
by rob.suderman[MLIR][TOSA] Comparison based elementwise operations for tosa-to-linalg
Comitted log, exp, maximum, minimum, comparison, ceil and floor conversions from TOSA to LinAlg. Support for signless integer and floating point.
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D95839
|
| mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp |
| mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir |
Commit
45db9d4594bdbb4a304c16f6ad61b87c60eeb300
by i[test] Fix unused FileCheck prefixes in lldb
|
| lldb/test/Shell/Reproducer/TestMultipleTargets.test |
Commit
80f539526eec31f03aadd96753648686312b1ad1
by i[test] Default clang/test to FileCheck --allow-unused-prefixes=false
|
| clang/test/Analysis/lit.local.cfg |
| clang/test/OpenMP/lit.local.cfg |
| clang/test/lit.cfg.py |
| clang/test/Driver/lit.local.cfg |
| clang/test/CodeGenCXX/lit.local.cfg |
| clang/test/CodeGen/lit.local.cfg |
Commit
d475030dc28a85e649cdd3dd4e5941ec82227c26
by gil.rapaport[SCEV] Apply loop guards to divisibility tests
Extend applyLoopGuards() to take into account conditions/assumes proving some
value %v to be divisible by D by rewriting %v to (%v / D) * D. This lets the
loop unroller and the loop vectorizer identify more loops as not requiring
remainder loops.
Differential Revision: https://reviews.llvm.org/D95521
|
| llvm/test/Transforms/LoopUnroll/runtime-unroll-assume-no-remainder.ll |
| llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
| llvm/include/llvm/Analysis/ScalarEvolution.h |
| llvm/test/Analysis/ScalarEvolution/trip-multiple-guard-info.ll |
| llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll |
| llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
a59283a74529c74a8ee8682f9acf9d993f7cda08
by i[test] Fix unused FileCheck prefixes in compiler-rt
|
| compiler-rt/test/msan/death-callback.cpp |
| compiler-rt/test/asan/TestCases/asan_update_allocation.cpp |
| compiler-rt/test/ubsan_minimal/TestCases/nullptr-and-nonzero-offset.c |
Commit
86b249c040ca7af31953ef304ac780502f2d285a
by Lang Hames[ORC] Clear unused materializing info entries.
Once a symbol is Ready its MaterializingInfo entry is unused and can be removed
to free up some memory.
|
| llvm/lib/ExecutionEngine/Orc/Core.cpp |
Commit
af6be9a7bb0fca891ec60138608902cd37b9f84f
by i[test] Fix unused FileCheck prefixes in clang-tidy and one llvm/test/Reduce test
|
| clang-tools-extra/test/clang-tidy/checkers/modernize-loop-convert-reverse.cpp |
| llvm/test/Reduce/remove-function-bodies-used-in-globals.ll |
Commit
ab1d977a16c4fd2bdaaac539f8f82006234d7c75
by i[test] Fix unused FileCheck prefixes in test/Reduce
|
| llvm/test/Reduce/remove-unused-declarations.ll |
| llvm/test/Reduce/remove-multiple-use-of-args-in-same-instruction.ll |
| llvm/test/Reduce/remove-multiple-use-of-global-vars-in-same-instruction.ll |
| llvm/test/Reduce/no-replace-intrinsic-callee-with-undef.ll |
| llvm/test/Reduce/remove-function-attributes.ll |
Commit
8f7f2c4211caf724e8319976968995bec1894b96
by plotfiRevert "[AArch64] Homogeneous Prolog and Epilog Size Optimization"
This reverts commit 0426be3df6180747bd68706db87a70580f064f0f.
Reverting due to some expensive-checks failures in tests.
|
| llvm/lib/Target/AArch64/AArch64TargetMachine.cpp |
| llvm/lib/Target/AArch64/CMakeLists.txt |
| llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog.ll |
| llvm/lib/Target/AArch64/AArch64InstrInfo.td |
| llvm/lib/Target/AArch64/AArch64FrameLowering.h |
| llvm/lib/Target/AArch64/AArch64.h |
| llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-frame-tail.ll |
| llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp |
| llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-bad-outline.mir |
| llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
| llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-no-helper.ll |
Commit
6ee1f64a2e828d27a6c20839232b3ac828367123
by shivam98.tkg[NFC][Docs] Fix RAVFrontendAction doc's CMakelists.txt for Shared build
[[ https://clang.llvm.org/docs/RAVFrontendAction.html | Example tutorial ]] giving undefine reference error while building with BUILD_SHARED_LIBS=ON.
Differential Revision: https://reviews.llvm.org/D95737
|
| clang/docs/RAVFrontendAction.rst |
Commit
4553821815ebe3101dd7c8514a5a2b45891b29a6
by craig.topper[SelectionDAG] Prevent scalable vector warning from ComputeNumSignBits on extract_vector_elt on a scalable vector.
|
| llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |
Commit
49c9c3a59e21205aabe48f92b9e53bf666348388
by nicolas.vasilache[mlir][Standard] Extend n-D vector lowering to LLVM to [s|z]exti ops.
[s|z]exti ops do not have the same operand and result type.
As a consequence, the lowering of the n-D vector form needs to be relaxed a bit.
This revision additionally performs a few NFC renamings of variables to make them more intuitive.
Differential Revision: https://reviews.llvm.org/D95760
|
| mlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir |
| mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h |
| mlir/test/Conversion/StandardToLLVM/convert-nd-vector-to-llvmir.mlir |
| mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp |
Commit
6bae5973c476e16dbbc82030d65c7859a6628e89
by aktoon[CSSPGO] Call site prioritized inlining for sample PGO
This change implemented call site prioritized BFS profile guided inlining for sample profile loader. The new inlining strategy maximize the benefit of context-sensitive profile as mentioned in the follow up discussion of CSSPGO RFC. The change will not affect today's AutoFDO as it's opt-in. CSSPGO now defaults to the new FDO inliner, but can fall back to today's replay inliner using a switch (`-sample-profile-prioritized-inline=0`).
Motivation
With baseline AutoFDO, the inliner in sample profile loader only replays previous inlining, and the use of profile is only for pruning previous inlining that turned out to be cold. Due to the nature of replay, the FDO inliner is simple with hotness being the only decision factor. It has the following limitations that we're improving now for CSSPGO.
- It doesn't take inline candidate size into account. Since it's doing replay, the size growth is bounded by previous CGSCC inlining. With context-sensitive profile, FDO inliner is no longer limited by previous inlining, so we need to take size into account to avoid significant size bloat.
- The way it looks at hotness is not accurate. It uses total samples in an inlinee as proxy for hotness, while what really matters for an inline decision is the call site count. This is an unfortunate fall back because call site count and callee entry count are not reliable due to dwarf based correlation, especially for inlinees. Now paired with pseudo-probe, we have accurate call site count and callee's entry count, so we can use that to gauge hotness more accurately.
- It treats all call sites from a block as hot as long as there's one call site considered hot. This is normally true, but since total samples is used as hotness proxy, this transitiveness within block magnifies the inacurate hotness heuristic. With pseduo-probe and the change above, this is no longer an issue for CSSPGO.
New FDO Inliner
Putting all the requirement for CSSPGO together, we need a top-down call site prioritized BFS inliner. Here're reasons why each component is needed.
- Top-down: We need a top-down inliner to better leverage context-sensitive profile, so inlining is driven by accurate context profile, and post-inline is also accurate. This is already implemented in https://reviews.llvm.org/D70655.
- Size Cap: For top-down inliner, taking function size into account for inline decision alone isn't sufficient to control size growth. We also need to explicitly cap size growth because with top-down inlining, we can grow inliner size significantly with large number of smaller inlinees even if each individually passes the cost/size check.
- Prioritize call sites: With size cap, inlining order also becomes important, because if we stop inlining due to size budget limit, we'd want to use budget towards the most beneficial call sites.
- BFS inline: Same as call site prioritization, if we stop inlining due to size budget limit, we want a balanced inline tree, rather than going deep on one call path.
Note that the new inliner avoids repeatedly evaluating same set of call site, so it should help with compile time too. For this reason, we could transition today's FDO inliner to use a queue with equal priority to avoid wasted reevaluation of same call site (TODO).
Speculative indirect call promotion and inlining is also supported now with CSSPGO just like baseline AutoFDO.
Tunings and knobs
I created tuning knobs for size growth/cap control, and for hot threshold separate from CGSCC inliner. The default values are selected based on initial tuning with CSSPGO.
Results
Evaluated with an internal LLVM fork couple months ago, plus another change to adjust hot-threshold cutoff for context profile (will send up after this one), the new inliner show ~1% geomean perf win on spec2006 with CSSPGO, while reducing code size too. The measurement was done using train-train setup, MonoLTO w/ new pass manager and pseudo-probe. Note that this is just a starting point - we hope that the new inliner will open up more opportunity with CSSPGO, but it will certainly take more time and effort to make it fully calibrated and ready for bigger workloads (we're working on it).
Differential Revision: https://reviews.llvm.org/D94001
|
| llvm/lib/Transforms/IPO/SampleContextTracker.cpp |
| llvm/test/Transforms/SampleProfile/Inputs/indirect-call-csspgo.prof |
| llvm/test/Transforms/SampleProfile/csspgo-inline.ll |
| llvm/test/Transforms/SampleProfile/csspgo-inline-icall.ll |
| llvm/test/Transforms/SampleProfile/profile-context-tracker-debug.ll |
| llvm/test/Transforms/SampleProfile/profile-context-tracker.ll |
| llvm/test/Transforms/SampleProfile/pseudo-probe-inline.ll |
| llvm/lib/Transforms/IPO/SampleProfile.cpp |
| llvm/test/Transforms/SampleProfile/csspgo-inline-debug.ll |
| llvm/include/llvm/Transforms/IPO/SampleContextTracker.h |
Commit
e7f9a834996f40be8dc46a0b059aa850f1f4ef05
by craig.topper[RISCV] Replace NoX0 SDNodeXForm with a ComplexPattern to do the selection of the VL operand.
I think this is a more standard way of doing this.
Reviewed By: rogfer01
Differential Revision: https://reviews.llvm.org/D95833
|
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
| llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
| llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h |
Commit
62af0305b7cc0238a8f0bf138c1fb8745b1041d0
by thomas.symallaAdded clamp i64 to i16 global isel pattern.
|
| llvm/lib/Target/AMDGPU/AMDGPUCombine.td |
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
| llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
| llvm/test/CodeGen/AMDGPU/GlobalISel/clampi64toi16.ll |
Commit
ec043967ecb4bbfbf3bcbdad4055e9ba8e5dc21b
by thomas.symallaclang-format
|
| llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
d722924f20918fd29d342cb2be50393d0fa9347f
by thomas.symallaAdded comments.
|
| llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
fce3230be2c84401598e8ff5ce470e7509ecf75b
by thomas.symallaAdded early exit.
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
d41b7fa9bf80e09a52aa0d392db94a7b971044c9
by thomas.symallaRenames
|
| llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
| llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll |
| llvm/test/CodeGen/AMDGPU/GlobalISel/clampi64toi16.ll |
Commit
88a832aef1a696178c2ec3cb93f913ac937c4f5e
by thomas.symallaRefactored the pattern matching.
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
| llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
Commit
dae85e4671416490c6aaf2bac88c3ce1d74cc4d6
by thomas.symallaFixed the lit tests and a bug in the implementation.
|
| llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll |
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
9a8da909f192e576e6aabc0ee5343bfff6db1d69
by thomas.symallaReverted unintended git-format change.
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
f2ef2fbc692ed17bdb012a88cf0435dcd243cff8
by thomas.symallaRenamed identifiers in lit
|
| llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll |
Commit
cdfd9b3bf52e95705935699de90d3e3be7b33de4
by thomas.symallaMove Combiner to PreLegalize step
|
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
| llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
| llvm/lib/Target/AMDGPU/AMDGPUCombine.td |
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
| llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll |
Commit
3a46502264b6a53764e28d55e990f714a31cba70
by thomas.symallaMove step to PreLegalizer
|
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
| llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll |
Commit
79e729bdf14c884f13aff010ac9509370676aba7
by thomas.symallaFixed tests.
|
| llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll |
Commit
7b2e701906c66d765b60f25ee746c713788ec714
by thomas.symallaCode changes yielded from review.
|
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
Commit
ecbed4e0ab3ebc2388a35563e756a62c2d53b24c
by thomas.symallaResolve formatting changes.
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
| diff.txt |
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
| llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
Commit
bcd6c2d2031af50ffe9b357e839b8a9dd4d0ddd6
by thomas.symallaUpdating formatting changes.
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
7d24026ed2b7493f38e0b6b9d1bfb38db7998171
by thomas.symallaFormatting changes.
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
52bfb50145ab1257d53a2909aeb0c8ec81e511fd
by thomas.symallaFormatting changes
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
6604d81e1bb349597e8c1b919303a2efb4c9ba19
by thomas.symallaAdded and used new target pseudo for v_cvt_pk_i16_i32, changes due to code review.
|
| llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll |
| llvm/lib/Target/AMDGPU/AMDGPUGISel.td |
| llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td |
| llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
| llvm/lib/Target/AMDGPU/SIInstructions.td |
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
Commit
c781c254124445259fbea3049cd32544afca1cb5
by thomas.symallaImplemented a MED3_S32 GIR opcode.
|
| llvm/lib/Target/AMDGPU/SIInstructions.td |
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
| llvm/lib/Target/AMDGPU/AMDGPUGISel.td |
| llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
Commit
fa3e840d3d7d14fe131b0df0db359025b9446b9e
by thomas.symallaRemoved the generic virtual register creations. Reworked the tests.
|
| llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll |
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
Commit
602896b9d2f27b1ea0fd1f78db51fee25d4f2de0
by thomas.symallaRenamed med3 opcode, removed superfluous copy.
|
| llvm/lib/Target/AMDGPU/AMDGPUGISel.td |
| llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
| llvm/lib/Target/AMDGPU/SIInstructions.td |
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
Commit
e630dd476ca719cacdd089a88be5faa387f65ec9
by thomas.symallaAdded missing includes.
|
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
Commit
09508d28496069169a8538c96a16b665187db44f
by thomas.symallaReverted whitespace changes.
Differential Revision: https://reviews.llvm.org/D90968
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
| llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h |
Commit
6c85e98f06426c2a1b33e0e862edc1afc0810d5d
by thomas.symallaFixed includes.
|
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
Commit
faeed774d15734618a8928c3d17ce2f41bf607a3
by thomas.symallaFixed includes.
Differential Revision: https://reviews.llvm.org/D93708
|
| llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp |
Commit
508329922dad8dd8b0eef267a6b72f3ac2440485
by thomas.symallaRemoved Diff file.
Differential Revision: https://reviews.llvm.org/D93708
|
| diff.txt |
Commit
9a03058d6322edb8abc803ba3e436cc62647d979
by aktoon[CSSPGO] Factor out common part for CSSPGO inline and AFDO inline
Refactoring SampleProfileLoader::inlineHotFunctions to use helpers from CSSPGO inlining and reduce similar code in the inlining loop, plus minor cleanup for AFDO path.
Test Plan:
Differential Revision: https://reviews.llvm.org/D95024
|
| llvm/lib/Transforms/IPO/SampleProfile.cpp |
| llvm/test/Transforms/SampleProfile/remarks.ll |
| llvm/test/Transforms/SampleProfile/pseudo-probe-inline.ll |
Commit
09cd849fdef2b2d3de2d0b0a5c512100957e0ef6
by aktoonFix build break from D95024
|
| llvm/lib/Transforms/IPO/SampleProfile.cpp |
Commit
fc22de82182e05794123be70df5dfe15600c02b4
by sebastian.neubauer[AMDGPU] Clarify calling conv about inactive lanes
So far, it was not specified what happens with the VGPRs of inactive
lanes when functions are called. This patch explicitely mentions that
the VGPR values of inactive lanes need to be preserved for all
registers.
This describes the current behavior, as only active lanes of registers
are saved to scratch. Also, as the multi-lane nature of VGPRs is not
properly modeled, we cannot determine the live VGPRs from inactive lanes
at calls. So we cannot save them, even if we intended to do so.
Differential Revision: https://reviews.llvm.org/D95610
|
| llvm/docs/AMDGPUUsage.rst |
Commit
b91afa474e124514fe7bd3f399af0cbbcbe961fc
by sebastian.neubauer[AMDGPU] Mark epilog restores as frame-destroy
I guess instructions were marked as frame-setup by accident, they are
restores as part of the epilog.
Differential Revision: https://reviews.llvm.org/D95783
|
| llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir |
| llvm/lib/Target/AMDGPU/SIFrameLowering.cpp |
| llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir |
| llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir |
| llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll |
Commit
0479c53b6c5224c16bdc78cb014e76c0b0dbc6f9
by hans[dllimport] Honor always_inline when deciding whether a dllimport function should be available for inlining (PR48925)
Normally, Clang will not make dllimport functions available for inlining
if they reference non-imported symbols, as this can lead to confusing
link errors. But if the function is marked always_inline, the user
presumably knows what they're doing and the attribute should be honored.
Differential revision: https://reviews.llvm.org/D95673
|
| clang/lib/CodeGen/CodeGenModule.cpp |
| clang/test/CodeGenCXX/dllimport.cpp |
Commit
0409eb287414b71cfdcda13796c93794b71ea6d4
by zinenko[mlir] Keep track of region signature conversions as argument replacements
In dialect conversion, signature conversions essentially perform block argument
replacement and are added to the general value remapping. However, the replaced
values were not tracked, so if a signature conversion was rolled back, the
construction of operand lists for the following patterns could have obtained
block arguments from the mapping and give them to the pattern leading to
use-after-free. Keep track of signature conversions similarly to normal block
argument replacement, and erase such replacements from the general mapping when
the conversion is rolled back.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D95688
|
| mlir/test/lib/Dialect/Test/TestPatterns.cpp |
| mlir/test/lib/Dialect/Test/TestOps.td |
| mlir/lib/Transforms/Utils/DialectConversion.cpp |
| mlir/test/Transforms/test-legalize-type-conversion.mlir |
Commit
679ef22f2e553e73eda43c45d4361256c4524c00
by benny.kraFold one-use variable into assert. NFCI.
Avoids a warning in Release builds.
|
| llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
Commit
d4d4ceeb8f3be67be94781ed718ceb103213df74
by david.sherwood[SVE][LoopVectorize] Add masked load/store and gather/scatter support for SVE
This patch updates IRBuilder::CreateMaskedGather/Scatter to work
with ScalableVectorType and adds isLegalMaskedGather/Scatter functions
to AArch64TargetTransformInfo. In addition I've fixed up
isLegalMaskedLoad/Store to return true for supported scalar types,
since this is what the vectorizer asks for.
In LoopVectorize.cpp I've changed
LoopVectorizationCostModel::getInterleaveGroupCost to return an invalid
cost for scalable vectors, since currently this relies upon using shuffle
vector for reversing vectors. In addition, in
LoopVectorizationCostModel::setCostBasedWideningDecision I have assumed
that the cost of scalarising memory ops is infinitely expensive.
I have added some simple masked load/store and gather/scatter tests,
including cases where we use gathers and scatters for conditional invariant
loads and stores.
Differential Revision: https://reviews.llvm.org/D95350
|
| llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
| llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h |
| llvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll |
| llvm/lib/IR/IRBuilder.cpp |
| llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll |
Commit
760e6c4ce58324856d8f105b37bb974564e0f170
by andrzej.warzynski[flang][driver] Disallow non-existent input files in the frontend driver
This patch adds a check that verifies that the input file used when
calling the frontend driver (i.e. `flang-new -fc1`) actually exists.
This was not required for the compiler driver, `flang-new`, as that's
already handled in libclangDriver.
Once all input/output file management is moved to the driver, we should
also check that for input from `stdin` the corresponding file descriptor
was successfully acquired.
This patch also makes sure that the default action in the frontend is
`ParseSyntaxOnly`. This is consistent with Clang. Before this change
`flang-new -fc1` would do nothing, which makes testing changes like the
one introduced here a bit tricky.
Reviewed By: SouraVX
Differential Revision: https://reviews.llvm.org/D95127
|
| flang/test/Flang-Driver/missing-input.f90 |
| flang/lib/Frontend/CompilerInvocation.cpp |
| flang/lib/Frontend/FrontendAction.cpp |
Commit
64421988e3958b19a8db6d29433f62f3db2fdb9a
by david.green[ARM] Regenerate LowOverheadLoops mir tests. NFC
|
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix-debug.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-prev-iteration.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/out-of-range-cbz.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/multiblock-massive.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-def.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-chain.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-while.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-mov.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/end-positive-offset.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/size-limit.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/massive.mir |
Commit
3a65ec4bf96bccafdb3524f116844ebdd789c76a
by akuegelRevert "Fix build break from D95024"
This reverts commit 09cd849fdef2b2d3de2d0b0a5c512100957e0ef6.
|
| llvm/lib/Transforms/IPO/SampleProfile.cpp |
Commit
48ca6da9d2f534752f5a5263a6209257149dba7d
by akuegelRevert "[CSSPGO] Factor out common part for CSSPGO inline and AFDO inline"
This reverts commit 9a03058d6322edb8abc803ba3e436cc62647d979.
|
| llvm/test/Transforms/SampleProfile/pseudo-probe-inline.ll |
| llvm/test/Transforms/SampleProfile/remarks.ll |
| llvm/lib/Transforms/IPO/SampleProfile.cpp |
Commit
48230355e930c592ec105ed71963459671c54a42
by david.green[ARM] Remove DLS lr, lr
A DLS lr, lr instruction only moves lr to itself. It need not be emitted
on it's own to save a instruction in the loop preheader.
Differential Revision: https://reviews.llvm.org/D78916
|
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-guards.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/vaddv.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-8.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-2.mir |
| llvm/test/Transforms/HardwareLoops/ARM/calls-codegen.ll |
| llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll |
| llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-liveout-lsr-shift.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/lstp-insertion-position.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-start-after-def.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-16.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir |
| llvm/test/CodeGen/Thumb2/mve-float32regloops.ll |
| llvm/test/CodeGen/Thumb2/mve-shifts-scalar.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll |
| llvm/test/CodeGen/Thumb2/mve-float16regloops.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-1.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredload.ll |
| llvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll |
| llvm/test/CodeGen/Thumb2/mve-postinc-distribute.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-store.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir |
| llvm/test/Transforms/HardwareLoops/ARM/structure.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp16-reduce.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/multi-block-cond-iter-count.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/inloop-vpnot-3.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll |
| llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/skip-debug.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-remove-loop-update.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll |
| llvm/test/CodeGen/Thumb2/mve-vabdus.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/constbound.ll |
| llvm/test/CodeGen/Thumb2/aligned-nonfallthrough.ll |
| llvm/test/CodeGen/Thumb2/mve-nounrolledremainder.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/unrolled-and-vector.mir |
| llvm/test/Transforms/HardwareLoops/ARM/simple-do.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/non-masked-load.mir |
| llvm/test/CodeGen/Thumb2/mve-fp16convertloops.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/remat-vctp.ll |
| llvm/test/CodeGen/Thumb2/mve-vldst4.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll |
| llvm/test/CodeGen/Thumb2/mve-gather-scatter-ptr-address.ll |
| llvm/test/CodeGen/Thumb2/mve-vldshuffle.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/move-def-before-start.mir |
| llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll |
| llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/remove-elem-moves.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-blocks.mir |
| llvm/test/CodeGen/Thumb2/mve-pred-threshold.ll |
| llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/incorrect-sub-32.mir |
| llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/minloop.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/ctlz-non-zeros.mir |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-chain-store.mir |
| llvm/test/CodeGen/Thumb2/active_lane_mask.ll |
Commit
dc00c96b2d1bcae56ef598b614ba65a1cc26c4de
by sven.vanhaastregt[OpenCL] Change extension handling for -fdeclare-opencl-builtins
Until now, the `-fdeclare-opencl-builtins` option behaved differently
compared to inclusion of `opencl-c.h`: builtins that are part of an
extension were only available if the extension was enabled using the
corresponding pragma.
Builtins that belong to an extension are guarded using a preprocessor
macro (that is named after the extension) in `opencl-c.h`. Align the
behaviour of `-fdeclare-opencl-builtins` with this.
Co-authored-by: Anastasia Stulova
Differential Revision: https://reviews.llvm.org/D95616
|
| clang/test/SemaOpenCL/fdeclare-opencl-builtins.cl |
| clang/lib/Sema/SemaLookup.cpp |
Commit
4d904776a77aa80342c65cf72a962920cc9d1fa9
by llvm-dev[X86][AVX] Add missing VEX_WIG tags from VPACKUSDW/VPHSUBD/VPCMPISTRI/VPCMPISTRM/VPCMPESTRI/VPCMPESTRM
Fixes PR48877
Differential Revision: https://reviews.llvm.org/D95801
|
| llvm/test/MC/Disassembler/X86/x86-64-avx.txt |
| llvm/test/MC/Disassembler/X86/x86-64-avx2.txt |
| llvm/lib/Target/X86/X86InstrSSE.td |
Commit
0a2a260aab177bfbdef5829ea16e39323ce50916
by nicolas.vasilache[mlir][Linalg] Refactor Linalg vectorization for better reuse and extensibility.
This revision unifies Linalg vectorization and paves the way for vectorization of Linalg ops with mixed-precision operations.
The new algorithm traverses the ops in the linalg block in order and avoids recursion.
It uses a BlockAndValueMapping to keep track of vectorized operations.
The revision makes the following modifications but is otherwise NFC:
1. vector.transfer_read are created eagerly and may appear in a different order than the original order.
2. a more progressive vectorization to vector.contract results in only the multiply operation being converted to `vector.contract %a, %b, %zero`, where `%zero` is a
constant of the proper type. Later vector canonicalizations are assumed to rewrite vector.contract %a, %b, %zero + add to a proper accumulate form.
Differential revision: https://reviews.llvm.org/D95797
|
| mlir/test/Dialect/Linalg/vectorization.mlir |
| mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp |
Commit
94fedd266125a5425aa33e11332bf414f0b6dc35
by andrew.ng[X86] Fix disassembly of x86-64 GDTLS code sequence
For x86-64 the REX.w prefix takes precedence over any other size
override (i.e. 0x66). Therefore, for x86-64 when REX.w is present set
'hasOpSize' to false to ensure that any size override is ignored.
Fixes PR48901.
Differential Revision: https://reviews.llvm.org/D95682
|
| llvm/test/MC/Disassembler/X86/x86-64.txt |
| llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp |
| llvm/test/tools/llvm-objdump/X86/disassemble-gdtls.s |
Commit
d46a6b3d55e601705184c1f819bd1f498a648ce7
by llvm-dev[X86][AVX512] Support variable-index vector insertion on AVX512 targets (PR47924)
With predicate masks, AVX512 can efficiently perform variable-index vector insertion with 2 broadcasts + 1 comparison, avoiding a lot of aliased memory traffic.
Differential Revision: https://reviews.llvm.org/D95779
|
| llvm/test/CodeGen/X86/avx512-insert-extract.ll |
| llvm/lib/Target/X86/X86ISelLowering.cpp |
| llvm/test/CodeGen/X86/insertelement-var-index.ll |
Commit
586df38478b2bf2a85128e72a5300da9b1b09a5e
by dmitry.preobrazhensky[AMDGPU][MC] Corrected parsing of optional modifiers
Fixed bugs in parsing of "no*" modifiers and improved errors handling.
See https://bugs.llvm.org/show_bug.cgi?id=41282.
Differential Revision: https://reviews.llvm.org/D95675
|
| llvm/test/MC/AMDGPU/flat-global.s |
| llvm/test/MC/AMDGPU/vop3-modifiers.s |
| llvm/test/MC/AMDGPU/gfx9_err_pos.s |
| llvm/test/MC/AMDGPU/vop3-modifiers-err.s |
| llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp |
| llvm/test/MC/AMDGPU/gfx8_err_pos.s |
| llvm/test/MC/AMDGPU/flat-scratch-instructions.s |
Commit
94f540cc7ceb98a25a62f04647ce30974a33a3d6
by benny.kra[mlir][Linalg] Fix unused variable warning in Release builds. NFC.
|
| mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp |
Commit
fbeff2ec2bc6e44b92931207b0063f83ff7a3b3a
by usx[clangd] Report only decl of overridding method in xref.
See: https://github.com/clangd/clangd/issues/668
```
struct A { virtual void foo() = 0; };
struct B : A { void foo() override; };
```
Find refs on `A::foo()` will show:
- decls of `A::foo()`
- decls of `B::foo()`
- refs to `A::foo()`
- no refs to `B::foo()`.
Differential Revision: https://reviews.llvm.org/D95812
|
| clang-tools-extra/clangd/XRefs.h |
| clang-tools-extra/clangd/unittests/XRefsTests.cpp |
| clang-tools-extra/clangd/XRefs.cpp |
Commit
f2b4cc91e0830835c251e0525322effda8522b1c
by thakisRevert "[test] Default clang/test to FileCheck --allow-unused-prefixes=false"
This reverts commit 80f539526eec31f03aadd96753648686312b1ad1.
Many test failures on mac: http://45.33.8.238/macm1/2772/summary.html
One on win: http://45.33.8.238/win/32442/summary.html
|
| clang/test/Analysis/lit.local.cfg |
| clang/test/CodeGenCXX/lit.local.cfg |
| clang/test/lit.cfg.py |
| clang/test/OpenMP/lit.local.cfg |
| clang/test/CodeGen/lit.local.cfg |
| clang/test/Driver/lit.local.cfg |
Commit
8fce22888bd2aec9eadf8a0f229bfd0dbe06460d
by nicolas.vasilache[mlir][Linalg] Fix and properly test CodegenStrategy API
Fix a bug that was introduced where calling the codegen strategy with actual concrete C++ Op types did not trigger the expected behavior.
Also introduce a test for the behavior that was missing.
Differential Revision: https://reviews.llvm.org/D95863
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| mlir/test/lib/Transforms/TestLinalgCodegenStrategy.cpp |
| mlir/include/mlir/Dialect/Linalg/Transforms/CodegenStrategy.h |
| mlir/test/Dialect/Linalg/codegen-strategy.mlir |
Commit
d6a06365cf12bebe20a7d65cf3894608efc089b4
by steveire[ASTMatchers] Fix matching after generic top-level matcher
With a matcher like
expr(anyOf(integerLiteral(equals(42)), unless(expr())))
and code such as
struct B {
B(int);
};
B func1() { return 42; }
the top-level expr() would match each of the nodes which are not spelled
in the source and then ignore-traverse to match the integerLiteral node.
This would result in multiple results reported for the integerLiteral.
Fix that by only running matching logic on nodes which are not skipped
with the top-level matcher.
Differential Revision: https://reviews.llvm.org/D95735
|
| clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp |
| clang/lib/ASTMatchers/ASTMatchFinder.cpp |
Commit
00da3227882654533efe9ae62023e367e4a88e29
by sander.desmalenNFC: Migrate SimpleLoopUnswitch to work on InstructionCost
This patch migrates cost values and arithmetic to work on InstructionCost.
When the interfaces to TargetTransformInfo are changed, any InstructionCost
state will propagate naturally.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D95352
|
| llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp |
Commit
3d3ca8f8ebc4a7e50e1bb1f6eb6a92056a69fd71
by sander.desmalenNFC: Migrate SpeculateAroundPHIs to work on InstructionCost
This patch migrates cost values and arithmetic to work on InstructionCost.
When the interfaces to TargetTransformInfo are changed, any InstructionCost
state will propagate naturally.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: ctetreau
Differential Revision: https://reviews.llvm.org/D95353
|
| llvm/lib/Transforms/Scalar/SpeculateAroundPHIs.cpp |
Commit
0f2be195d5e5fc79d28692266eae226cd42678b0
by Raphael IsemannRevert "[lldb] Use current execution context in SBDebugger"
This reverts commit 754ab803b8dc659e3645d369d1b5d6d2f97be29e.
As pointed out in https://reviews.llvm.org/D95761, this patch could lead to
having the wrong execution context in some situations (thanks Jim!).
D92164 is addressing the same issue and will replace this patch, so I'll
revert this one.
|
| lldb/source/API/SBDebugger.cpp |
| lldb/test/API/python_api/debugger/TestDebuggerAPI.py |
Commit
8c2e075c2cee76a4ede05b44b4e269264ef62296
by llvm-dev[X86][SSE] LowerINSERT_VECTOR_ELT - pull out repeated EltSizeInBits calls. NFCI.
|
| llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
c72257563347b611733b6744cefc0bf49bab4f8d
by david.green[ARM] Select VINS from vector inserts
This patch adds tablegen patterns for pairs of i16/f16 insert/extracts.
If we are inserting into two adjacent vector lanes (0 and 1 for
example), we can use either a vmov;vins or vmovx;vins to insert the pair
together, avoiding a round-trip from GRP registers. This is quite a
large patterns with a number of EXTRACT_SUBREG/INSERT_SUBREG/
COPY_TO_REGCLASS nodes, but hopefully as most of those become copies all
that will be cleaned up by further optimizations.
The VINS pattern was also adjusted to allow it to represent that it is
inserting into the top half of an existing register.
Differential Revision: https://reviews.llvm.org/D95381
|
| llvm/test/CodeGen/Thumb2/mve-minmax.ll |
| llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll |
| llvm/test/CodeGen/Thumb2/mve-fmas.ll |
| llvm/test/CodeGen/Thumb2/mve-vst4.ll |
| llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll |
| llvm/test/CodeGen/Thumb2/mve-vmovn.ll |
| llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll |
| llvm/test/CodeGen/Thumb2/mve-shufflemov.ll |
| llvm/test/CodeGen/Thumb2/mve-vld3.ll |
| llvm/test/CodeGen/Thumb2/mve-vst2.ll |
| llvm/test/CodeGen/Thumb2/mve-fmath.ll |
| llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll |
| llvm/test/CodeGen/Thumb2/mve-vld2.ll |
| llvm/test/CodeGen/Thumb2/mve-vcvt.ll |
| llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll |
| llvm/test/CodeGen/Thumb2/mve-simple-arith.ll |
| llvm/test/CodeGen/Thumb2/mve-vldst4.ll |
| llvm/test/CodeGen/Thumb2/mve-shuffle.ll |
| llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll |
| llvm/test/CodeGen/Thumb2/mve-gather-ind16-scaled.ll |
| llvm/test/CodeGen/Thumb2/mve-frint.ll |
| llvm/lib/Target/ARM/ARMInstrVFP.td |
| llvm/lib/Target/ARM/ARMInstrMVE.td |
| llvm/test/CodeGen/Thumb2/mve-vcmpf.ll |
| llvm/test/CodeGen/Thumb2/mve-div-expand.ll |
| llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll |
| llvm/test/CodeGen/Thumb2/mve-vst3.ll |
| llvm/test/CodeGen/Thumb2/mve-vld4.ll |
Commit
467a045601430c81e1a7f41f6a134e751f17df55
by steveire[ASTMatchers] Add matchers for decomposition decls
Differential Revision: https://reviews.llvm.org/D95739
|
| clang/lib/ASTMatchers/Dynamic/Registry.cpp |
| clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp |
| clang/include/clang/ASTMatchers/ASTMatchers.h |
| clang/docs/LibASTMatchersReference.html |
Commit
a8105b3766e4195ca2390cd0714e07406bc8a4a5
by marek.kurdej[clang-format] Add case aware include sorting.
Adds an option to [clang-format] which sorts headers in an alphabetical manner using case only for tie-breakers. The options is off by default in favor of the current ASCIIbetical sorting style.
Reviewed By: MyDeveloperDay, curdeius, HazardyKnusperkeks
Differential Revision: https://reviews.llvm.org/D95017
|
| clang/docs/ClangFormatStyleOptions.rst |
| clang/include/clang/Format/Format.h |
| clang/unittests/Format/SortIncludesTest.cpp |
| clang/unittests/Format/FormatTest.cpp |
| clang/tools/clang-format/ClangFormat.cpp |
| clang/lib/Format/Format.cpp |
| clang/unittests/Format/SortImportsTestJava.cpp |
| clang/docs/ReleaseNotes.rst |
Commit
c4fe29e0e5b6f637d12997bbd2b9c7634ae5598f
by david.green[ARM] Extra shuffle tests. NFC
|
| llvm/test/CodeGen/Thumb2/mve-shuffle.ll |
Commit
4f1320b77d1780dd7532f8ca8b123c13ab55bf1a
by Tom.WeaverRevert "[InstrProfiling] Use !associated metadata for counters, data and values"
This reverts commit df3e39f60b356ca9dbfc11e96e5fdda30afa7acb.
introduced failing test instrprof-gc-sections.c
causing build bot to fail:
http://lab.llvm.org:8011/#/builders/53/builds/1184
|
| llvm/include/llvm/Transforms/Instrumentation.h |
| llvm/test/Instrumentation/InstrProfiling/icall.ll |
| llvm/test/Transforms/PGOProfile/counter_promo_mexits.ll |
| compiler-rt/test/profile/instrprof-gc-sections.c |
| llvm/include/llvm/Transforms/Instrumentation/InstrProfiling.h |
|
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