FailedChanges

Summary

  1. [X86] Enable isel to fold broadcast loads that have been bitcasted from FP into a vpternlog.
  2. [X86] Move bitselect matching to vpternlog into X86ISelDAGToDAG.cpp This allows us to reduce the use count on the condition node before the match. This enables load folding for that operand without relying on the peephole pass. This will be improved on for broadcast load folding in a subsequent commit. This still requires a bunch of isel patterns for vXi16/vXi8 types though.
  3. [X86] Enable canonicalizeBitSelect for AVX512 since we can use VPTERNLOG now.
  4. [X86] Match (or (and A, B), (andn (A, C))) to VPTERNLOG with AVX512. This uses a similar isel pattern as we used for vpcmov with XOP.
Revision 373157 by ctopper:
[X86] Enable isel to fold broadcast loads that have been bitcasted from FP into a vpternlog.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86InstrAVX512.tdllvm.src/lib/Target/X86/X86InstrAVX512.td
The file was modified/llvm/trunk/test/CodeGen/X86/vec-copysign-avx512.llllvm.src/test/CodeGen/X86/vec-copysign-avx512.ll
Revision 373156 by ctopper:
[X86] Move bitselect matching to vpternlog into X86ISelDAGToDAG.cpp

This allows us to reduce the use count on the condition node before
the match. This enables load folding for that operand without
relying on the peephole pass. This will be improved on for
broadcast load folding in a subsequent commit.

This still requires a bunch of isel patterns for vXi16/vXi8 types
though.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cppllvm.src/lib/Target/X86/X86ISelDAGToDAG.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86InstrAVX512.tdllvm.src/lib/Target/X86/X86InstrAVX512.td
The file was modified/llvm/trunk/test/CodeGen/X86/combine-bitselect.llllvm.src/test/CodeGen/X86/combine-bitselect.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vec-copysign-avx512.llllvm.src/test/CodeGen/X86/vec-copysign-avx512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-128.llllvm.src/test/CodeGen/X86/vector-fshl-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-256.llllvm.src/test/CodeGen/X86/vector-fshl-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-512.llllvm.src/test/CodeGen/X86/vector-fshl-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-rot-128.llllvm.src/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-rot-256.llllvm.src/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-rot-512.llllvm.src/test/CodeGen/X86/vector-fshl-rot-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-128.llllvm.src/test/CodeGen/X86/vector-fshr-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-256.llllvm.src/test/CodeGen/X86/vector-fshr-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-512.llllvm.src/test/CodeGen/X86/vector-fshr-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-rot-128.llllvm.src/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-rot-256.llllvm.src/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-rot-512.llllvm.src/test/CodeGen/X86/vector-fshr-rot-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-rotate-256.llllvm.src/test/CodeGen/X86/vector-rotate-256.ll
Revision 373155 by ctopper:
[X86] Enable canonicalizeBitSelect for AVX512 since we can use VPTERNLOG now.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cppllvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/combine-bitselect.llllvm.src/test/CodeGen/X86/combine-bitselect.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vec-copysign-avx512.llllvm.src/test/CodeGen/X86/vec-copysign-avx512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-128.llllvm.src/test/CodeGen/X86/vector-fshl-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-256.llllvm.src/test/CodeGen/X86/vector-fshl-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-512.llllvm.src/test/CodeGen/X86/vector-fshl-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-rot-128.llllvm.src/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-rot-256.llllvm.src/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-rot-512.llllvm.src/test/CodeGen/X86/vector-fshl-rot-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-128.llllvm.src/test/CodeGen/X86/vector-fshr-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-256.llllvm.src/test/CodeGen/X86/vector-fshr-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-512.llllvm.src/test/CodeGen/X86/vector-fshr-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-rot-128.llllvm.src/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-rot-256.llllvm.src/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-rot-512.llllvm.src/test/CodeGen/X86/vector-fshr-rot-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-rotate-128.llllvm.src/test/CodeGen/X86/vector-rotate-128.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-rotate-256.llllvm.src/test/CodeGen/X86/vector-rotate-256.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-rotate-512.llllvm.src/test/CodeGen/X86/vector-rotate-512.ll
Revision 373154 by ctopper:
[X86] Match (or (and A, B), (andn (A, C))) to VPTERNLOG with AVX512.

This uses a similar isel pattern as we used for vpcmov with XOP.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86InstrAVX512.tdllvm.src/lib/Target/X86/X86InstrAVX512.td
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-512.llllvm.src/test/CodeGen/X86/vector-fshl-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshl-rot-512.llllvm.src/test/CodeGen/X86/vector-fshl-rot-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-512.llllvm.src/test/CodeGen/X86/vector-fshr-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-fshr-rot-512.llllvm.src/test/CodeGen/X86/vector-fshr-rot-512.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-rotate-512.llllvm.src/test/CodeGen/X86/vector-rotate-512.ll