FailedChanges

Summary

  1. [OCaml] Handle nullptr in Llvm.global_initializer LLVMGetInitializer returns nullptr in case there is no initializer. There is not much that can be done with nullptr in OCaml, not even test if it is null. Also, there does not seem to be a C or OCaml API to test if there is an initializer. So this diff changes Llvm.global_initializer to return an option. Differential Revision: https://reviews.llvm.org/D65195 Reviewed by: whitequark Authored by: kren1
  2. AMDGPU/GlobalISel: Select s1 src G_SITOFP/G_UITOFP
  3. Remove a undefined constructor introduced by r373244.
  4. AMDGPU/GlobalISel: Add support for init.exec intrinsics TThe existing wave32 behavior seems broken and incomplete, but this reproduces it.
  5. AMDGPU/GlobalISel: Allow scc/vcc alternative mappings for s1 constants
  6. GlobalISel: Handle llvm.read_register SelectionDAG has a bunch of machinery to defer this to selection time for some reason. Just directly emit a copy during IRTranslator. The x86 usage does somewhat questionably check hasFP, which could depend on the whole function being at minimum translated. This does lose the convergent bit if the callsite had it, which may be a problem. We also lose that in general for intrinsics, which may also be a problem.
  7. AMDGPU/GlobalISel: Avoid creating shift of 0 in arg lowering This is sort of papering over the fact that we don't run a combiner anywhere, but avoiding creating 2 instructions in the first place is easy.
  8. TLI: Remove DAG argument from getRegisterByName Replace with the MachineFunction. X86 is the only user, and only uses it for the function. This removes one obstacle from using this in GlobalISel. The other is the more tolerable EVT argument. The X86 use of the function seems questionable to me. It checks hasFP, before frame lowering.
  9. [llvm-readobj/llvm-readelf] Delete --arm-attributes (alias for --arch-specific) D68110 added --arch-specific (supported by GNU readelf) and made --arm-attributes an alias for it. The tests were later migrated to use --arch-specific. Note, llvm-readelf --arch-specific currently just uses llvm-readobj style output for ARM attributes. The readelf-style output is not implemented. Reviewed By: compnerd, kongyi, rupprecht Differential Revision: https://reviews.llvm.org/D68196
  10. [X86] Add test case to show missed opportunity to shrink a constant index to a gather in order to avoid splitting. Also add a test case for an index that could be shrunk, but would create a narrow type. We can go ahead and do it we just need to be before type legalization. Similar test cases for scatter as well.
  11. Don't elide the use of the thread wrapper for a thread_local constinit variable with non-trivial destruction. We still need to invoke the thread wrapper to trigger registration of the destructor call on thread shutdown.
  12. AMDGPU/GlobalISel: Select G_UADDO/G_USUBO
Revision 373299 by hiraditya:
[OCaml] Handle nullptr in Llvm.global_initializer

LLVMGetInitializer returns nullptr in case there is no
initializer. There is not much that can be done with nullptr in OCaml,
not even test if it is null. Also, there does not seem to be a C or
OCaml API to test if there is an initializer. So this diff changes
Llvm.global_initializer to return an option.

Differential Revision: https://reviews.llvm.org/D65195
Reviewed by: whitequark
Authored by: kren1
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/bindings/ocaml/llvm/llvm.mlllvm.src/bindings/ocaml/llvm/llvm.ml
The file was modified/llvm/trunk/bindings/ocaml/llvm/llvm.mlillvm.src/bindings/ocaml/llvm/llvm.mli
The file was modified/llvm/trunk/bindings/ocaml/llvm/llvm_ocaml.cllvm.src/bindings/ocaml/llvm/llvm_ocaml.c
Revision 373298 by arsenm:
AMDGPU/GlobalISel: Select s1 src G_SITOFP/G_UITOFP
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cppllvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.hllvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cppllvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIInstructions.tdllvm.src/lib/Target/AMDGPU/SIInstructions.td
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
Revision 373297 by yuanfang:
Remove a undefined constructor introduced by r373244.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/MachineModuleInfo.hllvm.src/include/llvm/CodeGen/MachineModuleInfo.h
Revision 373296 by arsenm:
AMDGPU/GlobalISel: Add support for init.exec intrinsics

TThe existing wave32 behavior seems broken and incomplete, but this
reproduces it.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUGISel.tdllvm.src/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cppllvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.hllvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cppllvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.tdllvm.src/lib/Target/AMDGPU/SIInstrInfo.td
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIInstructions.tdllvm.src/lib/Target/AMDGPU/SIInstructions.td
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.init.exec.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.init.exec.ll
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.init.exec.wave32.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.init.exec.wave32.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.llllvm.src/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
The file was added/llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.llllvm.src/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/wave32.llllvm.src/test/CodeGen/AMDGPU/wave32.ll
Revision 373295 by arsenm:
AMDGPU/GlobalISel: Allow scc/vcc alternative mappings for s1 constants
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cppllvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Revision 373294 by arsenm:
GlobalISel: Handle llvm.read_register

SelectionDAG has a bunch of machinery to defer this to selection time
for some reason. Just directly emit a copy during IRTranslator. The
x86 usage does somewhat questionably check hasFP, which could depend
on the whole function being at minimum translated.

This does lose the convergent bit if the callsite had it, which may be
a problem. We also lose that in general for intrinsics, which may also
be a problem.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cppllvm.src/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/read_register.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/read_register.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/read_register.llllvm.src/test/CodeGen/AMDGPU/read_register.ll
Revision 373293 by arsenm:
AMDGPU/GlobalISel: Avoid creating shift of 0 in arg lowering

This is sort of papering over the fact that we don't run a combiner
anywhere, but avoiding creating 2 instructions in the first place is
easy.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cppllvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
Revision 373292 by arsenm:
TLI: Remove DAG argument from getRegisterByName

Replace with the MachineFunction. X86 is the only user, and only uses
it for the function. This removes one obstacle from using this in
GlobalISel. The other is the more tolerable EVT argument.

The X86 use of the function seems questionable to me. It checks hasFP,
before frame lowering.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/TargetLowering.hllvm.src/include/llvm/CodeGen/TargetLowering.h
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cppllvm.src/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cppllvm.src/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.hllvm.src/lib/Target/AArch64/AArch64ISelLowering.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cppllvm.src/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.hllvm.src/lib/Target/AMDGPU/SIISelLowering.h
The file was modified/llvm/trunk/lib/Target/ARM/ARMISelLowering.cppllvm.src/lib/Target/ARM/ARMISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/ARM/ARMISelLowering.hllvm.src/lib/Target/ARM/ARMISelLowering.h
The file was modified/llvm/trunk/lib/Target/AVR/AVRISelLowering.cppllvm.src/lib/Target/AVR/AVRISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/AVR/AVRISelLowering.hllvm.src/lib/Target/AVR/AVRISelLowering.h
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cppllvm.src/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.hllvm.src/lib/Target/Hexagon/HexagonISelLowering.h
The file was modified/llvm/trunk/lib/Target/Lanai/LanaiISelLowering.cppllvm.src/lib/Target/Lanai/LanaiISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/Lanai/LanaiISelLowering.hllvm.src/lib/Target/Lanai/LanaiISelLowering.h
The file was modified/llvm/trunk/lib/Target/Mips/MipsISelLowering.cppllvm.src/lib/Target/Mips/MipsISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/Mips/MipsISelLowering.hllvm.src/lib/Target/Mips/MipsISelLowering.h
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cppllvm.src/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.hllvm.src/lib/Target/PowerPC/PPCISelLowering.h
The file was modified/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cppllvm.src/lib/Target/Sparc/SparcISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/Sparc/SparcISelLowering.hllvm.src/lib/Target/Sparc/SparcISelLowering.h
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cppllvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.hllvm.src/lib/Target/X86/X86ISelLowering.h
Revision 373291 by maskray:
[llvm-readobj/llvm-readelf] Delete --arm-attributes (alias for --arch-specific)

D68110 added --arch-specific (supported by GNU readelf) and made
--arm-attributes an alias for it. The tests were later migrated to use
--arch-specific.

Note, llvm-readelf --arch-specific currently just uses llvm-readobj
style output for ARM attributes. The readelf-style output is not
implemented.

Reviewed By: compnerd, kongyi, rupprecht

Differential Revision: https://reviews.llvm.org/D68196
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/docs/CommandGuide/llvm-readelf.rstllvm.src/docs/CommandGuide/llvm-readelf.rst
The file was modified/llvm/trunk/docs/CommandGuide/llvm-readobj.rstllvm.src/docs/CommandGuide/llvm-readobj.rst
The file was modified/llvm/trunk/test/tools/llvm-readobj/ARM/attribute-conformance-1.sllvm.src/test/tools/llvm-readobj/ARM/attribute-conformance-1.s
The file was modified/llvm/trunk/test/tools/llvm-readobj/ARM/attribute-conformance-2.sllvm.src/test/tools/llvm-readobj/ARM/attribute-conformance-2.s
The file was modified/llvm/trunk/tools/llvm-readobj/llvm-readobj.cppllvm.src/tools/llvm-readobj/llvm-readobj.cpp
Revision 373290 by ctopper:
[X86] Add test case to show missed opportunity to shrink a constant index to a gather in order to avoid splitting.

Also add a test case for an index that could be shrunk, but
would create a narrow type. We can go ahead and do it we just
need to be before type legalization.

Similar test cases for scatter as well.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/masked_gather_scatter.llllvm.src/test/CodeGen/X86/masked_gather_scatter.ll
Revision 373289 by rsmith:
Don't elide the use of the thread wrapper for a thread_local constinit
variable with non-trivial destruction.

We still need to invoke the thread wrapper to trigger registration of
the destructor call on thread shutdown.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/CodeGen/ItaniumCXXABI.cppclang.src/lib/CodeGen/ItaniumCXXABI.cpp
The file was modified/cfe/trunk/test/CodeGenCXX/cxx2a-thread-local-constinit.cppclang.src/test/CodeGenCXX/cxx2a-thread-local-constinit.cpp
Revision 373288 by arsenm:
AMDGPU/GlobalISel: Select G_UADDO/G_USUBO
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cppllvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.hllvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cppllvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mir
The file was added/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mir