FailedChanges

Summary

  1. Fix signed/unsigned warning. NFCI
  2. [NFC][PowerPC] Reorganize CRNotPat multiclass patterns in PPCInstrInfo.td This is patch aims to group together the `CRNotPat` multi class instantiations within the `PPCInstrInfo.td` file. Integer instantiations of the multi class are grouped together into a section, and the floating point patterns are separated into its own section. Differential Revision: https://reviews.llvm.org/D67975
  3. [X86][SSE] Remove resolveTargetShuffleInputs and use getTargetShuffleInputs directly. Move the resolveTargetShuffleInputsAndMask call to after the shuffle mask combine before the undef/zero constant fold instead.
  4. [X86][SSE] Don't merge known undef/zero elements into target shuffle masks. Replaces setTargetShuffleZeroElements with getTargetShuffleAndZeroables which reports the Zeroable elements but doesn't merge them into the decoded target shuffle mask (the merging has been moved up into getTargetShuffleInputs until we can get rid of it entirely). This is part of the work to fix PR43024 and allow us to use SimplifyDemandedElts to simplify shuffle chains - we need to get to a point where the target shuffle mask isn't adjusted by its source inputs but instead we cache them in a parallel Zeroable mask.
  5. Implements CWG 1601 in [over.ics.rank/4.2] Summary: The overload resolution for enums with a fixed underlying type has changed in the C++14 standard. This patch implements the new rule. Patch by Mark de Wever! Reviewers: rsmith Reviewed By: rsmith Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D65695
  6. [X86] Add custom type legalization for v16i64->v16i8 truncate and v8i64->v8i8 truncate when v8i64 isn't legal Summary: The default legalization for v16i64->v16i8 tries to create a multiple stage truncate concatenating after each stage and truncating again. But avx512 implements truncates with multiple uops. So it should be better to truncate all the way to the desired element size and then concatenate the pieces using unpckl instructions. This minimizes the number of 2 uop truncates. The unpcks are all single uop instructions. I tried to handle this by just custom splitting the v16i64->v16i8 shuffle. And hoped that the DAG combiner would leave the two halves in the state needed to make D68374 do the job for each half. This worked for the first half, but the second half got messed up. So I've implemented custom handling for v8i64->v8i8 when v8i64 needs to be split to produce the VTRUNCs directly. Reviewers: RKSimon, spatel Reviewed By: RKSimon Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68428
  7. [LegalizeTypes][X86] When splitting a vselect for type legalization, don't split a setcc condition if the setcc input is legal and vXi1 conditions are supported Summary: The VSELECT splitting code tries to split a setcc input as well. But on avx512 where mask registers are well supported it should be better to just split the mask and use a single compare. Reviewers: RKSimon, spatel, efriedma Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68359
  8. [Sema] Avoids an assertion failure when an invalid conversion declaration is used Summary: When using a user-defined conversion function template with a deduced return type the compiler gives a set of warnings: ``` bug.cc:252:44: error: cannot specify any part of a return type in the declaration of a conversion function; use an alias template to declare a conversion to 'auto (Ts &&...) const' template <typename... Ts> operator auto()(Ts &&... xs) const; ^~~~~~~~~~~~~~~~~~~ bug.cc:252:29: error: conversion function cannot convert to a function type template <typename... Ts> operator auto()(Ts &&... xs) const; ^ error: pointer to function type cannot have 'const' qualifier ``` after which it triggers an assertion failure. It seems the last error is incorrect and doesn't have any location information. This patch stops the compilation after the second warning. Fixes bug 31422. Patch by Mark de Wever! Reviewers: rsmith Reviewed By: rsmith Subscribers: bbannier, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64820
  9. gn build: make windows build less broken
  10. [LOOPGUARD] Remove asserts in getLoopGuardBranch Summary: The assertion in getLoopGuardBranch can be a 'return nullptr' under if condition. Authored By: DTharun Reviewer: Whitney, fhahn Reviewed By: Whitney, fhahn Subscribers: fhahn, llvm-commits Tag: LLVM Differential Revision: https://reviews.llvm.org/D66084
  11. [Docs] Removes Programming Documentation page Removes Programming Documentation page. Also moves existing topics on Programming Documentation page to User Guides and Reference pages.
Revision 373870 by rksimon:
Fix signed/unsigned warning. NFCI
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cppllvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 373869 by amyk:
[NFC][PowerPC] Reorganize CRNotPat multiclass patterns in PPCInstrInfo.td

This is patch aims to group together the `CRNotPat` multi class instantiations
within the `PPCInstrInfo.td` file.

Integer instantiations of the multi class are grouped together into a section,
and the floating point patterns are separated into its own section.

Differential Revision: https://reviews.llvm.org/D67975
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.tdllvm.src/lib/Target/PowerPC/PPCInstrInfo.td
Revision 373868 by rksimon:
[X86][SSE] Remove resolveTargetShuffleInputs and use getTargetShuffleInputs directly.

Move the resolveTargetShuffleInputsAndMask call to after the shuffle mask combine before the undef/zero constant fold instead.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cppllvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 373867 by rksimon:
[X86][SSE] Don't merge known undef/zero elements into target shuffle masks.

Replaces setTargetShuffleZeroElements with getTargetShuffleAndZeroables which reports the Zeroable elements but doesn't merge them into the decoded target shuffle mask (the merging has been moved up into getTargetShuffleInputs until we can get rid of it entirely).

This is part of the work to fix PR43024 and allow us to use SimplifyDemandedElts to simplify shuffle chains - we need to get to a point where the target shuffle mask isn't adjusted by its source inputs but instead we cache them in a parallel Zeroable mask.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cppllvm.src/lib/Target/X86/X86ISelLowering.cpp
Revision 373866 by rsmith:
Implements CWG 1601 in [over.ics.rank/4.2]

Summary:
The overload resolution for enums with a fixed underlying type has changed in the C++14 standard. This patch implements the new rule.

Patch by Mark de Wever!

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D65695
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/Sema/SemaOverload.cppclang.src/lib/Sema/SemaOverload.cpp
The file was modified/cfe/trunk/test/CXX/drs/dr16xx.cppclang.src/test/CXX/drs/dr16xx.cpp
The file was modified/cfe/trunk/test/CXX/drs/dr6xx.cppclang.src/test/CXX/drs/dr6xx.cpp
The file was modified/cfe/trunk/www/cxx_dr_status.htmlclang.src/www/cxx_dr_status.html
Revision 373864 by ctopper:
[X86] Add custom type legalization for v16i64->v16i8 truncate and v8i64->v8i8 truncate when v8i64 isn't legal

Summary:
The default legalization for v16i64->v16i8 tries to create a multiple stage truncate concatenating after each stage and truncating again. But avx512 implements truncates with multiple uops. So it should be better to truncate all the way to the desired element size and then concatenate the pieces using unpckl instructions. This minimizes the number of 2 uop truncates. The unpcks are all single uop instructions.

I tried to handle this by just custom splitting the v16i64->v16i8 shuffle. And hoped that the DAG combiner would leave the two halves in the state needed to make D68374 do the job for each half. This worked for the first half, but the second half got messed up. So I've implemented custom handling for v8i64->v8i8 when v8i64 needs to be split to produce the VTRUNCs directly.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68428
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cppllvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/min-legal-vector-width.llllvm.src/test/CodeGen/X86/min-legal-vector-width.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-trunc-packus.llllvm.src/test/CodeGen/X86/vector-trunc-packus.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-trunc-ssat.llllvm.src/test/CodeGen/X86/vector-trunc-ssat.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-trunc-usat.llllvm.src/test/CodeGen/X86/vector-trunc-usat.ll
Revision 373863 by ctopper:
[LegalizeTypes][X86] When splitting a vselect for type legalization, don't split a setcc condition if the setcc input is legal and vXi1 conditions are supported

Summary: The VSELECT splitting code tries to split a setcc input as well. But on avx512 where mask registers are well supported it should be better to just split the mask and use a single compare.

Reviewers: RKSimon, spatel, efriedma

Reviewed By: spatel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68359
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cppllvm.src/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/avx512-vselect.llllvm.src/test/CodeGen/X86/avx512-vselect.ll
The file was modified/llvm/trunk/test/CodeGen/X86/min-legal-vector-width.llllvm.src/test/CodeGen/X86/min-legal-vector-width.ll
The file was modified/llvm/trunk/test/CodeGen/X86/pr34177.llllvm.src/test/CodeGen/X86/pr34177.ll
Revision 373862 by rsmith:
[Sema] Avoids an assertion failure when an invalid conversion declaration is used

Summary:
When using a user-defined conversion function template with a deduced return type the compiler gives a set of warnings:
```
bug.cc:252:44: error: cannot specify any part of a return type in the declaration of a conversion function; use an alias template to declare a conversion to 'auto (Ts &&...) const'
  template <typename... Ts> operator auto()(Ts &&... xs) const;
                                           ^~~~~~~~~~~~~~~~~~~
bug.cc:252:29: error: conversion function cannot convert to a function type
  template <typename... Ts> operator auto()(Ts &&... xs) const;
                            ^
error: pointer to function type cannot have 'const' qualifier
```
after which it triggers an assertion failure. It seems the last error is incorrect and doesn't have any location information. This patch stops the compilation after the second warning.

Fixes bug 31422.

Patch by Mark de Wever!

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: bbannier, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64820
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/Sema/SemaDecl.cppclang.src/lib/Sema/SemaDecl.cpp
The file was added/cfe/trunk/test/SemaCXX/PR31422.cppclang.src/test/SemaCXX/PR31422.cpp
Revision 373858 by nico:
gn build: make windows build less broken
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/utils/gn/build/toolchain/BUILD.gnllvm.src/utils/gn/build/toolchain/BUILD.gn
Revision 373857 by whitneyt:
[LOOPGUARD] Remove asserts in getLoopGuardBranch
Summary: The assertion in getLoopGuardBranch can be a 'return nullptr'
under if condition.
Authored By: DTharun
Reviewer: Whitney, fhahn
Reviewed By: Whitney, fhahn
Subscribers: fhahn, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D66084
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Analysis/LoopInfo.cppllvm.src/lib/Analysis/LoopInfo.cpp
The file was modified/llvm/trunk/unittests/Analysis/LoopInfoTest.cppllvm.src/unittests/Analysis/LoopInfoTest.cpp
Revision 373856 by dr87:
[Docs] Removes Programming Documentation page

Removes Programming Documentation page. Also moves existing topics on Programming Documentation page to User Guides and Reference pages.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/docs/GettingStartedTutorials.rstllvm.src/docs/GettingStartedTutorials.rst
The file was removed/llvm/trunk/docs/ProgrammingDocumentation.rstllvm.src/docs/ProgrammingDocumentation.rst
The file was modified/llvm/trunk/docs/Reference.rstllvm.src/docs/Reference.rst
The file was modified/llvm/trunk/docs/UserGuides.rstllvm.src/docs/UserGuides.rst
The file was modified/llvm/trunk/docs/index.rstllvm.src/docs/index.rst