FailedChanges

Summary

  1. [clang] prevent crash for nonnull attribut in constant context (Bug 43601) Summary: bug : https://bugs.llvm.org/show_bug.cgi?id=43601 Reviewers: rnk Reviewed By: rnk Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D68716
  2. AMDGPU: Use SGPR_128 instead of SReg_128 for vregs SGPR_128 only includes the real allocatable SGPRs, and SReg_128 adds the additional non-allocatable TTMP registers. There's no point in allocating SReg_128 vregs. This shrinks the size of the classes regalloc needs to consider, which is usually good.
  3. [X86] Add test case for trunc_packus_v16i32_v16i8 with avx512vl+avx512bw and prefer-vector-width=256 and min-legal-vector-width=256. NFC
  4. [Attributor][NFC] clang format
  5. [Attributor] Handle `null` differently in capture and alias logic Summary: `null` in the default address space (=AS 0) cannot be captured nor can it alias anything. We make this clear now as it can be important for callbacks and other cases later on. In addition, this patch improves the debug output for noalias deduction. Reviewers: sstefan1, uenoku Subscribers: hiraditya, bollu, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68624
Revision 374285 by tyker:
[clang] prevent crash for nonnull attribut in constant context (Bug 43601)

Summary:

bug : https://bugs.llvm.org/show_bug.cgi?id=43601

Reviewers: rnk

Reviewed By: rnk

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D68716
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/AST/ExprConstant.cppclang.src/lib/AST/ExprConstant.cpp
The file was modified/cfe/trunk/test/SemaCXX/attr-nonnull.cppclang.src/test/SemaCXX/attr-nonnull.cpp
Revision 374284 by arsenm:
AMDGPU: Use SGPR_128 instead of SReg_128 for vregs

SGPR_128 only includes the real allocatable SGPRs, and SReg_128 adds
the additional non-allocatable TTMP registers. There's no point in
allocating SReg_128 vregs. This shrinks the size of the classes
regalloc needs to consider, which is usually good.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cppllvm.src/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetMachine.cppllvm.src/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cppllvm.src/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cppllvm.src/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SILoadStoreOptimizer.cppllvm.src/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIMachineFunctionInfo.cppllvm.src/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cppllvm.src/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.tdllvm.src/lib/Target/AMDGPU/SIRegisterInfo.td
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.llllvm.src/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mirllvm.src/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-identical-values-undef.mirllvm.src/test/CodeGen/AMDGPU/coalescer-identical-values-undef.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mirllvm.src/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mirllvm.src/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-subreg-join.mirllvm.src/test/CodeGen/AMDGPU/coalescer-subreg-join.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mirllvm.src/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mirllvm.src/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mirllvm.src/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mirllvm.src/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/dce-disjoint-intervals.mirllvm.src/test/CodeGen/AMDGPU/dce-disjoint-intervals.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/detect-dead-lanes.mirllvm.src/test/CodeGen/AMDGPU/detect-dead-lanes.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.llllvm.src/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/fold-imm-copy.mirllvm.src/test/CodeGen/AMDGPU/fold-imm-copy.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/fold-imm-f16-f32.mirllvm.src/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/fold-multiple.mirllvm.src/test/CodeGen/AMDGPU/fold-multiple.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/global-load-store-atomics.mirllvm.src/test/CodeGen/AMDGPU/global-load-store-atomics.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/memory_clause.mirllvm.src/test/CodeGen/AMDGPU/memory_clause.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/merge-load-store.mirllvm.src/test/CodeGen/AMDGPU/merge-load-store.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/mubuf-legalize-operands.mirllvm.src/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mirllvm.src/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/phi-elimination-end-cf.mirllvm.src/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mirllvm.src/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/regbank-reassign.mirllvm.src/test/CodeGen/AMDGPU/regbank-reassign.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mirllvm.src/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/regcoal-subrange-join.mirllvm.src/test/CodeGen/AMDGPU/regcoal-subrange-join.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mirllvm.src/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/rename-independent-subregs.mirllvm.src/test/CodeGen/AMDGPU/rename-independent-subregs.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/schedule-regpressure.mirllvm.src/test/CodeGen/AMDGPU/schedule-regpressure.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/spill-before-exec.mirllvm.src/test/CodeGen/AMDGPU/spill-before-exec.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/splitkit.mirllvm.src/test/CodeGen/AMDGPU/splitkit.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/subreg-split-live-in-error.mirllvm.src/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/subreg_interference.mirllvm.src/test/CodeGen/AMDGPU/subreg_interference.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/subvector-test.mirllvm.src/test/CodeGen/AMDGPU/subvector-test.mir
Revision 374283 by ctopper:
[X86] Add test case for trunc_packus_v16i32_v16i8 with avx512vl+avx512bw and prefer-vector-width=256 and min-legal-vector-width=256. NFC
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/min-legal-vector-width.llllvm.src/test/CodeGen/X86/min-legal-vector-width.ll
Revision 374281 by jdoerfert:
[Attributor][NFC] clang format
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/Transforms/IPO/Attributor.hllvm.src/include/llvm/Transforms/IPO/Attributor.h
The file was modified/llvm/trunk/lib/Transforms/IPO/Attributor.cppllvm.src/lib/Transforms/IPO/Attributor.cpp
Revision 374280 by jdoerfert:
[Attributor] Handle `null` differently in capture and alias logic

Summary:
`null` in the default address space (=AS 0) cannot be captured nor can
it alias anything. We make this clear now as it can be important for
callbacks and other cases later on. In addition, this patch improves the
debug output for noalias deduction.

Reviewers: sstefan1, uenoku

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68624
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/IPO/Attributor.cppllvm.src/lib/Transforms/IPO/Attributor.cpp
The file was modified/llvm/trunk/test/Transforms/FunctionAttrs/callbacks.llllvm.src/test/Transforms/FunctionAttrs/callbacks.ll
The file was modified/llvm/trunk/test/Transforms/FunctionAttrs/nocapture.llllvm.src/test/Transforms/FunctionAttrs/nocapture.ll