FailedChanges

Summary

  1. [X86] Add v8i64->v8i8 ssat/usat/packus truncate tests to min-legal-vector-width.ll I wonder if we should split the v8i8 stores in order to form two v4i8 saturating truncating stores. This would remove the unpckl needed to concatenated the v4i8 results to make a single store.
  2. [ADT][Statistics] Fix test after rL374490
  3. Fix modules build for r374337 A modules build failed with the following error: call to function 'operator&' that is neither visible in the template definition nor found by argument-dependent lookup Fix that by declaring the appropriate operators in the llvm::minidump namespace.
  4. [X86] Always define the tzcnt intrinsics even when _MSC_VER is defined. These intrinsics use llvm.cttz intrinsics so are always available even without the bmi feature. We already don't check for the bmi feature on the intrinsics themselves. But we were blocking the include of the header file with _MSC_VER unless BMI was enabled on the command line. Fixes PR30506.
  5. [PowerPC] Remove assertion "Shouldn't overwrite a register before it is killed" The assertion is everzealous and fail tests like: renamable $x3 = LI8 0 STD renamable $x3, 16, $x1 renamable $x3 = LI8 0 Remove the assertion since killed flag of $x3 is not mandentory. Differential Revision: https://reviews.llvm.org/D68344
  6. [NFC] run specific pass instead of whole -O3 pipeline for popcount recoginzation testcase.
  7. Updated llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast and llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast builders.
  8. [InstCombine] recognize popcount. This patch recognizes popcount intrinsic according to algorithm from website http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel Differential Revision: https://reviews.llvm.org/D68189
  9. [libc++] Fix linker script generation Handle the case when libc++abi and libunwind are being built together with libc++ in the runtimes build. This logic was used in the previous implementation but dropped in r374116. Differential Revision: https://reviews.llvm.org/D68791
  10. [X86] Add a DAG combine to turn v16i16->v16i8 VTRUNCUS+store into a saturating truncating store.
  11. [X86] Add test case for trunc_packus_v16i32_v16i8_store to min-legal-vector-width.ll We aren't folding the vpmovuswb into the store.
  12. [CVP] Remove a masking operation if range information implies it's a noop This is really a known bits style transformation, but known bits isn't context sensitive. The particular case which comes up happens to involve a range which allows range based reasoning to eliminate the mask pattern, so handle that case specifically in CVP. InstCombine likes to generate the mask-by-low-bits pattern when widening an arithmetic expression which includes a zext in the middle. Differential Revision: https://reviews.llvm.org/D68811
  13. [X86] Add more packus/ssat/usat truncate tests from legal vectors to less than 128-bit vectors. Some of these have sub-optimal codegen for avx512 relative to avx2.
Revision 374519 by ctopper:
[X86] Add v8i64->v8i8 ssat/usat/packus truncate tests to min-legal-vector-width.ll

I wonder if we should split the v8i8 stores in order to form
two v4i8 saturating truncating stores. This would remove the
unpckl needed to concatenated the v4i8 results to make a
single store.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/min-legal-vector-width.llllvm.src/test/CodeGen/X86/min-legal-vector-width.ll
Revision 374518 by kadircet:
[ADT][Statistics] Fix test after rL374490
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/unittests/ADT/StatisticTest.cppllvm.src/unittests/ADT/StatisticTest.cpp
Revision 374517 by labath:
Fix modules build for r374337

A modules build failed with the following error:
  call to function 'operator&' that is neither visible in the template definition nor found by argument-dependent lookup

Fix that by declaring the appropriate operators in the llvm::minidump
namespace.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/BinaryFormat/Minidump.hllvm.src/include/llvm/BinaryFormat/Minidump.h
Revision 374516 by ctopper:
[X86] Always define the tzcnt intrinsics even when _MSC_VER is defined.

These intrinsics use llvm.cttz intrinsics so are always available
even without the bmi feature. We already don't check for the bmi
feature on the intrinsics themselves. But we were blocking the
include of the header file with _MSC_VER unless BMI was enabled
on the command line.

Fixes PR30506.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/Headers/bmiintrin.hclang.src/lib/Headers/bmiintrin.h
The file was modified/cfe/trunk/lib/Headers/immintrin.hclang.src/lib/Headers/immintrin.h
The file was modified/cfe/trunk/test/CodeGen/bmi-builtins.cclang.src/test/CodeGen/bmi-builtins.c
Revision 374515 by yi-hong.lyu:
[PowerPC] Remove assertion "Shouldn't overwrite a register before it is killed"

The assertion is everzealous and fail tests like:

  renamable $x3 = LI8 0
  STD renamable $x3, 16, $x1
  renamable $x3 = LI8 0

Remove the assertion since killed flag of $x3 is not mandentory.

Differential Revision: https://reviews.llvm.org/D68344
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCPreEmitPeephole.cppllvm.src/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
The file was modified/llvm/trunk/test/CodeGen/PowerPC/remove-redundant-load-imm.mirllvm.src/test/CodeGen/PowerPC/remove-redundant-load-imm.mir
Revision 374514 by shchenz:
[NFC] run specific pass instead of whole -O3 pipeline for popcount recoginzation testcase.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/Transforms/AggressiveInstCombine/popcount.llllvm.src/test/Transforms/AggressiveInstCombine/popcount.ll
Revision 374513 by gkistanova:
Updated llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast and llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast builders.
Change TypePath in RepositoryPath in Workspace
The file was modified/zorg/trunk/buildbot/osuosl/master/config/builders.pyzorg/buildbot/osuosl/master/config/builders.py
Revision 374512 by shchenz:
[InstCombine] recognize popcount.

  This patch recognizes popcount intrinsic according to algorithm from website
  http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel

Differential Revision: https://reviews.llvm.org/D68189
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/IR/PatternMatch.hllvm.src/include/llvm/IR/PatternMatch.h
The file was modified/llvm/trunk/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cppllvm.src/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
The file was added/llvm/trunk/test/Transforms/AggressiveInstCombine/popcount.llllvm.src/test/Transforms/AggressiveInstCombine/popcount.ll
Revision 374510 by phosek:
[libc++] Fix linker script generation

Handle the case when libc++abi and libunwind are being built together
with libc++ in the runtimes build. This logic was used in the previous
implementation but dropped in r374116.

Differential Revision: https://reviews.llvm.org/D68791
Change TypePath in RepositoryPath in Workspace
The file was modified/libcxx/trunk/cmake/Modules/DefineLinkerScript.cmakelibcxx.src/cmake/Modules/DefineLinkerScript.cmake
Revision 374509 by ctopper:
[X86] Add a DAG combine to turn v16i16->v16i8 VTRUNCUS+store into a saturating truncating store.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/X86ISelLowering.cppllvm.src/lib/Target/X86/X86ISelLowering.cpp
The file was modified/llvm/trunk/test/CodeGen/X86/min-legal-vector-width.llllvm.src/test/CodeGen/X86/min-legal-vector-width.ll
Revision 374507 by ctopper:
[X86] Add test case for trunc_packus_v16i32_v16i8_store to min-legal-vector-width.ll

We aren't folding the vpmovuswb into the store.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/min-legal-vector-width.llllvm.src/test/CodeGen/X86/min-legal-vector-width.ll
Revision 374506 by reames:
[CVP] Remove a masking operation if range information implies it's a noop

This is really a known bits style transformation, but known bits isn't context sensitive. The particular case which comes up happens to involve a range which allows range based reasoning to eliminate the mask pattern, so handle that case specifically in CVP.

InstCombine likes to generate the mask-by-low-bits pattern when widening an arithmetic expression which includes a zext in the middle.

Differential Revision: https://reviews.llvm.org/D68811
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cppllvm.src/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
The file was added/llvm/trunk/test/Transforms/CorrelatedValuePropagation/and.llllvm.src/test/Transforms/CorrelatedValuePropagation/and.ll
The file was modified/llvm/trunk/test/Transforms/CorrelatedValuePropagation/overflows.llllvm.src/test/Transforms/CorrelatedValuePropagation/overflows.ll
The file was modified/llvm/trunk/test/Transforms/CorrelatedValuePropagation/range.llllvm.src/test/Transforms/CorrelatedValuePropagation/range.ll
Revision 374505 by ctopper:
[X86] Add more packus/ssat/usat truncate tests from legal vectors to less than 128-bit vectors.

Some of these have sub-optimal codegen for avx512 relative to avx2.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/test/CodeGen/X86/vector-trunc-packus.llllvm.src/test/CodeGen/X86/vector-trunc-packus.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-trunc-ssat.llllvm.src/test/CodeGen/X86/vector-trunc-ssat.ll
The file was modified/llvm/trunk/test/CodeGen/X86/vector-trunc-usat.llllvm.src/test/CodeGen/X86/vector-trunc-usat.ll