FailedChanges

Summary

  1. [AMDGPU] Remove -amdgpu-spill-sgpr-to-smem. Summary: The implementation was never completed and never used except in tests. Reviewers: arsenm, mareko Subscribers: qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69163
  2. [sanitizers] Increase default "git clone --depth" to 100
  3. [CVP] setDeducedOverflowingFlags(): actually inc per-opcode stats This is really embarrassing. Those are pointers, so that offsets the pointers, not the statistics pointed-by the pointer...
  4. gn build: Merge r375288
  5. Disable exit-on-SIGPIPE in lldb Occasionally, during test teardown, LLDB writes to a closed pipe. Sometimes the communication is inherently unreliable, so LLDB tries to avoid being killed due to SIGPIPE (it calls `signal(SIGPIPE, SIG_IGN)`). However, LLVM's default SIGPIPE behavior overrides LLDB's, causing it to exit with IO_ERR. Opt LLDB out of the default SIGPIPE behavior. I expect that this will resolve some LLDB test suite flakiness (tests randomly failing with IO_ERR) that we've seen since r344372. rdar://55750240 Differential Revision: https://reviews.llvm.org/D69148
  6. [X86] Fix register parsing in .seh_* in Intel syntax Previously, the parser checked for a '%' prefix to indicate a register. In Intel syntax mode, LLVM does not print a '%' prefix on registers, so LLVM could not parse its own assembly output. Instead, require that register numbers be integer literals, or at least start with an integer literal, which is consistent with .cfi_* directive register parsing.
  7. [analyzer] exploded-graph-rewriter: Unforget to censor stmt_ids in the test. They're not stable across machines. Fixes buildbots after r375278.
  8. [NFC][CVP] Some tests for `mul` no-wrap deduction
  9. Update global_symbols.txt.
  10. [WebAssembly] Allow multivalue signatures in object files Summary: Also changes the wasm YAML format to reflect the possibility of having multiple return types and to put the returns after the params for consistency with the binary encoding. Reviewers: aheejin, sbc100 Subscribers: dschuff, jgravelle-google, hiraditya, sunfish, arphaman, rupprecht, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69156
  11. [analyzer] exploded-graph-rewriter: Rename Environment to Expressions. It's less confusing for newcomers.
  12. [analyzer] Fix FieldRegion dumps. The '->' thing has always been confusing; the actual operation '->' translates to a pointer dereference together with adding a FieldRegion, but FieldRegion on its own doesn't imply an additional pointer dereference.
  13. [analyzer] Drop the logic for collapsing the state if it's same as in preds. One of the first attempts to reduce the size of the exploded graph dumps was to skip the state dump as long as the state is the same as in all of the predecessor nodes. With all the new facilities in place (node joining, diff dumps), this feature doesn't do much, and when it does, it's more harmful than useful. Let's remove it.
  14. [analyzer] exploded-graph-rewriter: Fix dump for state 0. It shouldn't say "unspecified" when the state is specified to be empty.
  15. [analyzer] Fix hidden node traversal in exploded graph dumps. The joined nodes now actually have the same state. That was intended from the start but the original implementation turned out to be buggy. Differential Revision: https://reviews.llvm.org/D69150
  16. [GISel][CallLowering] Make isIncomingArgumentHandler a pure virtual method The default implementation of isIncomingArgumentHandler could lead to generating incorrect code. Make it a pure virtual method, so that targets know they have to override it to produce correct code. NFC Differential Revision: https://reviews.llvm.org/D69187
  17. scudo: Update TLS_SLOT_SANITIZER value. Android now allocates only 8 fixed TLS slots. Somehow we were getting away with using a non-existent slot until now, but in some cases the TLS slots were being placed at the end of a page, which led to a segfault at startup. Differential Revision: https://reviews.llvm.org/D69191
  18. [CVP] After proving that @llvm.with.overflow()/@llvm.sat() don't overflow, also try to prove other no-wrap Summary: CVP, unlike InstCombine, does not run till exaustion. It only does a single pass. When dealing with those special binops, if we prove that they can safely be demoted into their usual binop form, we do set the no-wrap we deduced. But when dealing with usual binops, we try to deduce both no-wraps. So if we convert e.g. @llvm.uadd.with.overflow() to `add nuw`, we won't attempt to check whether it can be `add nuw nsw`. This patch proposes to call `processBinOp()` on newly-created binop, which is identical to what we do for div/rem already. Reviewers: nikic, spatel, reames Reviewed By: nikic Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69183
  19. [examples] Fix some comments in the LLJITWithJITLink example
  20. Apply defaut cmake flags to ABITestsuitBuilder.
  21. AMDGPU: Relax 32-bit SGPR register class Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This will allow the register coalescer to do a better job eliminating copies to m0. For GlobalISel, as a terrible hack, use SGPR_32 for things that should use SCC until booleans are solved.
  22. [examples] Add an example of how to use JITLink and small-code-model with LLJIT. JITLink is LLVM's newer jit-linker. It is an alternative to (and hopefully eventually a replacement for) LLVM's older jit-linker, RuntimeDyld. Unlike RuntimeDyld which requries JIT'd code to be complied with the large code model, JITlink can link code compiled with the small code model, which is the native code model for a number of targets (including all supported MachO targets). This example shows how to: -- Create a JITLink InProcessMemoryManager -- Set the code model to small -- Use a JITLink backed ObjectLinkingLayer as the linking layer for LLJIT (rather than the default RTDyldObjectLinkingLayer). Note: This example will only work on platforms supported by JITLink. As of this commit that's MachO/x86-64 and MachO/arm64.
  23. AMDGPU: Fix SMEM WAR hazard for gfx10 readlane Summary: Hazard recognizer fails to see hazard with V_READLANE_B32_gfx10. Reviewers: rampitec Reviewed By: rampitec Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69172
  24. [lit] Reduce value of synthesized timeouts Large timeout values (one year, positive infinity) trip up Python on Windows with "OverflowError: timeout value is too large". One week seems to work and is still large enough in practice. Thanks to Simon Pilgrim for helping me test this. https://reviews.llvm.org/rL375171
Revision 375293 by foad:
[AMDGPU] Remove -amdgpu-spill-sgpr-to-smem.

Summary: The implementation was never completed and never used except in tests.

Reviewers: arsenm, mareko

Subscribers: qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69163
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cppllvm.src/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.hllvm.src/lib/Target/AMDGPU/SIRegisterInfo.h
The file was removed/llvm/trunk/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr-spill-to-smem.llllvm.src/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr-spill-to-smem.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.llllvm.src/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/basic-branch.llllvm.src/test/CodeGen/AMDGPU/basic-branch.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/si-spill-sgpr-stack.llllvm.src/test/CodeGen/AMDGPU/si-spill-sgpr-stack.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/spill-m0.llllvm.src/test/CodeGen/AMDGPU/spill-m0.ll
The file was removed/llvm/trunk/test/CodeGen/AMDGPU/spill-to-smem-m0.llllvm.src/test/CodeGen/AMDGPU/spill-to-smem-m0.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/spill-wide-sgpr.llllvm.src/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
Revision 375291 by Vitaly Buka:
[sanitizers] Increase default "git clone --depth" to 100
Change TypePath in RepositoryPath in Workspace
The file was modified/zorg/trunk/zorg/buildbot/builders/sanitizers/buildbot_functions.shzorg/zorg/buildbot/builders/sanitizers/buildbot_functions.sh
Revision 375290 by lebedevri:
[CVP] setDeducedOverflowingFlags(): actually inc per-opcode stats

This is really embarrassing. Those are pointers, so that offsets the
pointers, not the statistics pointed-by the pointer...
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cppllvm.src/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Revision 375289 by gnsyncbot:
gn build: Merge r375288
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/utils/gn/secondary/llvm/unittests/Support/BUILD.gnllvm.src/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
Revision 375288 by Vedant Kumar:
Disable exit-on-SIGPIPE in lldb

Occasionally, during test teardown, LLDB writes to a closed pipe.
Sometimes the communication is inherently unreliable, so LLDB tries to
avoid being killed due to SIGPIPE (it calls `signal(SIGPIPE, SIG_IGN)`).
However, LLVM's default SIGPIPE behavior overrides LLDB's, causing it to
exit with IO_ERR.

Opt LLDB out of the default SIGPIPE behavior. I expect that this will
resolve some LLDB test suite flakiness (tests randomly failing with
IO_ERR) that we've seen since r344372.

rdar://55750240

Differential Revision: https://reviews.llvm.org/D69148
Change TypePath in RepositoryPath in Workspace
The file was modified/lldb/trunk/tools/driver/Driver.cppN/A
The file was modified/llvm/trunk/include/llvm/Support/Signals.hllvm.src/include/llvm/Support/Signals.h
The file was modified/llvm/trunk/lib/Support/Unix/Signals.incllvm.src/lib/Support/Unix/Signals.inc
The file was modified/llvm/trunk/lib/Support/Windows/Signals.incllvm.src/lib/Support/Windows/Signals.inc
The file was modified/llvm/trunk/unittests/Support/CMakeLists.txtllvm.src/unittests/Support/CMakeLists.txt
The file was added/llvm/trunk/unittests/Support/SignalsTest.cppllvm.src/unittests/Support/SignalsTest.cpp
Revision 375287 by rnk:
[X86] Fix register parsing in .seh_* in Intel syntax

Previously, the parser checked for a '%' prefix to indicate a register.
In Intel syntax mode, LLVM does not print a '%' prefix on registers, so
LLVM could not parse its own assembly output. Instead, require that
register numbers be integer literals, or at least start with an integer
literal, which is consistent with .cfi_* directive register parsing.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cppllvm.src/lib/Target/X86/AsmParser/X86AsmParser.cpp
The file was modified/llvm/trunk/test/MC/AsmParser/directive_seh.sllvm.src/test/MC/AsmParser/directive_seh.s
Revision 375286 by dergachev:
[analyzer] exploded-graph-rewriter: Unforget to censor stmt_ids in the test.

They're not stable across machines.

Fixes buildbots after r375278.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/test/Analysis/dump_egraph.cclang.src/test/Analysis/dump_egraph.c
Revision 375285 by lebedevri:
[NFC][CVP] Some tests for `mul` no-wrap deduction
Change TypePath in RepositoryPath in Workspace
The file was added/llvm/trunk/test/Transforms/CorrelatedValuePropagation/mul.llllvm.src/test/Transforms/CorrelatedValuePropagation/mul.ll
Revision 375284 by pcc:
Update global_symbols.txt.
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/lib/sanitizer_common/symbolizer/scripts/global_symbols.txtcompiler-rt.src/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
Revision 375283 by tlively:
[WebAssembly] Allow multivalue signatures in object files

Summary:
Also changes the wasm YAML format to reflect the possibility of having
multiple return types and to put the returns after the params for
consistency with the binary encoding.

Reviewers: aheejin, sbc100

Subscribers: dschuff, jgravelle-google, hiraditya, sunfish, arphaman, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69156
Change TypePath in RepositoryPath in Workspace
The file was modified/lld/trunk/test/wasm/Inputs/globals.yamlN/A
The file was modified/lld/trunk/test/wasm/Inputs/undefined-globals.yamlN/A
The file was modified/lld/trunk/test/wasm/alias.llN/A
The file was modified/lld/trunk/test/wasm/call-indirect.llN/A
The file was modified/lld/trunk/test/wasm/event-section.llN/A
The file was modified/lld/trunk/test/wasm/function-imports-first.llN/A
The file was modified/lld/trunk/test/wasm/function-imports.llN/A
The file was modified/lld/trunk/test/wasm/function-index.testN/A
The file was modified/lld/trunk/test/wasm/gc-sections.llN/A
The file was modified/lld/trunk/test/wasm/local-symbols.llN/A
The file was modified/lld/trunk/test/wasm/locals-duplicate.testN/A
The file was modified/lld/trunk/test/wasm/relocatable.llN/A
The file was modified/lld/trunk/test/wasm/stack-pointer.llN/A
The file was modified/lld/trunk/test/wasm/undefined-weak-call.llN/A
The file was modified/lld/trunk/test/wasm/weak-alias-overide.llN/A
The file was modified/lld/trunk/test/wasm/weak-alias.llN/A
The file was modified/lld/trunk/test/wasm/weak-symbols.llN/A
The file was modified/lld/trunk/test/wasm/weak-undefined.llN/A
The file was modified/llvm/trunk/include/llvm/ObjectYAML/WasmYAML.hllvm.src/include/llvm/ObjectYAML/WasmYAML.h
The file was modified/llvm/trunk/lib/Object/WasmObjectFile.cppllvm.src/lib/Object/WasmObjectFile.cpp
The file was modified/llvm/trunk/lib/ObjectYAML/WasmEmitter.cppllvm.src/lib/ObjectYAML/WasmEmitter.cpp
The file was modified/llvm/trunk/lib/ObjectYAML/WasmYAML.cppllvm.src/lib/ObjectYAML/WasmYAML.cpp
The file was modified/llvm/trunk/test/CodeGen/WebAssembly/multivalue.llllvm.src/test/CodeGen/WebAssembly/multivalue.ll
The file was modified/llvm/trunk/test/CodeGen/WebAssembly/tailcall.llllvm.src/test/CodeGen/WebAssembly/tailcall.ll
The file was modified/llvm/trunk/test/MC/WebAssembly/assembler-binary.llllvm.src/test/MC/WebAssembly/assembler-binary.ll
The file was modified/llvm/trunk/test/MC/WebAssembly/comdat.llllvm.src/test/MC/WebAssembly/comdat.ll
The file was modified/llvm/trunk/test/MC/WebAssembly/data-section.sllvm.src/test/MC/WebAssembly/data-section.s
The file was modified/llvm/trunk/test/MC/WebAssembly/event-section.llllvm.src/test/MC/WebAssembly/event-section.ll
The file was modified/llvm/trunk/test/MC/WebAssembly/external-func-address.llllvm.src/test/MC/WebAssembly/external-func-address.ll
The file was modified/llvm/trunk/test/MC/WebAssembly/libcall.llllvm.src/test/MC/WebAssembly/libcall.ll
The file was modified/llvm/trunk/test/MC/WebAssembly/reloc-pic.sllvm.src/test/MC/WebAssembly/reloc-pic.s
The file was modified/llvm/trunk/test/MC/WebAssembly/type-index.sllvm.src/test/MC/WebAssembly/type-index.s
The file was modified/llvm/trunk/test/MC/WebAssembly/types.llllvm.src/test/MC/WebAssembly/types.ll
The file was modified/llvm/trunk/test/MC/WebAssembly/weak-alias.llllvm.src/test/MC/WebAssembly/weak-alias.ll
The file was modified/llvm/trunk/test/Object/wasm-duplicate-name.testllvm.src/test/Object/wasm-duplicate-name.test
The file was modified/llvm/trunk/test/Object/wasm-relocs-and-producers.yamlllvm.src/test/Object/wasm-relocs-and-producers.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/code_section.yamlllvm.src/test/ObjectYAML/wasm/code_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/event_section.yamlllvm.src/test/ObjectYAML/wasm/event_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/export_section.yamlllvm.src/test/ObjectYAML/wasm/export_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/function_section.yamlllvm.src/test/ObjectYAML/wasm/function_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/import_memory_shared.yamlllvm.src/test/ObjectYAML/wasm/import_memory_shared.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/import_section.yamlllvm.src/test/ObjectYAML/wasm/import_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/invalid_section_order.yamlllvm.src/test/ObjectYAML/wasm/invalid_section_order.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/linking_section.yamlllvm.src/test/ObjectYAML/wasm/linking_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/name_section.yamlllvm.src/test/ObjectYAML/wasm/name_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/start_section.yamlllvm.src/test/ObjectYAML/wasm/start_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/type_section.yamlllvm.src/test/ObjectYAML/wasm/type_section.yaml
The file was modified/llvm/trunk/test/ObjectYAML/wasm/weak_symbols.yamlllvm.src/test/ObjectYAML/wasm/weak_symbols.yaml
The file was modified/llvm/trunk/test/tools/llvm-nm/wasm/exports.yamlllvm.src/test/tools/llvm-nm/wasm/exports.yaml
The file was modified/llvm/trunk/test/tools/llvm-nm/wasm/imports.yamlllvm.src/test/tools/llvm-nm/wasm/imports.yaml
The file was modified/llvm/trunk/test/tools/llvm-nm/wasm/weak-symbols.yamlllvm.src/test/tools/llvm-nm/wasm/weak-symbols.yaml
The file was modified/llvm/trunk/test/tools/llvm-readobj/wasm-imports.testllvm.src/test/tools/llvm-readobj/wasm-imports.test
The file was modified/llvm/trunk/tools/obj2yaml/wasm2yaml.cppllvm.src/tools/obj2yaml/wasm2yaml.cpp
Revision 375282 by dergachev:
[analyzer] exploded-graph-rewriter: Rename Environment to Expressions.

It's less confusing for newcomers.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/test/Analysis/exploded-graph-rewriter/environment.dotclang.src/test/Analysis/exploded-graph-rewriter/environment.dot
The file was modified/cfe/trunk/test/Analysis/exploded-graph-rewriter/escapes.cclang.src/test/Analysis/exploded-graph-rewriter/escapes.c
The file was modified/cfe/trunk/utils/analyzer/exploded-graph-rewriter.pyclang.src/utils/analyzer/exploded-graph-rewriter.py
Revision 375281 by dergachev:
[analyzer] Fix FieldRegion dumps.

The '->' thing has always been confusing; the actual operation '->'
translates to a pointer dereference together with adding a FieldRegion,
but FieldRegion on its own doesn't imply an additional pointer
dereference.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/StaticAnalyzer/Core/MemRegion.cppclang.src/lib/StaticAnalyzer/Core/MemRegion.cpp
The file was modified/cfe/trunk/test/Analysis/dump_egraph.cppclang.src/test/Analysis/dump_egraph.cpp
The file was modified/cfe/trunk/test/Analysis/exploded-graph-rewriter/initializers_under_construction.cppclang.src/test/Analysis/exploded-graph-rewriter/initializers_under_construction.cpp
The file was modified/cfe/trunk/test/Analysis/expr-inspection.cclang.src/test/Analysis/expr-inspection.c
Revision 375280 by dergachev:
[analyzer] Drop the logic for collapsing the state if it's same as in preds.

One of the first attempts to reduce the size of the exploded graph dumps
was to skip the state dump as long as the state is the same as in all of
the predecessor nodes. With all the new facilities in place (node joining,
diff dumps), this feature doesn't do much, and when it does,
it's more harmful than useful. Let's remove it.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/StaticAnalyzer/Core/ExprEngine.cppclang.src/lib/StaticAnalyzer/Core/ExprEngine.cpp
The file was modified/cfe/trunk/test/Analysis/dump_egraph.cclang.src/test/Analysis/dump_egraph.c
Revision 375279 by dergachev:
[analyzer] exploded-graph-rewriter: Fix dump for state 0.

It shouldn't say "unspecified" when the state is specified to be empty.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/test/Analysis/exploded-graph-rewriter/edge.dotclang.src/test/Analysis/exploded-graph-rewriter/edge.dot
The file was modified/cfe/trunk/test/Analysis/exploded-graph-rewriter/node_labels.dotclang.src/test/Analysis/exploded-graph-rewriter/node_labels.dot
The file was modified/cfe/trunk/test/Analysis/exploded-graph-rewriter/program_points.dotclang.src/test/Analysis/exploded-graph-rewriter/program_points.dot
The file was modified/cfe/trunk/test/Analysis/exploded-graph-rewriter/trimmers.dotclang.src/test/Analysis/exploded-graph-rewriter/trimmers.dot
The file was modified/cfe/trunk/utils/analyzer/exploded-graph-rewriter.pyclang.src/utils/analyzer/exploded-graph-rewriter.py
Revision 375278 by dergachev:
[analyzer] Fix hidden node traversal in exploded graph dumps.

The joined nodes now actually have the same state. That was intended
from the start but the original implementation turned out to be buggy.

Differential Revision: https://reviews.llvm.org/D69150
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/lib/StaticAnalyzer/Core/ExprEngine.cppclang.src/lib/StaticAnalyzer/Core/ExprEngine.cpp
The file was modified/cfe/trunk/test/Analysis/dump_egraph.cclang.src/test/Analysis/dump_egraph.c
Revision 375277 by qcolombet:
[GISel][CallLowering] Make isIncomingArgumentHandler a pure virtual method

The default implementation of isIncomingArgumentHandler could lead
to generating incorrect code.
Make it a pure virtual method, so that targets know they have to
override it to produce correct code.

NFC

Differential Revision: https://reviews.llvm.org/D69187
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/CodeGen/GlobalISel/CallLowering.hllvm.src/include/llvm/CodeGen/GlobalISel/CallLowering.h
The file was modified/llvm/trunk/lib/Target/AArch64/AArch64CallLowering.cppllvm.src/lib/Target/AArch64/AArch64CallLowering.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUCallLowering.cppllvm.src/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modified/llvm/trunk/lib/Target/ARM/ARMCallLowering.cppllvm.src/lib/Target/ARM/ARMCallLowering.cpp
The file was modified/llvm/trunk/lib/Target/X86/X86CallLowering.cppllvm.src/lib/Target/X86/X86CallLowering.cpp
Revision 375276 by pcc:
scudo: Update TLS_SLOT_SANITIZER value.

Android now allocates only 8 fixed TLS slots. Somehow we were getting away
with using a non-existent slot until now, but in some cases the TLS slots
were being placed at the end of a page, which led to a segfault at startup.

Differential Revision: https://reviews.llvm.org/D69191
Change TypePath in RepositoryPath in Workspace
The file was modified/compiler-rt/trunk/lib/scudo/standalone/linux.hcompiler-rt.src/lib/scudo/standalone/linux.h
Revision 375273 by lebedevri:
[CVP] After proving that @llvm.with.overflow()/@llvm.sat() don't overflow, also try to prove other no-wrap

Summary:
CVP, unlike InstCombine, does not run till exaustion.
It only does a single pass.

When dealing with those special binops, if we prove that they can
safely be demoted into their usual binop form,
we do set the no-wrap we deduced. But when dealing with usual binops,
we try to deduce both no-wraps.

So if we convert e.g. @llvm.uadd.with.overflow() to `add nuw`,
we won't attempt to check whether it can be `add nuw nsw`.

This patch proposes to call `processBinOp()` on newly-created binop,
which is identical to what we do for div/rem already.

Reviewers: nikic, spatel, reames

Reviewed By: nikic

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69183
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/Scalar/CorrelatedValuePropagation.cppllvm.src/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
The file was modified/llvm/trunk/test/Transforms/CorrelatedValuePropagation/overflows.llllvm.src/test/Transforms/CorrelatedValuePropagation/overflows.ll
Revision 375269 by Lang Hames:
[examples] Fix some comments in the LLJITWithJITLink example
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/examples/LLJITExamples/LLJITWithJITLink/LLJITWithJITLink.cppllvm.src/examples/LLJITExamples/LLJITWithJITLink/LLJITWithJITLink.cpp
Revision 375268 by gkistanova:
Apply defaut cmake flags to ABITestsuitBuilder.
Change TypePath in RepositoryPath in Workspace
The file was modified/zorg/trunk/zorg/buildbot/builders/ABITestsuitBuilder.pyzorg/zorg/buildbot/builders/ABITestsuitBuilder.py
Revision 375267 by arsenm:
AMDGPU: Relax 32-bit SGPR register class

Mostly use SReg_32 instead of SReg_32_XM0 for arbitrary values. This
will allow the register coalescer to do a better job eliminating
copies to m0.

For GlobalISel, as a terrible hack, use SGPR_32 for things that should
use SCC until booleans are solved.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cppllvm.src/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cppllvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cppllvm.src/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cppllvm.src/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cppllvm.src/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modified/llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.hllvm.src/lib/Target/AMDGPU/SIRegisterInfo.h
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.i16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.i16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.u16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.u16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.i16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.i16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.u16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pknorm.u16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mbcnt.lo.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.mbcnt.lo.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sffbh.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sffbh.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitreverse.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitreverse.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-frame-index.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-frame-index.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-gep.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-gep.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-mask.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-mask.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mirllvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.llllvm.src/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.llllvm.src/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.llllvm.src/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/inline-constraints.llllvm.src/test/CodeGen/AMDGPU/inline-constraints.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.llllvm.src/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.llllvm.src/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.llllvm.src/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/read_register.llllvm.src/test/CodeGen/AMDGPU/read_register.ll
Revision 375266 by Lang Hames:
[examples] Add an example of how to use JITLink and small-code-model with LLJIT.

JITLink is LLVM's newer jit-linker. It is an alternative to (and hopefully
eventually a replacement for) LLVM's older jit-linker, RuntimeDyld. Unlike
RuntimeDyld which requries JIT'd code to be complied with the large code
model, JITlink can link code compiled with the small code model, which is
the native code model for a number of targets (including all supported MachO
targets).

This example shows how to:

-- Create a JITLink InProcessMemoryManager
-- Set the code model to small
-- Use a JITLink backed ObjectLinkingLayer as the linking layer for LLJIT
   (rather than the default RTDyldObjectLinkingLayer).

Note: This example will only work on platforms supported by JITLink. As of
this commit that's MachO/x86-64 and MachO/arm64.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/examples/LLJITExamples/CMakeLists.txtllvm.src/examples/LLJITExamples/CMakeLists.txt
The file was added/llvm/trunk/examples/LLJITExamples/LLJITWithJITLinkllvm.src/examples/LLJITExamples/LLJITWithJITLink
The file was added/llvm/trunk/examples/LLJITExamples/LLJITWithJITLink/CMakeLists.txtllvm.src/examples/LLJITExamples/LLJITWithJITLink/CMakeLists.txt
The file was added/llvm/trunk/examples/LLJITExamples/LLJITWithJITLink/LLJITWithJITLink.cppllvm.src/examples/LLJITExamples/LLJITWithJITLink/LLJITWithJITLink.cpp
Revision 375265 by kerbowa:
AMDGPU: Fix SMEM WAR hazard for gfx10 readlane

Summary: Hazard recognizer fails to see hazard with V_READLANE_B32_gfx10.

Reviewers: rampitec

Reviewed By: rampitec

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69172
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/GCNHazardRecognizer.cppllvm.src/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
The file was modified/llvm/trunk/test/CodeGen/AMDGPU/smem-war-hazard.mirllvm.src/test/CodeGen/AMDGPU/smem-war-hazard.mir
Revision 375264 by yln:
[lit] Reduce value of synthesized timeouts

Large timeout values (one year, positive infinity) trip up Python on
Windows with "OverflowError: timeout value is too large".  One week
seems to work and is still large enough in practice.

Thanks to Simon Pilgrim for helping me test this.
https://reviews.llvm.org/rL375171
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/utils/lit/lit/run.pyllvm.src/utils/lit/lit/run.py