FailedChanges

Summary

  1. [MIParser] Set RegClassOrRegBank during instruction parsing MachineRegisterInfo::createGenericVirtualRegister sets RegClassOrRegBank to static_cast<RegisterBank *>(nullptr). MIParser on the other hand doesn't. When we attempt to constrain Register Class on such VReg, additional COPY is generated. This way we avoid COPY instructions showing in test that have MIR input while they are not present with llvm-ir input that was used to create given MIR for a -run-pass test. Differential Revision: https://reviews.llvm.org/D68946
  2. [MIPS GlobalISel] Select MSA vector generic and builtin add Select vector G_ADD for MIPS32 with MSA. We have to set bank for vector operands to fprb and selectImpl will do the rest. __builtin_msa_addv_<format> will be transformed into G_ADD in legalizeIntrinsic and selected in the same way. __builtin_msa_addvi_<format> will be directly selected into ADDVI_<format> in legalizeIntrinsic. MIR tests for it have unnecessary additional copies. Capture current state of tests with run-pass=legalizer with a test in test/CodeGen/MIR/Mips. Differential Revision: https://reviews.llvm.org/D68984
  3. [ThinLTO] Add code comment. NFC
  4. [Alignment][NFC] Convert StoreInst to MaybeAlign Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69303
  5. [Alignment][NFC] Convert LoadInst to MaybeAlign Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69302
  6. [PowerPC] Turn on CR-Logical reducer pass This re-commits r375152 which was pulled in r375233 because it broke the EXPENSIVE_CHECKS bot on Windows. The reason for the failure was a bug in the pass that the commit turned on by default. This patch fixes that bug and turns the pass back on. This patch has been verified on the buildbot that originally failed thanks to Simon Pilgrim. Differential revision: https://reviews.llvm.org/D52431
  7. [Alignment][NFC] Use MaybeAlign in AttrBuilder Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69300
  8. [Alignment][NFC] Attributes use Align/MaybeAlign Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: jholewinski, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69278
Revision 375502 by petar.avramovic:
[MIParser] Set RegClassOrRegBank during instruction parsing

MachineRegisterInfo::createGenericVirtualRegister sets
RegClassOrRegBank to static_cast<RegisterBank *>(nullptr).
MIParser on the other hand doesn't. When we attempt to constrain
Register Class on such VReg, additional COPY is generated.
This way we avoid COPY instructions showing in test that have MIR
input while they are not present with llvm-ir input that was used
to create given MIR for a -run-pass test.

Differential Revision: https://reviews.llvm.org/D68946
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cppllvm.src/lib/CodeGen/MIRParser/MIParser.cpp
The file was modified/llvm/trunk/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mirllvm.src/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
The file was modified/llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mirllvm.src/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir
The file was modified/llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/sitofp_and_uitofp.mirllvm.src/test/CodeGen/Mips/GlobalISel/legalizer/sitofp_and_uitofp.mir
Revision 375501 by petar.avramovic:
[MIPS GlobalISel] Select MSA vector generic and builtin add

Select vector G_ADD for MIPS32 with MSA. We have to set bank
for vector operands to fprb and selectImpl will do the rest.
__builtin_msa_addv_<format> will be transformed into G_ADD
in legalizeIntrinsic and selected in the same way.
__builtin_msa_addvi_<format> will be directly selected into
ADDVI_<format> in legalizeIntrinsic. MIR tests for it have
unnecessary additional copies. Capture current state of tests
with run-pass=legalizer with a test in test/CodeGen/MIR/Mips.

Differential Revision: https://reviews.llvm.org/D68984
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cppllvm.src/lib/Target/Mips/MipsLegalizerInfo.cpp
The file was modified/llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cppllvm.src/lib/Target/Mips/MipsRegisterBankInfo.cpp
The file was added/llvm/trunk/test/CodeGen/MIR/Mips/setRegClassOrRegBank.llllvm.src/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll
The file was added/llvm/trunk/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mirllvm.src/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
The file was added/llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/add_vec.mirllvm.src/test/CodeGen/Mips/GlobalISel/instruction-select/add_vec.mir
The file was added/llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/add_vec.mirllvm.src/test/CodeGen/Mips/GlobalISel/legalizer/add_vec.mir
The file was added/llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mirllvm.src/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir
The file was added/llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.llllvm.src/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll
The file was added/llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec_builtin.llllvm.src/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec_builtin.ll
The file was added/llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/add_vec.mirllvm.src/test/CodeGen/Mips/GlobalISel/regbankselect/add_vec.mir
Revision 375500 by evgeny777:
[ThinLTO] Add code comment. NFC
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/IPO/FunctionImport.cppllvm.src/lib/Transforms/IPO/FunctionImport.cpp
Revision 375499 by gchatelet:
[Alignment][NFC] Convert StoreInst to MaybeAlign

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69303
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/IR/Instructions.hllvm.src/include/llvm/IR/Instructions.h
The file was modified/llvm/trunk/lib/AsmParser/LLParser.cppllvm.src/lib/AsmParser/LLParser.cpp
The file was modified/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cppllvm.src/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modified/llvm/trunk/lib/IR/Instructions.cppllvm.src/lib/IR/Instructions.cpp
The file was modified/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cppllvm.src/lib/Transforms/IPO/GlobalOpt.cpp
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cppllvm.src/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cppllvm.src/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
The file was modified/llvm/trunk/lib/Transforms/Scalar/DeadStoreElimination.cppllvm.src/lib/Transforms/Scalar/DeadStoreElimination.cpp
Revision 375498 by gchatelet:
[Alignment][NFC] Convert LoadInst to MaybeAlign

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69302
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/IR/Instructions.hllvm.src/include/llvm/IR/Instructions.h
The file was modified/llvm/trunk/lib/AsmParser/LLParser.cppllvm.src/lib/AsmParser/LLParser.cpp
The file was modified/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cppllvm.src/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modified/llvm/trunk/lib/IR/Instructions.cppllvm.src/lib/IR/Instructions.cpp
The file was modified/llvm/trunk/lib/Transforms/IPO/GlobalOpt.cppllvm.src/lib/Transforms/IPO/GlobalOpt.cpp
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cppllvm.src/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modified/llvm/trunk/lib/Transforms/InstCombine/InstCombinePHI.cppllvm.src/lib/Transforms/InstCombine/InstCombinePHI.cpp
The file was modified/llvm/trunk/lib/Transforms/Scalar/GVN.cppllvm.src/lib/Transforms/Scalar/GVN.cpp
The file was modified/llvm/trunk/lib/Transforms/Scalar/JumpThreading.cppllvm.src/lib/Transforms/Scalar/JumpThreading.cpp
The file was modified/llvm/trunk/lib/Transforms/Scalar/LoopLoadElimination.cppllvm.src/lib/Transforms/Scalar/LoopLoadElimination.cpp
Revision 375497 by nemanjai:
[PowerPC] Turn on CR-Logical reducer pass

This re-commits r375152 which was pulled in r375233 because it broke
the EXPENSIVE_CHECKS bot on Windows.

The reason for the failure was a bug in the pass that the commit turned
on by default. This patch fixes that bug and turns the pass back on.
This patch has been verified on the buildbot that originally failed
thanks to Simon Pilgrim.

Differential revision: https://reviews.llvm.org/D52431
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCReduceCRLogicals.cppllvm.src/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
The file was modified/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cppllvm.src/lib/Target/PowerPC/PPCTargetMachine.cpp
The file was modified/llvm/trunk/test/CodeGen/PowerPC/2008-10-28-f128-i32.llllvm.src/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
The file was modified/llvm/trunk/test/CodeGen/PowerPC/brcond.llllvm.src/test/CodeGen/PowerPC/brcond.ll
The file was modified/llvm/trunk/test/CodeGen/PowerPC/pr42492.llllvm.src/test/CodeGen/PowerPC/pr42492.ll
The file was modified/llvm/trunk/test/CodeGen/PowerPC/tocSaveInPrologue.llllvm.src/test/CodeGen/PowerPC/tocSaveInPrologue.ll
The file was modified/llvm/trunk/test/CodeGen/PowerPC/vec-min-max.llllvm.src/test/CodeGen/PowerPC/vec-min-max.ll
Revision 375496 by gchatelet:
[Alignment][NFC] Use MaybeAlign in AttrBuilder

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69300
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/IR/Attributes.hllvm.src/include/llvm/IR/Attributes.h
The file was modified/llvm/trunk/lib/AsmParser/LLParser.cppllvm.src/lib/AsmParser/LLParser.cpp
The file was modified/llvm/trunk/lib/AsmParser/LLParser.hllvm.src/lib/AsmParser/LLParser.h
The file was modified/llvm/trunk/lib/IR/Attributes.cppllvm.src/lib/IR/Attributes.cpp
Revision 375495 by gchatelet:
[Alignment][NFC] Attributes use Align/MaybeAlign

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: jholewinski, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69278
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/IR/Attributes.hllvm.src/include/llvm/IR/Attributes.h
The file was modified/llvm/trunk/include/llvm/IR/Function.hllvm.src/include/llvm/IR/Function.h
The file was modified/llvm/trunk/include/llvm/IR/InstrTypes.hllvm.src/include/llvm/IR/InstrTypes.h
The file was modified/llvm/trunk/lib/IR/AttributeImpl.hllvm.src/lib/IR/AttributeImpl.h
The file was modified/llvm/trunk/lib/IR/Attributes.cppllvm.src/lib/IR/Attributes.cpp
The file was modified/llvm/trunk/lib/Target/NVPTX/NVPTXAsmPrinter.cppllvm.src/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
The file was modified/llvm/trunk/unittests/IR/AttributesTest.cppllvm.src/unittests/IR/AttributesTest.cpp