FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-zorg.git)

Summary

  1. Migrate the annotated buildbots to github (details)
Commit c5fbd2ca11d0625e659a1f45f6a083e83c137954 by rnk
Migrate the annotated buildbots to github
Summary: Reuse the base LLVMBuildFactory logic for checking out and
updating llvm-project instead of implementing it in the script.
There are advantages to putting the 'git' logic in the script, but since
we need a master restart anyway to move to git, we might as well reuse
the buildbot git step for now. I'm not sure what the best practices are
for incrementally updating a git repository anyway.
Reviewers: inglorion, thakis
Subscribers: gkistanova, llvm-commits
Differential Revision: https://reviews.llvm.org/D69450
The file was modifiedzorg/buildbot/builders/annotated/annotated_builder.py
The file was modifiedzorg/buildbot/builders/AnnotatedBuilder.py

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [Alignment][NFC] getMemoryOpCost uses MaybeAlign (details)
  2. [LLD][ThinLTO] Handle GUID collision in import global processing (details)
  3. Revert "Add an instruction marker field to the ExtraInfo in (details)
  4. [gicombiner] Add parse failure tests for defs/match (details)
  5. AMDGPU: Fix the broken dominator tree when creating waterfall loop for (details)
  6. AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG (details)
  7. [ARM] Uses "Sun Style" syntax for section switching (details)
  8. [Alignment][NFC] Convert AllocaInst to MaybeAlign (details)
  9. GlobalISel: Implement widenScalar for G_INSERT_VECTOR_ELT (details)
  10. [AMDGPU] Fixed asan failure in SIFoldOperands (details)
  11. Revert "[ARM] Uses "Sun Style" syntax for section switching" (details)
  12.     Add the ability to pass extra args to a Python breakpoint callback. (details)
  13. Update version number in llvm python bindings (details)
  14. [x86] add tests for extractelement with undef index (PR42689); NFC (details)
  15. [BPF] fix a CO-RE issue with -mattr=+alu32 (details)
  16. [globalisel] Add LLVMDev 2019 talks and links for the 2017 talks (details)
  17. [globalisel] Fix typo in 'Add LLVMDev 2019 talks and links for the 2017 (details)
  18. [AMDGPU] Enable SGPR copy folding (details)
  19. lldb/COFF: Create a separate "section" for the file header (details)
  20. [lit] Don't fail when printing test output with special chars (details)
  21. lldb/minidump: Refactor memory region computation code (details)
  22. [clang][DependencyScanning] 80-col. (details)
  23. [LLDB] Fix inline variable only used in assertion. (NFC) (details)
  24. [globalisel] Restructure the GlobalISel documentation (details)
  25. Use __builtin_strlen in constexpr StringRef ctor with MSVC (details)
  26. Fix after 738af7a6241c98164625b9cd1ba9f8af4e36f197 (details)
  27. [libFuzzer] Enable extra counters for Fuchsia. (details)
  28. [lit] Move sharding logic into separate function (details)
  29. [SDAG] fold extract_vector_elt with undef index (details)
  30. [Clang][Bundler] Error reporting improvements (details)
  31. Add Record::getValueAsOptionalDef(). (details)
  32. [NFC] Add a tablegen node for the root of the AST node hierarchies. (details)
Commit a4783ef58d3dd52b2079e885e9b4467c6b0b3a16 by gchatelet
[Alignment][NFC] getMemoryOpCost uses MaybeAlign
Summary: This is patch is part of a series to introduce an Alignment
type. See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this
patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: nemanjai, hiraditya, kbarton, MaskRay, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69307
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
Commit cc0b9647b76178bc3869bbfff80535ad86366472 by tejohnson
[LLD][ThinLTO] Handle GUID collision in import global processing
Summary: If there are a GUID collision between two globals checking the
summarylist from the import index to make assumption can be dangerous.
Do not assume that a GlobalValue that has a GlobalVarSummary actually is
a GlobalVariable as it can be another GlobalValue with the same GUID
that the summary is connected to.
Patch by Joel Klinghed (the_jk@opera.com)
Reviewers: evgeny777, tejohnson
Reviewed By: tejohnson
Subscribers: tejohnson, dblaikie, MaskRay, mehdi_amini, inglorion,
hiraditya, steven_wu, dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67322
The file was addedllvm/test/ThinLTO/X86/guid_collision.ll
The file was addedllvm/test/ThinLTO/X86/Inputs/guid_collision.ll
The file was modifiedllvm/lib/Transforms/Utils/FunctionImportUtils.cpp
Commit 64c1f6602a029e3b0914b95d5b580e4b02fc43c1 by akhuang
Revert "Add an instruction marker field to the ExtraInfo in
MachineInstrs."
Reverting commit b85b4e5a6f8579c137fecb59a4d75d7bfb111f79 due to some
buildbot failures/ out of memory errors.
The file was modifiedllvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h
The file was modifiedllvm/test/CodeGen/X86/taildup-heapallocsite.ll
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FastISel.cpp
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
The file was modifiedllvm/test/CodeGen/X86/label-heapallocsite.ll
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
The file was modifiedllvm/unittests/CodeGen/MachineInstrTest.cpp
Commit a6e1de4afc51560df18c95cb616dec51248ed660 by daniel_l_sanders
[gicombiner] Add parse failure tests for defs/match
The file was addedllvm/test/TableGen/GICombinerEmitter/defs-invalid.td
The file was modifiedllvm/utils/TableGen/GICombinerEmitter.cpp
The file was addedllvm/test/TableGen/GICombinerEmitter/match-invalid.td
Commit 1ce552f3ef8d6455c10a9886191c1898594975e0 by changpeng.fang
AMDGPU: Fix the broken dominator tree when creating waterfall loop for
resource descriptor
Summary:
In loadSRsrcFromVGPR, if MBB is the same as Succ, Remiander is not the
immediate dominator of Succ.
Reviewer:
arsenm
Differential Revision:
https://reviews.llvm.org/D69358
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
Commit 171cf5302f43776b07615e32b2ffd6ddf4e5d890 by arsenm2
AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG
Custom lower this to a target instruction with the merge operands. I
think it might be better to directly select this and emit a
REG_SEQUENCE, but this would be more work since it would require
splitting the tablegen patterns for these cases from the other atomics.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg-with-success.mir
The file was modifiedllvm/lib/Target/AMDGPU/FLATInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructions.td
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir
Commit 03de2f84fc4acf06c719cd007b5459c9d4d0a20c by jiancai
[ARM] Uses "Sun Style" syntax for section switching
Summary: Support "Sun Style" syntax for section switching
("#alloc,#write" etc). https://bugs.llvm.org/show_bug.cgi?id=43759
Reviewers: peter.smith, eli.friedman, kristof.beyls, t.p.northover
Reviewed By: peter.smith
Subscribers: MaskRay, llozano, manojgupta, nickdesaulniers,
kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69296
The file was modifiedllvm/include/llvm/MC/MCAsmInfo.h
The file was addedllvm/test/MC/AsmParser/gas-compl-sun-elf.s
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
Commit e8a0a0904b2b144929312ac424626b3e026bf9fb by gchatelet
[Alignment][NFC] Convert AllocaInst to MaybeAlign
Summary: This is patch is part of a series to introduce an Alignment
type. See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this
patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Reviewed By: courbet
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69301
The file was modifiedllvm/lib/CodeGen/SjLjEHPrepare.cpp
The file was modifiedllvm/lib/IR/Instructions.cpp
The file was modifiedllvm/lib/Transforms/Utils/InlineFunction.cpp
The file was modifiedllvm/include/llvm/IR/Instructions.h
The file was modifiedllvm/lib/Transforms/IPO/ArgumentPromotion.cpp
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/lib/Transforms/Scalar/SROA.cpp
Commit 1a276d1e8c5da57a0c83d1b1d1a02ec0bcdb77d7 by arsenm2
GlobalISel: Implement widenScalar for G_INSERT_VECTOR_ELT
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit c7dcacf16a680f6a5ef4cbe15ff9ca40f7d128b8 by Stanislav.Mekhanoshin
[AMDGPU] Fixed asan failure in SIFoldOperands
Both tryFoldOMod() and tryFoldClamp() remove original instruction, so
the check MI.modifiesRegister() may use a deleted MI.
Differential Revision: https://reviews.llvm.org/D69448
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Commit a6b0219fc4a78e96ff268d101b911466dedbbf2c by jiancai
Revert "[ARM] Uses "Sun Style" syntax for section switching"
This reverts commit 03de2f84fc4acf06c719cd007b5459c9d4d0a20c.
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
The file was modifiedllvm/include/llvm/MC/MCAsmInfo.h
The file was removedllvm/test/MC/AsmParser/gas-compl-sun-elf.s
Commit 738af7a6241c98164625b9cd1ba9f8af4e36f197 by jingham
    Add the ability to pass extra args to a Python breakpoint callback.
    For example, it is pretty easy to write a breakpoint command that
implements "stop when my caller is Foo", and
   it is pretty easy to write a breakpoint command that implements "stop
when my caller is Bar". But there's no
   way to write a generic "stop when my caller is..." function, and then
specify the caller when you add the
   command to a breakpoint.
    With this patch, you can pass this data in a SBStructuredData
dictionary. That will get stored in
   the PythonCommandBaton for the breakpoint, and passed to the
implementation function (if it has the right
   signature) when the breakpoint is hit. Then in lldb, you can say:
    (lldb) break com add -F caller_is -k caller_name -v Foo
    More generally this will allow us to write reusable Python
breakpoint commands.
    Differential Revision: https://reviews.llvm.org/D68671
The file was modifiedlldb/include/lldb/Interpreter/ScriptInterpreter.h
The file was modifiedlldb/scripts/interface/SBBreakpoint.i
The file was modifiedlldb/include/lldb/API/SBBreakpoint.h
The file was modifiedlldb/source/API/SBBreakpointLocation.cpp
The file was modifiedlldb/scripts/interface/SBBreakpointName.i
The file was modifiedlldb/source/Interpreter/OptionGroupPythonClassWithDict.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_command/TestBreakpointCommandsFromPython.py
The file was modifiedlldb/source/API/SBBreakpoint.cpp
The file was modifiedlldb/include/lldb/API/SBBreakpointName.h
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_command/bktptcmd.py
The file was modifiedlldb/include/lldb/API/SBBreakpointLocation.h
The file was modifiedlldb/include/lldb/API/SBStructuredData.h
The file was modifiedlldb/include/lldb/Interpreter/OptionGroupPythonClassWithDict.h
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
The file was modifiedlldb/scripts/Python/python-wrapper.swig
The file was modifiedlldb/source/Interpreter/ScriptInterpreter.cpp
The file was modifiedlldb/source/Commands/CommandObjectBreakpoint.cpp
The file was modifiedlldb/scripts/interface/SBBreakpointLocation.i
The file was modifiedlldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
The file was modifiedlldb/source/Commands/Options.td
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h
The file was modifiedlldb/source/API/SBBreakpointName.cpp
The file was modifiedlldb/source/Commands/CommandObjectThread.cpp
The file was modifiedlldb/source/Commands/CommandObjectBreakpointCommand.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
Commit 0e4d41531157a8525ce59e9958ad3d81b7b38cf2 by daltenty
Update version number in llvm python bindings
Summary: The version number has come out of sync with what is in
CMakeLists.txt, causing loading the bindings to fail.
Reviewers: AustinWells, abhina.sree
Reviewed By: AustinWells
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69436
The file was modifiedllvm/bindings/python/llvm/common.py
Commit e070cf81196d2415f2f64ddbdfed9a49d9b96245 by spatel
[x86] add tests for extractelement with undef index (PR42689); NFC
The file was modifiedllvm/test/CodeGen/X86/extractelement-index.ll
Commit a27c998c0060eef006ca9e225e4d12a35f4d1912 by yhs
[BPF] fix a CO-RE issue with -mattr=+alu32
Ilya Leoshkevich (<iii@linux.ibm.com>) reported an issue that with
-mattr=+alu32 CO-RE has a segfault in BPF MISimplifyPatchable pass.
The pattern will be transformed by MISimplifyPatchable pass looks like
below:
r5 = ld_imm64 @"b:0:0$0:0"
r2 = ldw r5, 0
... r2 ... // use r2 The pass will remove the intermediate 'ldw'
instruction and replacing all r2 with r5 likes below:
r5 = ld_imm64 @"b:0:0$0:0"
... r5 ... // use r5 Later, the ld_imm64 insn will be replaced with
r5 = <patched immediate> for field relocation purpose.
With -mattr=+alu32, the input code may become
r5 = ld_imm64 @"b:0:0$0:0"
w2 = ldw32 r5, 0
... w2 ... // use w2 Replacing "w2" with "r5" is incorrect and will
trigger compiler internal errors.
To fix the problem, if the register class of ldw* dest register is
sub_32, we just replace the original ldw* register with:
w2 = w5 Directly replacing all uses of w2 with in-place constructed w5
for the use operand seems not working in all cases.
The latest kernel will have -mattr=+alu32 on by default, so added this
flag to all CORE tests. Tested with latest kernel bpf-next branch as
well with this patch.
Differential Revision: https://reviews.llvm.org/D69438
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-access-str.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll
The file was addedllvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-struct.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-union.ll
The file was modifiedllvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-array.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-global-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-array.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-global-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-union.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-pointer-1.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/offset-reloc-global-3.ll
The file was modifiedllvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
Commit 7913126a08e5186027d7fdb1ea30972b0f227a83 by daniel_l_sanders
[globalisel] Add LLVMDev 2019 talks and links for the 2017 talks
The file was modifiedllvm/docs/GlobalISel.rst
Commit 27887bc1e7a19bc568db775903d8febdeab2f617 by daniel_l_sanders
[globalisel] Fix typo in 'Add LLVMDev 2019 talks and links for the 2017
talks'
The file was modifiedllvm/docs/GlobalISel.rst
Commit 4c0251da149c99f49550d6c938e6e7f45075194d by Stanislav.Mekhanoshin
[AMDGPU] Enable SGPR copy folding
That used to fail in the last testcase function because after
%0:sreg_64.sub0 was folded into %3:sreg_32_xm0_xexec COPY, it was
further folded into S_STORE_DWORD_IMM. Its legal effective subreg class
is SReg_32 while instruction expects more restricted SReg_32_XM0_EXEC.
However, SIInstrInfo::isLegalRegOperand() passed the legality check and
it was caught in the verifier.
Borrowed code from the verifier to check for RC legality.
Differential Revision: https://reviews.llvm.org/D69445
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was addedllvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir
Commit 73a7a55c0ec976fecadd7a872d24d850f8cd793a by labath
lldb/COFF: Create a separate "section" for the file header
In an attempt to ensure that every part of the module's memory image is
accounted for, D56537 created a special "container section" spanning the
entire image. While that seemed reasonable at the time (and it still
mostly does), it did create a problem of what to put as the "file size"
of the section, because the image is not continuous on disk, as we
generally assume (which is why I put zero there). Additionally, this
arrangement makes it unclear what kind of permissions should be assigned
to that section (which is what my next patch does).
To get around these, this patch partially reverts D56537, and goes back
to top-level sections. Instead, what I do is create a new "section" for
the object file header, which is also being loaded into memory, though
its not considered to be a section in the strictest sense. This makes it
possible to correctly assign file size section, and we can later assign
permissions to it as well.
Reviewers: amccarth, mstorsjo
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D69100
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/export-dllfunc.yaml
The file was addedlldb/test/Shell/ObjectFile/PECOFF/sections.yaml
The file was removedlldb/test/Shell/ObjectFile/PECOFF/subsections.yaml
The file was modifiedlldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
Commit 27fdf8a29d1e0740c342d428fa48eda7b088ac8e by dennyje
[lit] Don't fail when printing test output with special chars
This addresses a UnicodeEncodeError when using Python 3.6.5 in Windows
10.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D69207
The file was modifiedllvm/utils/lit/tests/max-failures.py
The file was modifiedllvm/utils/lit/lit/display.py
The file was modifiedllvm/utils/lit/tests/shtest-shell.py
The file was addedllvm/utils/lit/tests/Inputs/shtest-shell/stdout-encoding.txt
Commit 7c603a41e20f461cf38ec7359a9eaa118fc0db5d by labath
lldb/minidump: Refactor memory region computation code
The goal of this refactor is to enable ProcessMinidump to take into
account the loaded modules and their sections when computing the
permissions of various ranges of memory, as discussed in D66638.
This patch moves some of the responsibility for computing the ranges
from MinidumpParser into ProcessMinidump. MinidumpParser still does the
parsing, but ProcessMinidump becomes responsible for answering the
actual queries about memory ranges. This will enable it (in a follow-up
patch) to augment the information obtained from the parser with data
obtained from actual object files.
The changes in the actual code are fairly straight-forward and just
involve moving code around. MinidumpParser::GetMemoryRegions is renamed
to BuildMemoryRegions to emphasize that it does no caching. The only new
thing is the additional bool flag returned from this function. This
indicates whether the returned regions describe all memory mapped into
the target process. Data obtained from /proc/maps and the MemoryInfoList
stream is considered to be exhaustive. Data obtained from Memory(64)List
is not. This will be used to determine whether we need to augment the
data or not.
This reshuffle means that it is no longer possible/easy to test some of
this code via unit tests, as constructing a ProcessMinidump instance is
hard. Instead, I update the unit tests to only test the parsing of the
actual data, and test the answering of queries through a lit test using
the "memory region" command. The patch also includes some tweaks to the
MemoryRegion class to make the unit tests easier to write.
Reviewers: amccarth, clayborg
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D69035
The file was modifiedlldb/source/Plugins/Process/minidump/ProcessMinidump.h
The file was modifiedlldb/include/lldb/Target/MemoryRegionInfo.h
The file was modifiedlldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
The file was addedlldb/test/Shell/Minidump/memory-region.yaml
The file was modifiedlldb/source/Plugins/Process/minidump/MinidumpParser.h
The file was modifiedlldb/unittests/Process/minidump/MinidumpParserTest.cpp
The file was modifiedlldb/source/Target/CMakeLists.txt
The file was addedlldb/source/Target/MemoryRegionInfo.cpp
The file was modifiedlldb/source/Plugins/Process/minidump/MinidumpParser.cpp
Commit 8da20560ab0da11c47d4718712c9c455e71c2b51 by michael_spencer
[clang][DependencyScanning] 80-col.
The file was modifiedclang/include/clang/Tooling/DependencyScanning/DependencyScanningTool.h
The file was modifiedclang/lib/Tooling/DependencyScanning/DependencyScanningTool.cpp
Commit 10b5cd8ed5272d135ac75a94d3cf5854a0912f84 by Jonas Devlieghere
[LLDB] Fix inline variable only used in assertion. (NFC)
This prevents unused variable warning/error in -DNDEBUG builds. The
variable was introduced in 5934cd11ea3e.
Patch by: Shu-Chun Weng
Differential revision: https://reviews.llvm.org/D69451
The file was modifiedlldb/utils/TableGen/LLDBPropertyDefEmitter.cpp
Commit feab0334f57d9e103965f7743f587cffcb4269f4 by daniel_l_sanders
[globalisel] Restructure the GlobalISel documentation
There's a couple minor deletions amongst this but 99% of it is just
moving the documentation around to prepare the way for more meaningful
changes.
The file was removedllvm/docs/GlobalISel.rst
The file was modifiedllvm/docs/FuzzingLLVM.rst
The file was addedllvm/docs/GlobalISel/Legalizer.rst
The file was addedllvm/docs/GlobalISel/GMIR.rst
The file was addedllvm/docs/GlobalISel/IRTranslator.rst
The file was addedllvm/docs/GlobalISel/Pipeline.rst
The file was addedllvm/docs/GlobalISel/index.rst
The file was addedllvm/docs/GlobalISel/RegBankSelect.rst
The file was addedllvm/docs/GlobalISel/InstructionSelect.rst
The file was modifiedllvm/docs/Reference.rst
The file was addedllvm/docs/GlobalISel/Resources.rst
The file was addedllvm/docs/GlobalISel/Porting.rst
Commit 6c89392592c3eaf174b6f60793b91964297eeb72 by rnk
Use __builtin_strlen in constexpr StringRef ctor with MSVC
MSVC supports it. Fixes the major MSVC compile time regression
introduced in r369961. Now
clang/lib/StaticAnalyzer/Frontend/CheckerRegistry.cpp compiles in 18s
instead of 7+ minutes.
Fixes PR43369
The file was modifiedllvm/include/llvm/ADT/StringRef.h
Commit 5a3c657f3e8fe83ed5074edee94fb2303cd5fa2e by amccarth
Fix after 738af7a6241c98164625b9cd1ba9f8af4e36f197
Default implementation of a new virtual method wasn't returning a value.
The file was modifiedlldb/include/lldb/Interpreter/ScriptInterpreter.h
Commit a88591cff46645bd972a500ec83a0165602ecfa3 by mascasa
[libFuzzer] Enable extra counters for Fuchsia.
The file was modifiedcompiler-rt/lib/fuzzer/FuzzerExtraCounters.cpp
Commit f3ad8ae7b73860ea34b7f6a7e86ab0f314ea3ce6 by jlettner
[lit] Move sharding logic into separate function
The file was modifiedllvm/utils/lit/lit/util.py
The file was modifiedllvm/utils/lit/lit/main.py
The file was modifiedllvm/utils/lit/lit/cl_arguments.py
The file was modifiedllvm/utils/lit/lit/run.py
Commit 4c47617627fbc88fe91195528408178b2dc0e4c9 by spatel
[SDAG] fold extract_vector_elt with undef index
This makes the DAG behavior consistent with IR's extractelement after:
rGb32e4664a715
https://bugs.llvm.org/show_bug.cgi?id=42689
I've tried to maintain test intent for WebAssembly. The AMDGPU test is
trying to test for crashing or other bad behavior, but I'm not sure if
that's possible after this change.
The file was modifiedllvm/test/CodeGen/X86/extractelement-index.ll
The file was modifiedllvm/test/CodeGen/WebAssembly/simd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit dd501045cdea1c80b6788f0266d2a79f8b412eea by serguei.n.dmitriev
[Clang][Bundler] Error reporting improvements
- Changed FileHandler read/write methods to return llvm::Error
- Using unified way of reporting errors
- Removed trailing '.' from the error messages
Differential Revision: https://reviews.llvm.org/D67031
The file was modifiedclang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
The file was modifiedclang/test/Driver/clang-offload-bundler.c
Commit 27e2c8faec6926fafdbd4d9b5b2f827f002e1c8e by rjmccall
Add Record::getValueAsOptionalDef().
Using `?` as an optional marker is very useful in Clang's AST-node
emitters because otherwise we need a separate class just to encode the
presence or absence of a base node reference.
The file was modifiedllvm/include/llvm/TableGen/Record.h
The file was modifiedllvm/lib/TableGen/Record.cpp
Commit baf91d02da6e68c4ee6723ef68911fcd80ece6a5 by rjmccall
[NFC] Add a tablegen node for the root of the AST node hierarchies.
This is useful for the property databases we want to add for abstract
serialization, since root classes can have interesting properties.
The file was modifiedclang/include/clang/Basic/CommentNodes.td
The file was modifiedclang/include/clang/Basic/DeclNodes.td
The file was modifiedclang/include/clang/Basic/TypeNodes.td
The file was modifiedclang/utils/TableGen/ClangASTNodesEmitter.cpp
The file was modifiedclang/include/clang/Basic/StmtNodes.td
The file was addedclang/utils/TableGen/ClangASTEmitters.h
The file was modifiedclang/utils/TableGen/ClangTypeNodesEmitter.cpp
The file was modifiedclang/utils/TableGen/ClangAttrEmitter.cpp
The file was modifiedclang/utils/TableGen/TableGen.cpp