FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [clangd] Do not insert parentheses when completing a using declaration (details)
  2. Fix https://bugs.llvm.org/show_bug.cgi?id=43791 (details)
  3. [RISCV] Lower llvm.trap and llvm.debugtrap (details)
  4. [AArch64][SVE] Implement masked load intrinsics (details)
  5. [ARM][AArch64] Implement __arm_rsrf, __arm_rsrf64, __arm_wsrf & (details)
  6. [clangd] Do not highlight keywords in semantic highlighting (details)
  7. [clangd] Flush streams when printing HoverInfo Name and Definition (details)
  8. [ARM][AArch64] Implement __cls,  __clsl and __clsll intrinsics from ACLE (details)
  9. minor doc typo fix / testing github commit (details)
  10. [Codegen][ARM] Add float softening for cbrt (details)
  11. [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64 (details)
  12. [DebugInfo] MachineSink: Insert undef DBG_VALUEs when sinking (details)
Commit d9971d0b2e34a6a5ca182089d019c9f079f528af by ibiryukov
[clangd] Do not insert parentheses when completing a using declaration
Summary: Would be nice to also fix this in clang, but that looks like
more work if we want to preserve signatures in informative chunks.
Fixes https://github.com/clangd/clangd/issues/118
Reviewers: kadircet
Reviewed By: kadircet
Subscribers: merge_guards_bot, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69382
The file was modifiedclang/include/clang/Parse/Parser.h
The file was modifiedclang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
The file was modifiedclang/include/clang/Sema/CodeCompleteConsumer.h
The file was modifiedclang/lib/Parse/ParseExprCXX.cpp
The file was modifiedclang-tools-extra/clangd/CodeComplete.cpp
The file was modifiedclang/lib/Parse/ParseDeclCXX.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
Commit da68fd8f81602f388b4a603518fede7fcafd3bc1 by gchatelet
Fix https://bugs.llvm.org/show_bug.cgi?id=43791
The file was modifiedllvm/unittests/Support/AlignmentTest.cpp
Commit 7214f7a79f4bf791e5c6726757dbcec143f0aa91 by selliott
[RISCV] Lower llvm.trap and llvm.debugtrap
Summary: Until this commit, these have lowered to a call to abort().
`llvm.trap()` now lowers to `unimp`, which should trap on all systems.
`llvm.debugtrap()` now lowers to `ebreak`, which is exactly what this
instruction is for.
Reviewers: asb, luismarques
Reviewed By: asb
Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal,
niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones,
rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei,
psnobl, benna, Jim, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69390
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/intrinsics/trap.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
Commit da720a38b9f24cc92b46fd5df503b13d5c823285 by kerry.mclaughlin
[AArch64][SVE] Implement masked load intrinsics
Summary: Adds support for codegen of masked loads, with non-extending,
zero-extending and sign-extending variants.
Reviewers: huntergr, rovka, greened, dmgreen
Reviewed By: dmgreen
Subscribers: dmgreen, samparker, tschuett, kristof.beyls, hiraditya,
rkruppe, psnobl, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68877
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
The file was addedllvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
The file was addedllvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
Commit 5d35b7d9e1a34b45c19609f754050e4263bee4ce by vhscampos
[ARM][AArch64] Implement __arm_rsrf, __arm_rsrf64, __arm_wsrf &
__arm_wsrf64
Summary: Adding support for ACLE intrinsics.
Patch by Michael Platings.
Reviewers: chill, t.p.northover, efriedma
Reviewed By: chill
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69297
The file was modifiedclang/lib/Headers/arm_acle.h
The file was modifiedclang/test/CodeGen/arm_acle.c
Commit c814f4c4592cf0a6049a56b09442369d8e6eb9d7 by ibiryukov
[clangd] Do not highlight keywords in semantic highlighting
Summary: Editors are good at highlightings the keywords themselves. Note
that this only affects highlightings of builtin types spelled out as
keywords in the source code. Highlightings of typedefs to builtin types
are unchanged.
Reviewers: hokein
Reviewed By: hokein
Subscribers: merge_guards_bot, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69431
The file was modifiedclang-tools-extra/clangd/unittests/TweakTests.cpp
The file was modifiedclang-tools-extra/clangd/SemanticHighlighting.cpp
The file was modifiedclang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
The file was modifiedclang-tools-extra/clangd/test/semantic-highlighting.test
Commit 3cb5764f900284666dbb0342c487edb1fde4d7fc by kadircet
[clangd] Flush streams when printing HoverInfo Name and Definition
Summary: Fixes some windows breakages when compiled via msvc.
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
Commit f6e11a36c49c065cd71e9c54e4fba917da5bbf2e by vhscampos
[ARM][AArch64] Implement __cls,  __clsl and __clsll intrinsics from ACLE
Summary: Writing support for three ACLE functions:
unsigned int __cls(uint32_t x)
unsigned int __clsl(unsigned long x)
unsigned int __clsll(uint64_t x)
CLS stands for "Count number of leading sign bits".
In AArch64, these two intrinsics can be translated into the 'cls'
instruction directly. In AArch32, on the other hand, this functionality
is achieved by implementing it in terms of clz (count number of leading
zeros).
Reviewers: compnerd
Reviewed By: compnerd
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D69250
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/builtins-arm64.c
The file was modifiedclang/lib/Headers/arm_acle.h
The file was addedllvm/test/CodeGen/AArch64/cls.ll
The file was addedllvm/test/CodeGen/ARM/cls.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsARM.td
The file was modifiedclang/include/clang/Basic/BuiltinsAArch64.def
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedclang/test/CodeGen/arm_acle.c
The file was modifiedclang/include/clang/Basic/BuiltinsARM.def
The file was modifiedclang/test/CodeGen/builtins-arm.c
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
Commit a483302fbefb6c48fe5c14c6403be06336a77e7f by r.stahl
minor doc typo fix / testing github commit
The file was modifiedllvm/lib/Support/CrashRecoveryContext.cpp
Commit ba2c62553109e324a203aa46c2217cf5f28ab694 by david.green
[Codegen][ARM] Add float softening for cbrt
We would previously have no soft-float softening for cbrt, so could hit
a crash failing to select. This fills in what appears to be missing.
Differential Revision: https://reviews.llvm.org/D69345
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
The file was modifiedllvm/test/CodeGen/ARM/pow.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/test/CodeGen/ARM/fp16-promote.ll
Commit b8042dbe2bbf129cb524fca7a48737e99d1e46bc by dmitry.preobrazhensky
[AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64
See https://bugs.llvm.org/show_bug.cgi?id=43747
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D69348
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_all.s
Commit ee50590e1684c197bc4336984795e48bf53c7a4e by jeremy.morse
[DebugInfo] MachineSink: Insert undef DBG_VALUEs when sinking
instructions
When we sink DBG_VALUEs between blocks, we simply move the DBG_VALUE
instruction to below the sunk instruction. However, we should also mark
the variable as being undef at the original location, to terminate any
earlier variable location. This patch does that -- plus, if the
instruction being sunk is a copy, it attempts to propagate the copy
through the DBG_VALUE, replacing the destination with the source.
Differential Revision: https://reviews.llvm.org/D58238
The file was modifiedllvm/lib/CodeGen/MachineSink.cpp
The file was addedllvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
The file was modifiedllvm/test/DebugInfo/MIR/X86/postra-subreg-sink.mir