FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [LV] Apply sink-after & interleave-groups as VPlan transformations (NFC) (details)
  2. [SystemZ]  Improve handling of huge PC relative immediate offsets. (details)
  3. [lldb][NFC] Remove unused ExpressionParser::Parse (details)
  4. [lldb][NFC] Remove Ocaml from TypeSystem::LLVMCastKind (details)
  5. [hwasan] Remove lazy thread-initialisation (details)
  6. [RISCV] Implement the TargetLowering::getRegisterByName hook (details)
  7. [FIX] Removed duplicated v4f16 and v8f16 declarations (details)
  8. [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle (details)
  9. [llvm-readobj] Change errors to warnings for symbol section name dumping (details)
  10. [InstSimplify] add more tests for fcmp+select; NFC (details)
  11. [SystemZ] Add GHC calling convention (details)
Commit 2be17087f8c38934b7fc9208ae6cf4e9b4d44f4b by gil.rapaport
[LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)
The sink-after and interleave-group vectorization decisions were so far
applied to VPlan during initial VPlan construction, which complicates
VPlan construction – also because of their inter-dependence. This patch
refactors buildVPlanWithRecipes() to construct a simpler initial VPlan
and later apply both these vectorization decisions, in order, as
VPlan-to-VPlan transformations.
Differential Revision: https://reviews.llvm.org/D68577
The file was modifiedllvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
The file was modifiedllvm/unittests/Transforms/Vectorize/VPlanTest.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
Commit 580310ff0c57a62edd0c07aacfa4969809649444 by paulsson
[SystemZ]  Improve handling of huge PC relative immediate offsets.
Demand that an immediate offset to a PC relative address fits in 32
bits, or else load it into a register and perform a separate add.
Verify in the assembler that such immediate offsets fit the bitwidth.
Even though the final address of a Load Address Relative Long may fit in
32 bits even with a >32 bit offset (depending on where the symbol lives
relative to PC), the GNU toolchain demands the offset by itself to be in
range. This patch adapts the same behavior for llvm.
Review: Ulrich Weigand https://reviews.llvm.org/D69749
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was modifiedllvm/test/MC/SystemZ/insn-bad.s
The file was addedllvm/test/CodeGen/SystemZ/la-05.ll
The file was modifiedllvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
Commit 25b486ac4f335fc51240888d6cfbc9c3c211536a by Raphael Isemann
[lldb][NFC] Remove unused ExpressionParser::Parse
Summary: This function is only used internally by ClangExpressionParser.
By putting it in the ExpressionParser class all languages that implement
ExpressionParser::Parse have to share the same signature (which forces
us in downstream to add swift-specific arguments to
ExpressionParser::Parse which then propagate to ClangExpressionParser
and so on).
Reviewers: davide
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69710
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangFunctionCaller.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.h
The file was modifiedlldb/include/lldb/Expression/ExpressionParser.h
Commit bc728d584242946ba59d6bea0cf8c749dcf07248 by Raphael Isemann
[lldb][NFC] Remove Ocaml from TypeSystem::LLVMCastKind
Ocaml support was removed.
The file was modifiedlldb/include/lldb/Symbol/TypeSystem.h
Commit 91167e22eca535025f093335acece573bf19c525 by david.spickett
[hwasan] Remove lazy thread-initialisation
This was an experiment made possible by a non-standard feature of the
Android dynamic loader.
It required introducing a flag to tell the compiler which ABI was being
targeted. This flag is no longer needed, since the generated code now
works for both ABI's.
We leave that flag untouched for backwards compatibility. This also
means that if we need to distinguish between targeted ABI's again we can
do that without disturbing any existing workflows.
We leave a comment in the source code and mention in the help text to
explain this for any confused person reading the code in the future.
Patch by Matthew Malcomson
Differential Revision: https://reviews.llvm.org/D69574
The file was modifiedcompiler-rt/lib/hwasan/hwasan_linux.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
The file was modifiedcompiler-rt/lib/hwasan/hwasan_interceptors.cpp
The file was removedllvm/test/Instrumentation/HWAddressSanitizer/lazy-thread-init.ll
The file was modifiedclang/include/clang/Driver/Options.td
Commit 51b4b17eb7e6ee2312e3230c7e097df501006360 by luismarques
[RISCV] Implement the TargetLowering::getRegisterByName hook
Summary: The hook should work for any RISC-V register. Non-allocatable
registers do not need to be reserved, for the remaining the hook will
only succeed if you pass clang the -ffixed-xX flag. This builds upon
D67185, which currently only allows reserving GPRs.
Reviewers: asb, lenary
Reviewed By: lenary
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69130
The file was addedllvm/test/CodeGen/RISCV/get-register-invalid.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was addedllvm/test/CodeGen/RISCV/get-register-noreserve.ll
The file was addedllvm/test/CodeGen/RISCV/get-register-reserve.ll
Commit 3169f0129a682a54cb90996fcb550184af6cdef9 by diogo.sampaio
[FIX] Removed duplicated v4f16 and v8f16 declarations
Reviewers: RKSimon, ostannard
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69795
The file was modifiedllvm/lib/Target/ARM/ARMCallingConv.td
Commit 31ed36d0447def348af7b1d27daceb57d063382f by llvm-dev
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle
using DemandedElts mask (REAPPLIED)
If we don't demand all elements, then attempt to combine to a simpler
shuffle.
At the moment we can only do this if Depth == 0 as
combineX86ShufflesRecursively uses Depth to track whether the shuffle
has really changed or not - we'll need to change this before we can
properly start merging combineX86ShufflesRecursively into
SimplifyDemandedVectorElts (see D66004).
This reapplies rL368307 (reverted at rL369167) after the fix for the
infinite loop reported at PR43024 was applied at
rG3f087e38a2e7b87a5adaaac1c1b61e51220e7ff3
The file was modifiedllvm/test/CodeGen/X86/vec_umulo.ll
The file was modifiedllvm/test/CodeGen/X86/vec_smulo.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/shrink_vmul.ll
Commit ef85f47595a905475d3e7b8d1441ed69cb226d9c by jh7370
[llvm-readobj] Change errors to warnings for symbol section name dumping
Also only print each such warning once.
LLVM-style output will now print "<?>" for sections it cannot identify,
e.g. because the section index is invalid. GNU output continues to print
the raw index. In both cases where the st_shndx value is SHN_XINDEX and
the index cannot be looked up in the SHT_SYMTAB_SHNDX section (e.g.
because it is missing), the symbol is printed like other symbols with
st_shndx >= SHN_LORESERVE.
Reviewed by: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D69671
The file was modifiedllvm/test/Object/invalid.test
The file was addedllvm/test/tools/llvm-readobj/elf-section-symbols.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/test/tools/llvm-readobj/elf-symbol-shndx.test
The file was modifiedllvm/test/tools/yaml2obj/elf-sht-symtab-shndx.yaml
The file was modifiedllvm/test/tools/yaml2obj/dynamic-symbols.yaml
Commit 499c90afe9099ff700ca8c8f44a2cbf94b1dd627 by spatel
[InstSimplify] add more tests for fcmp+select; NFC
The addition of FMF for select allows more folding for these kinds of
patterns.
The file was modifiedllvm/test/Transforms/InstSimplify/fcmp-select.ll
Commit 22f9429149a8faed1f5770aca89e68409ae2cc4f by ulrich.weigand
[SystemZ] Add GHC calling convention
This is a special calling convention to be used by the GHC compiler.
Author: Stefan Schulze Frielinghaus Differential Revision:
https://reviews.llvm.org/D69024
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-01.ll
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-02.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZCallingConv.h
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-04.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-03.ll
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-05.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-06.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZCallingConv.td
The file was addedllvm/test/CodeGen/SystemZ/ghc-cc-07.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp