FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. Optimize std::midpoint for integers (details)
  2. [BPF] Fix CO-RE bugs with bitfields (details)
  3. [CUDA][HIP] Disable emitting llvm.linker.options in device compilation (details)
  4. [analyzer] Add test directory for scan-build. (details)
  5. Fix clone_constant_impl to correctly deal with null pointers (details)
  6. [analyzer] Fixup scan-build tests for non-Darwin platforms. (details)
  7. [analyzer] Require darwin for scan-build tests (details)
  8. [X86] Teach X86MCInstLower to swap operands of commutable instructions (details)
  9. [BPF] fix a use after free bug (details)
Commit 586952f4cefd809b7becd16c6d1e751ea923adfd by jorg
Optimize std::midpoint for integers
Same idea as the current algorithm, that is, add (half of the difference
between a and b) to a.
But we use a different technique for computing the difference: we
compute b - a into a pair of integers that are named "sign_bit" and
"diff". We have to use a pair because subtracting two 32-bit integers
produces a 33-bit result.
Computing half of that is a simple matter of shifting diff right by 1,
and adding sign_bit shifted left by 31. llvm knows how to do that with
one instruction: shld.
The only tricky part is that if the difference is odd and negative, then
shifting it by one isn't the same as dividing it by two - shifting a
negative one produces a negative one, for example. So there's one more
adjustment: if the sign bit and the low bit of diff are one, we add one.
For a demonstration of the codegen difference, see
https://godbolt.org/z/7ar3K9 , which also has a built-in test.
Differential Revision: https://reviews.llvm.org/D69459
The file was modifiedlibcxx/include/numeric
Commit fff2721286e1c051c2b1c91210ddc3e6a9b179e1 by yhs
[BPF] Fix CO-RE bugs with bitfields
bitfield handling is not robust with current implementation. I have seen
two issues as described below.
Issue 1:
struct s {
   long long f1;
   char f2;
   char b1:1;
} *p;
The current approach will generate an access bit size
56 (from b1 to the end of structure) which will be
rejected as it is not power of 2.
Issue 2:
struct s {
   char f1;
   char b1:3;
   char b2:5;
   char b3:6:
   char b4:2;
   char f2;
};
The LLVM will group 4 bitfields together with 2 bytes. But
loading 2 bytes is not correct as it violates alignment
requirement. Note that sometimes, LLVM breaks a large
bitfield groups into multiple groups, but not in this case.
To resolve the above two issues, this patch takes a different approach.
The alignment for the structure is used to construct the offset of the
bitfield access. The bitfield incurred memory access is an aligned
memory access with alignment/size equal to the alignment of the
structure. This also simplified the code.
This may not be the optimal memory access in terms of memory access
width. But this should be okay since extracting the bitfield value will
have the same amount of work regardless of what kind of memory access
width.
Differential Revision: https://reviews.llvm.org/D69837
The file was modifiedllvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
The file was addedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
The file was addedllvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
Commit 4264e7bbfdb30ed8fe1e0907bfa25e4d1bb04207 by Yaxun.Liu
[CUDA][HIP] Disable emitting llvm.linker.options in device compilation
The linker options (e.g. pragma detect_mismatch) are intended for host
compilation only, therefore disable it for device compilation.
Differential Revision: https://reviews.llvm.org/D57829
The file was addedclang/test/Driver/hip-autolink.hip
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was addedclang/test/CodeGenCUDA/ms-linker-options.cu
Commit 0aba69eb1a01c44185009f50cc633e3c648e9950 by Devin Coughlin
[analyzer] Add test directory for scan-build.
The static analyzer's scan-build script is critical infrastructure but
is not well tested. To start to address this, add a new test directory
under tests/Analysis for scan-build lit tests and seed it with several
tests. The goal is that future scan-build changes will be accompanied by
corresponding tests.
Differential Revision: https://reviews.llvm.org/D69781
The file was addedclang/test/Analysis/scan-build/plist_output.test
The file was addedclang/test/Analysis/scan-build/Inputs/multidirectory_project/directory1/file1.c
The file was addedclang/test/Analysis/scan-build/help.test
The file was addedclang/test/Analysis/scan-build/html_output.test
The file was addedclang/test/Analysis/scan-build/plist_html_output.test
The file was addedclang/test/Analysis/scan-build/exclude_directories.test
The file was modifiedllvm/utils/lit/lit/llvm/config.py
The file was modifiedclang/test/lit.cfg.py
The file was addedclang/test/Analysis/scan-build/Inputs/multidirectory_project/directory2/file2.c
The file was addedclang/test/Analysis/scan-build/Inputs/single_null_dereference.c
Commit 31be9f3f7dee80c586d3beac9a65663d5628cf96 by aqjune
Fix clone_constant_impl to correctly deal with null pointers
Summary: This patch resolves llvm-c-test's following error
``` LLVM ERROR: LLVMGetValueKind returned incorrect type
```
which arises when the input bitcode contains a null pointer.
Reviewers: jdoerfert, CodaFi, deadalnix
Reviewed By: jdoerfert
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68928
The file was modifiedllvm/tools/llvm-c-test/echo.cpp
The file was modifiedllvm/test/Bindings/llvm-c/echo.ll
Commit 48223d92a98e2eb7da6844d56471953f83da191e by Devin Coughlin
[analyzer] Fixup scan-build tests for non-Darwin platforms.
This is a fix to 0aba69eb1a01c44185009f50cc633e3c648e9950 to address
failing bots.
The file was modifiedclang/test/Analysis/scan-build/exclude_directories.test
The file was modifiedclang/test/Analysis/scan-build/help.test
The file was modifiedclang/test/Analysis/scan-build/plist_output.test
The file was modifiedclang/test/Analysis/scan-build/plist_html_output.test
The file was modifiedclang/test/Analysis/scan-build/html_output.test
Commit abc04ff4012c62c98aa9f0d840114b2f56855dc8 by Devin Coughlin
[analyzer] Require darwin for scan-build tests
Let's at least get some coverage from these tests. We can generalize to
other platforms later.
The file was modifiedclang/test/Analysis/scan-build/help.test
The file was modifiedclang/test/Analysis/scan-build/plist_output.test
The file was modifiedclang/test/Analysis/scan-build/html_output.test
The file was modifiedclang/test/Analysis/scan-build/plist_html_output.test
The file was modifiedclang/test/Analysis/scan-build/exclude_directories.test
Commit f65493a83e3bdb402fb1dfa92bcc25707e961147 by craig.topper
[X86] Teach X86MCInstLower to swap operands of commutable instructions
to enable 2-byte VEX encoding.
Summary: The 2 source operands commutable instructions are encoded in
the VEX.VVVV field and the r/m field of the MODRM byte plus the VEX.B
field.
The VEX.B field is missing from the 2-byte VEX encoding. If the VEX.VVVV
source is 0-7 and the other register is 8-15 we can swap them to avoid
needing the VEX.B field. This works as long as the VEX.W, VEX.mmmmm, and
VEX.X fields are also not needed.
Fixes PR36706.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68550
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-512.ll
The file was modifiedllvm/test/CodeGen/X86/masked_expandload.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
The file was modifiedllvm/test/CodeGen/X86/pr29112.ll
The file was modifiedllvm/test/CodeGen/X86/uadd_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
The file was modifiedllvm/test/CodeGen/X86/avx-intel-ocl.ll
The file was modifiedllvm/test/CodeGen/X86/masked_compressstore.ll
The file was modifiedllvm/lib/Target/X86/X86MCInstLower.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-packus.ll
The file was modifiedllvm/test/CodeGen/X86/sad.ll
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-op.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-512.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-vselect.ll
The file was modifiedllvm/test/CodeGen/X86/madd.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-math.ll
The file was modifiedllvm/test/CodeGen/X86/vec_umulo.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-512.ll
The file was modifiedllvm/test/CodeGen/X86/x86-interleaved-access.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
The file was modifiedllvm/test/CodeGen/X86/midpoint-int-vec-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-512.ll
Commit 9f34447f3ff525029ec889bf3a82b04678a9d7c0 by yhs
[BPF] fix a use after free bug
Commit fff2721286e1 ("[BPF] Fix CO-RE bugs with bitfields") fixed CO-RE
handling bitfield issues. But the implementation introduced a use after
free bug. The "Base" of the intrinsic might be freed so later on
accessing the Type of "Base" might access the freed memory. The failed
test case,
CodeGen/BPF/CORE/offset-reloc-middle-chain.ll is exactly used to test
such a case.
Similarly to previous attempt to remember Metadata etc, remember "Base"
pointee Alignment in advance to avoid such use after free bug.
The file was modifiedllvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp