Started 3 mo 27 days ago
Took 1 hr 14 min on green-dragon-22

Failed Build rL:366543 - C:366518 - #58118 (Jul 19, 2019 1:42:37 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 366543
  • http://llvm.org/svn/llvm-project/cfe/trunk : 366518
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 366525
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/zorg/trunk : 366310
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 366484
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 366541
Changes
  1. [AMDGPU] Simplify the exclusive scan used for optimized atomics

    Summary:
    Change the scan algorithm to use only power-of-two shifts (1, 2, 4, 8,
    16, 32) instead of starting off shifting by 1, 2 and 3 and then doing
    a 3-way ADD, because:

    1. It simplifies the compiler a little.
    2. It minimizes vgpr pressure because each instruction is now of the
       form vn = vn + vn << c.
    3. It is more friendly to the DPP combiner, which currently can't
       combine into an ADD3 instruction.

    Because of #2 and #3 the end result is improved from this:

      v_add_u32_dpp v4, v3, v3  row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:0
      v_mov_b32_dpp v5, v3  row_shr:2 row_mask:0xf bank_mask:0xf
      v_mov_b32_dpp v1, v3  row_shr:3 row_mask:0xf bank_mask:0xf
      v_add3_u32 v1, v4, v5, v1
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_shr:4 row_mask:0xf bank_mask:0xe
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_shr:8 row_mask:0xf bank_mask:0xc
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_bcast:15 row_mask:0xa bank_mask:0xf
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_bcast:31 row_mask:0xc bank_mask:0xf

    To this:

      v_add_u32_dpp v1, v1, v1  row_shr:1 row_mask:0xf bank_mask:0xf bound_ctrl:0
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_shr:2 row_mask:0xf bank_mask:0xf bound_ctrl:0
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_shr:4 row_mask:0xf bank_mask:0xe
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_shr:8 row_mask:0xf bank_mask:0xc
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_bcast:15 row_mask:0xa bank_mask:0xf
      s_nop 1
      v_add_u32_dpp v1, v1, v1  row_bcast:31 row_mask:0xc bank_mask:0xf

    I.e. two fewer computational instructions, one extra nop where we could
    schedule something else.

    Reviewers: arsenm, sheredom, critson, rampitec, vpykhtin

    Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64411 (detail/ViewSVN)
    by foad
  2. [Loop Peeling] Enable peeling of multiple exits by default.

    Enable loop peeling with multiple exits where all non-latch exits
    ends up with deopt by default.

    Reviewers: reames, fhahn
    Reviewed By: reames
    Subscribers: xbolva00, hiraditya, zzheng, llvm-commits
    Differential Revision: https://reviews.llvm.org/D64619 (detail/ViewSVN)
    by skatkov
  3. [clangd] cleanup: unify the implemenation of checking a location is inside main file.

    Summary: We have variant implementations in the codebase, this patch unifies them.

    Reviewers: ilya-biryukov, kadircet

    Subscribers: MaskRay, jkorous, arphaman, cfe-commits

    Tags: #clang

    Differential Revision: https://reviews.llvm.org/D64915 (detail/ViewSVN)
    by hokein

Started by an SCM change

This run spent:

  • 4 min 38 sec waiting;
  • 1 hr 14 min build duration;
  • 1 hr 19 min total from scheduled to completion.
LLVM/Clang Warnings: 2 warnings.
Test Result (10 failures / ±0)Show all failed tests >>>

Identified problems

Compile Error

This build failed because of a compile error. Below is a list of all errors in the build log:
Indication 1

Ninja target failed

Below is a link to the first failed ninja target.
Indication 2

Assertion failure

This build failed because of an assertion failure. Below is a list of all errors in the build log:
Indication 3

Regression test failed

This build failed because a regression test in the test suite FAILed. See the test report for details.
Indication 4