Started 4 mo 3 days ago
Took 1 hr 16 min on green-dragon-17

Success Build rL:366686 - C:366683 - #58170 (Jul 22, 2019 6:22:13 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 366686
  • http://llvm.org/svn/llvm-project/cfe/trunk : 366683
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 366638
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/zorg/trunk : 366654
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 366606
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 366675
Changes
  1. Reland [ELF] Loose a condition for relocation with a symbol

    This patch was not the reason of the buildbot failure.

    Deleted code was introduced as a work around for a bug in the gold linker
    (http://sourceware.org/PR16794). Test case that was given as a reason for
    this part of code, the one on previous link, now works for the gold.
    This condition is too strict and when a code is compiled with debug info
    it forces generation of numerous relocations with symbol for architectures
    that do not have relocation addend.

    Reviewers: arsenm, espindola

    Reviewed By: MaskRay

    Differential Revision: https://reviews.llvm.org/D64327 (detail/ViewSVN)
    by nikolaprica
  2. AMDGPU/GlobalISel: Remove unnecessary code

    The minnum/maxnum case are dead, and the cvt is handled by the
    default. (detail/ViewSVN)
    by arsenm
  3. [ARM] Fix for MVE VPT block pass

    We need to ensure that the number of T's is correct when adding multiple
    instructions into the same VPT block.

    Differential revision: https://reviews.llvm.org/D65049 (detail/ViewSVN)
    by dmgreen
  4. Updated the signature for some stack related intrinsics (CLANG)

    Modified the intrinsics
    int_addressofreturnaddress,
    int_frameaddress & int_sponentry.
    This commit depends on the changes in rL366679

    Reviewed By: arsenm

    Differential Revision: https://reviews.llvm.org/D64563 (detail/ViewSVN)
    by cdevadas
  5. Revert the change to the [[nodiscard]] feature test macro value.

    This value only gets bumped once both P1301 and P1771 are implemented. (detail/ViewSVN)
    by aaronballman
  6. [X86] EltsFromConsecutiveLoads - support common source loads (REAPPLIED)

    This patch enables us to find the source loads for each element, splitting them into a Load and ByteOffset, and attempts to recognise consecutive loads that are in fact from the same source load.

    A helper function, findEltLoadSrc, recurses to find a LoadSDNode and determines the element's byte offset within it. When attempting to match consecutive loads, byte offsetted loads then attempt to matched against a previous load that has already been confirmed to be a consecutive match.

    Next step towards PR16739 - after this we just need to account for shuffling/repeated elements to create a vector load + shuffle.

    Fixed out of bounds load assert identified in rL366501

    Differential Revision: https://reviews.llvm.org/D64551 (detail/ViewSVN)
    by rksimon
  7. AMDGPU/GlobalISel: Fix tests without asserts

    The legality check is only done under NDEBUG, so the failure cases are
    different in a release build. (detail/ViewSVN)
    by arsenm
  8. Added address-space mangling for stack related intrinsics

    Modified the following 3 intrinsics:
    int_addressofreturnaddress,
    int_frameaddress & int_sponentry.

    Reviewed By: arsenm

    Differential Revision: https://reviews.llvm.org/D64561 (detail/ViewSVN)
    by cdevadas

Started by an SCM change (5 times)

This run spent:

  • 34 min waiting;
  • 1 hr 16 min build duration;
  • 1 hr 51 min total from scheduled to completion.
LLVM/Clang Warnings: 1 warning.
    Test Result (no failures)