FailedChanges

Summary

  1. Revert r301822 (and dependent r301825), which tried to improve the handling of constexprs with unknown bounds. This triggers a corner case of the language where it's not yet clear whether this should be an error: struct A { static void *const a[]; static void *const b[]; }; constexpr void *A::a[] = {&b[0]}; constexpr void *A::b[] = {&a[0]}; When discovering the initializer for A::a, the bounds of A::b aren't known yet. It is unclear whether warning about errors should be deferred until the end of the translation unit, possibly resolving errors that can be resolved. In practice, the compiler can know the bounds of all arrays in this example. Credits for reproducers and explanation go to Richard Smith. Richard, please add more info in case my explanation is wrong.
  2. ARM: add arm1176j-f processor I doubt anyone actually uses it, and I'm not even entirely convinced it exists myself; but it is our default for "clang -arch armv6". Functionally, if it does exist it's identical to the arm1176jz-f from LLVM's point of view (the difference is apparently in the "Security Extensions").
  3. PEI: Skip dead objects when looking at CSRs On AMDGPU if an SGPR is spilled to a VGPR, the frame index is deleted. If there were any CSR SGPRs, this woudl assert when setting the offset.
  4. Revert "[docs] UBSan: Mention that print_stacktrace=1 is unsupported on Darwin" This reverts commit r300295. It's no longer true, print_stacktrace=1 is supported on Darwin/Windows as of r301839.
  5. [PartialInlining] Add more early filtering This is a follow up to the previous inline cost patch for quicker filtering.
  6. AMDGPU: Don't promote alloca to LDS for leaf functions LDS use in leaf functions not currently handled.
  7. [Hexagon] Fix uninitialized value caught with valgrind Patch by Colin LeMahieu.
  8. [Hexagon] Change iconst to emit 27bit relocation Patch by Colin LeMahieu.
  9. [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCREL Patch by Sid Manning.
  10. [Hexagon] Don't ignore mult-cycle latency information The compiler was generating code that ends up ignoring a multiple latency dependence between two instructions by scheduling the intructions in back-to-back packets. The packetizer needs to end a packet if the latency of the current current insruction and the source in the previous packet is greater than 1 cycle. This case occurs when there is still room in the current packet, but scheduling the instruction causes a stall. Instead, the packetizer should start a new packet. Also, if the current packet already contains a stall, then it is okay to add another instruction to the packet that also causes a stall. This occurs when there are no instructions that can be scheduled in between the producer and consumer instructions. This patch changes the latency for loads to 2 cycles from 3 cycles. This change refects that a load only needs to be separated by one extra packet to eliminate the stall. Patch by Ikhlas Ajbar.
Revision 301963 by djasper:
Revert r301822 (and dependent r301825), which tried to improve the
handling of constexprs with unknown bounds.

This triggers a corner case of the language where it's not yet clear
whether this should be an error:

  struct A {
    static void *const a[];
    static void *const b[];
  };
  constexpr void *A::a[] = {&b[0]};
  constexpr void *A::b[] = {&a[0]};

When discovering the initializer for A::a, the bounds of A::b aren't known yet.
It is unclear whether warning about errors should be deferred until the end of
the translation unit, possibly resolving errors that can be resolved. In
practice, the compiler can know the bounds of all arrays in this example.

Credits for reproducers and explanation go to Richard Smith. Richard, please
add more info in case my explanation is wrong.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/DiagnosticASTKinds.td (diff)llvm-revision.src/cfe/trunk/include/clang/Basic/DiagnosticASTKinds.td
The file was modified/cfe/trunk/lib/AST/ExprConstant.cpp (diff)llvm-revision.src/cfe/trunk/lib/AST/ExprConstant.cpp
The file was removed/cfe/trunk/test/SemaCXX/constexpr-array-unknown-bound.cppllvm-revision.src/cfe/trunk/test/SemaCXX/constexpr-array-unknown-bound.cpp
Revision 301962 by Tim Northover:
ARM: add arm1176j-f processor

I doubt anyone actually uses it, and I'm not even entirely convinced it exists
myself; but it is our default for "clang -arch armv6". Functionally, if it does
exist it's identical to the arm1176jz-f from LLVM's point of view (the
difference is apparently in the "Security Extensions").
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/ARM/ARM.td (diff)llvm-revision.src/llvm/trunk/lib/Target/ARM/ARM.td
The file was modified/llvm/trunk/test/CodeGen/ARM/build-attributes.ll (diff)llvm-revision.src/llvm/trunk/test/CodeGen/ARM/build-attributes.ll
Revision 301961 by arsenm:
PEI: Skip dead objects when looking at CSRs

On AMDGPU if an SGPR is spilled to a VGPR, the frame index
is deleted. If there were any CSR SGPRs, this woudl
assert when setting the offset.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (diff)llvm-revision.src/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
Revision 301960 by Vedant Kumar:
Revert "[docs] UBSan: Mention that print_stacktrace=1 is unsupported on Darwin"

This reverts commit r300295.

It's no longer true, print_stacktrace=1 is supported on Darwin/Windows
as of r301839.
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/docs/UndefinedBehaviorSanitizer.rst (diff)llvm-revision.src/cfe/trunk/docs/UndefinedBehaviorSanitizer.rst
Revision 301959 by davidxl:
[PartialInlining] Add more early filtering

This is a follow up to the previous
inline cost patch for quicker filtering.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp (diff)llvm-revision.src/llvm/trunk/lib/Transforms/IPO/PartialInlining.cpp
The file was modified/llvm/trunk/test/Transforms/CodeExtractor/PartialInlineOptRemark.ll (diff)llvm-revision.src/llvm/trunk/test/Transforms/CodeExtractor/PartialInlineOptRemark.ll
Revision 301958 by arsenm:
AMDGPU: Don't promote alloca to LDS for leaf functions

LDS use in leaf functions not currently handled.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
The file was added/llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-calling-conv.llllvm-revision.src/llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-calling-conv.ll
The file was removed/llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-shaders.llllvm-revision.src/llvm/trunk/test/CodeGen/AMDGPU/promote-alloca-shaders.ll
Revision 301957 by kparzysz:
[Hexagon] Fix uninitialized value caught with valgrind

Patch by Colin LeMahieu.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.h (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.h
Revision 301956 by kparzysz:
[Hexagon] Change iconst to emit 27bit relocation

Patch by Colin LeMahieu.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/Support/ELFRelocs/Hexagon.def (diff)llvm-revision.src/llvm/trunk/include/llvm/Support/ELFRelocs/Hexagon.def
The file was modified/llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonAsmPrinter.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonAsmPrinter.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonOperands.td (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonOperands.td
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonPseudo.td (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonPseudo.td
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonFixupKinds.h (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonFixupKinds.h
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.h (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.h
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h
The file was modified/llvm/trunk/test/MC/Hexagon/iconst.s (diff)llvm-revision.src/llvm/trunk/test/MC/Hexagon/iconst.s
Revision 301955 by kparzysz:
[Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCREL

Patch by Sid Manning.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/include/llvm/Support/ELFRelocs/Hexagon.def (diff)llvm-revision.src/llvm/trunk/include/llvm/Support/ELFRelocs/Hexagon.def
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonMCInstLower.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonMCInstLower.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonELFObjectWriter.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonFixupKinds.h (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonFixupKinds.h
The file was modified/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
The file was added/llvm/trunk/test/CodeGen/Hexagon/plt-rel.llllvm-revision.src/llvm/trunk/test/CodeGen/Hexagon/plt-rel.ll
The file was added/llvm/trunk/test/MC/Hexagon/plt-rel.sllvm-revision.src/llvm/trunk/test/MC/Hexagon/plt-rel.s
Revision 301954 by kparzysz:
[Hexagon] Don't ignore mult-cycle latency information

The compiler was generating code that ends up ignoring a multiple
latency dependence between two instructions by scheduling the
intructions in back-to-back packets.

The packetizer needs to end a packet if the latency of the current
current insruction and the source in the previous packet is
greater than 1 cycle. This case occurs when there is still room in
the current packet, but scheduling the instruction causes a stall.
Instead, the packetizer should start a new packet. Also, if the
current packet already contains a stall, then it is okay to add
another instruction to the packet that also causes a stall. This
occurs when there are no instructions that can be scheduled in
between the producer and consumer instructions.

This patch changes the latency for loads to 2 cycles from 3 cycles.
This change refects that a load only needs to be separated by
one extra packet to eliminate the stall.

Patch by Ikhlas Ajbar.
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
The file was modified/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.h (diff)llvm-revision.src/llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.h
The file was added/llvm/trunk/test/CodeGen/Hexagon/multi-cycle.llllvm-revision.src/llvm/trunk/test/CodeGen/Hexagon/multi-cycle.ll