Started 2 yr 6 mo ago
Took 1 hr 28 min on green-dragon-13

Failed Build r302540 (#5805) (May 9, 2017 9:58:21 AM)

Subproject Builds

Revision: 302540
Changes
  1. Add support for pretty platform names to `@available`/
    `__builtin_available`

    This commit allows us to use the macOS/iOS/tvOS/watchOS platform names in
    `@available`/`__builtin_available`.

    rdar://32067795

    Differential Revision: https://reviews.llvm.org/D33000 (detail/ViewSVN)
    by arphaman
  2. [Atomic] Remove IsStore/IsLoad in the interface, and pass the instruction instead. NFC.

    Now both emitLeadingFence and emitTrailingFence take the instruction
    itself, instead of taking IsLoad/IsStore pairs.
    Instruction::mayReadFromMemory and Instrucion::mayWriteToMemory are used
    for determining those two booleans.

    The instruction argument is also useful for later D32763, in
    emitTrailingFence. For emitLeadingFence, it seems to have cleaner
    interface with the proposed change.

    Differential Revision: https://reviews.llvm.org/D32762 (detail/ViewSVN)
    by timshen
  3. [scudo] CRC32 optimizations

    Summary:
    This change optimizes several aspects of the checksum used for chunk headers.

    First, there is no point in checking the weak symbol `computeHardwareCRC32`
    everytime, it will either be there or not when we start, so check it once
    during initialization and set the checksum type accordingly.

    Then, the loading of `HashAlgorithm` for SSE versions (and ARM equivalent) was
    not optimized out, while not necessary. So I reshuffled that part of the code,
    which duplicates a tiny bit of code, but ends up in a much cleaner assembly
    (and faster as we avoid an extraneous load and some calls).

    The following code is the checksum at the end of `scudoMalloc` for x86_64 with
    full SSE 4.2, before:
    ```
    mov     rax, 0FFFFFFFFFFFFFFh
    shl     r10, 38h
    mov     edi, dword ptr cs:_ZN7__scudoL6CookieE ; __scudo::Cookie
    and     r14, rax
    lea     rsi, [r13-10h]
    movzx   eax, cs:_ZN7__scudoL13HashAlgorithmE ; __scudo::HashAlgorithm
    or      r14, r10
    mov     rbx, r14
    xor     bx, bx
    call    _ZN7__scudo20computeHardwareCRC32Ejm ; __scudo::computeHardwareCRC32(uint,ulong)
    mov     rsi, rbx
    mov     edi, eax
    call    _ZN7__scudo20computeHardwareCRC32Ejm ; __scudo::computeHardwareCRC32(uint,ulong)
    mov     r14w, ax
    mov     rax, r13
    mov     [r13-10h], r14
    ```
    After:
    ```
    mov     rax, cs:_ZN7__scudoL6CookieE ; __scudo::Cookie
    lea     rcx, [rbx-10h]
    mov     rdx, 0FFFFFFFFFFFFFFh
    and     r14, rdx
    shl     r9, 38h
    or      r14, r9
    crc32   eax, rcx
    mov     rdx, r14
    xor     dx, dx
    mov     eax, eax
    crc32   eax, rdx
    mov     r14w, ax
    mov     rax, rbx
    mov     [rbx-10h], r14
    ```

    Reviewers: dvyukov, alekseyshl, kcc

    Reviewed By: alekseyshl

    Subscribers: aemerson, rengolin, llvm-commits

    Differential Revision: https://reviews.llvm.org/D32971 (detail/ViewSVN)
    by cryptoad
  4. Amend r302535; ifndef and ifdef are different, as it turns out. (detail/ViewSVN)
    by aaronballman
  5. [clang-tidy] Allow disabling compatibility check for generated fixes. (detail/ViewSVN)
    by alexfh
  6. ARMRegisterBankInfo.h requires LLVM_BUILD_GLOBAL_ISEL to be defined. If it is not defined, then ARMGenRegisterBank.inc is not table generated and the inclusion of this header causes the build to fail. (detail/ViewSVN)
    by aaronballman
  7. Change EOL style to LF. NFC (detail/ViewSVN)
    by alexfh

Started by upstream project phase2_modules_relay build number 3974
originally caused by:

This run spent:

  • 7 ms waiting;
  • 1 hr 28 min build duration;
  • 1 hr 28 min total from scheduled to completion.

Identified problems

Subproject Failed

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Indication 1