Started 4 mo 28 days ago
Took 2 hr 56 min on green-dragon-13

Failed Build #4169 (Jul 10, 2019 11:38:14 AM)

Revisions
  • http://llvm.org/svn/llvm-project/llvm/trunk : 365680
  • http://llvm.org/svn/llvm-project/cfe/trunk : 365675
  • http://llvm.org/svn/llvm-project/compiler-rt/trunk : 365591
  • http://llvm.org/svn/llvm-project/lld/trunk : 365662
  • http://llvm.org/svn/llvm-project/debuginfo-tests/trunk : 364589
  • http://llvm.org/svn/llvm-project/libcxx/trunk : 365562
  • http://llvm.org/svn/llvm-project/test-suite/trunk : 365610
  • http://llvm.org/svn/llvm-project/clang-tools-extra/trunk : 365678
  • http://llvm.org/svn/llvm-project/polly/trunk : 365470
Changes
  1. Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces"

    This broke some PPC prefetching tests.

    This reverts commit 9fdfb045ae8bb643ab0d0455dcf9ecaea3b1eb3c. (detail/ViewSVN)
    by greened
  2. Move three folds for FADD, FSUB and FMUL in the DAG combiner away from Unsafe to more aligned checks that reflect context

    Summary: Unsafe does not map well alone for each of these three cases as it is missing NoNan context when accessed directly with clang.  I have migrated the fold guards to reflect the expectations of handing nan and zero contexts directly (NoNan, NSZ) and some tests with it.  Unsafe does include NSZ, however there is already precedent for using the target option directly to reflect that context.

    Reviewers: spatel, wristow, hfinkel, craig.topper, arsenm

    Reviewed By: arsenm

    Subscribers: michele.scandale, wdng, javed.absar

    Differential Revision: https://reviews.llvm.org/D64450 (detail/ViewSVN)
    by mcberg2017
  3. Revert "[clangd] Filter out non-governed files from broadcast"

    This reverts commit d5214dfa7b5650745eaeb102857c9e90adb16137.

    It's causing failures, both in our local CI and the PS4 Windows bot.

    http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-windows10pro-fast/builds/26872/steps/test/logs/stdio (detail/ViewSVN)
    by ormris
  4. [System Model] [TTI] Update cache and prefetch TTI interfaces

    Rework the TTI cache and software prefetching APIs to prepare for the
    introduction of a general system model.  Changes include:

    - Marking existing interfaces const and/or override as appropriate
    - Adding comments
    - Adding BasicTTIImpl interfaces that delegate to a subtarget
      implementation
    - Adding a default "no information" subtarget implementation

    Only a handful of targets use these interfaces currently: AArch64,
    Hexagon, PPC and SystemZ.  AArch64 already has a custom subtarget
    implementation, so its custom TTI implementation is migrated to use
    the new facilities in BasicTTIImpl to invoke its custom subtarget
    implementation.  The custom TTI implementations continue to exist for
    the other targets with this change.  They are not moved over to
    subtarget-based implementations.

    The end goal is to have the default subtarget implementation defer to
    the system model defined by the target.  With this change, the default
    subtarget implementation essentially returns "no information" for
    these interfaces.  None of the existing users of TTI will hit that
    implementation because they define their own custom TTI
    implementations and won't use the BasicTTIImpl implementations.

    Once system models are in place for the targets that use these
    interfaces, their custom TTI implementations can be removed.

    Differential Revision: https://reviews.llvm.org/D63614 (detail/ViewSVN)
    by greened
  5. Recommit "[CommandLine] Remove OptionCategory and SubCommand caches from the Option class."

    Previously reverted in 364141 due to buildbot breakage, and fixed here
    by making GeneralCategory global a ManagedStatic.

    Summary:
    This change processes `OptionCategory`s and `SubCommand`s as they
    are seen instead of caching them in the Option class and processing
    them later.  Doing so simplifies the work needed to be done by the Global
    parser and significantly reduces the size of the Option class to a mere 64
    bytes.

    Removing  the `OptionCategory` cache saved 24 bytes, and removing
    the `SubCommand` cache saved an additional 48 bytes, for a total of a
    72 byte reduction.

    Reviewed By: serge-sans-paille

    Tags: #llvm, #clang

    Differential Revision: https://reviews.llvm.org/D62105 (detail/ViewSVN)
    by dhinton
  6. [X86] EltsFromConsecutiveLoads - clean up element size calcs. NFCI.

    Determine the element/load size calculations earlier and assert that they are whole bytes in size. (detail/ViewSVN)
    by rksimon
  7. [LoopRotate + MemorySSA] Keep an <instruction-cloned instruction> map.

    Summary:
    The map kept in loop rotate is used for instruction remapping, in order
    to simplify the clones of instructions. Thus, if an instruction can be
    simplified, its simplified value is placed in the map, even when the
    clone is added to the IR. MemorySSA in contrast needs to know about that
    clone, so it can add an access for it.
    To resolve this: keep a different map for MemorySSA.

    Reviewers: george.burgess.iv

    Subscribers: jlebar, Prazek, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D63680 (detail/ViewSVN)
    by asbirlea
  8. [ORC] Add custom IR compiler configuration to LLJITBuilder to enable obj caches.

    LLJITBuilder now has a setCompileFunctionCreator method which can be used to
    construct a CompileFunction for the LLJIT instance being created. The motivating
    use-case for this is supporting ObjectCaches, which can now be set up at
    compile-function construction time. To demonstrate this an example project,
    LLJITWithObjectCache, is included. (detail/ViewSVN)
    by Lang Hames
  9. [X86] Regenerate tests. NFCI.

    Hasn't been regenerated since the update script could merge 32/64-bit checks. (detail/ViewSVN)
    by rksimon
  10. [X86] Change the IR sequence for _mm_storeh_pi and _mm_storel_pi to perform the store as a <2 x float> instead of i64.

    This is similar to what we do for loadl_pi and loadh_pi. (detail/ViewSVN)
    by ctopper
  11. [X86] Add guards to some of the x86 intrinsic tests to skip 64-bit mode only intrinsics when compiled for 32-bit mode.

    All the command lines are for 64-bit mode, but sometimes I compile
    the tests in 32-bit mode to see what assembly we get and we need
    to skip these to do that. (detail/ViewSVN)
    by ctopper
  12. [X86] Add tests for an alternative sequence for _mm_storel_pi/_mm_storeh_pi intrinsics. NFC (detail/ViewSVN)
    by ctopper
  13. [clang] Preserve names of addrspacecast'ed values.

    Differential Revision: https://reviews.llvm.org/D63846 (detail/ViewSVN)
    by vzakhari
  14. [TargetLowering] support BlockAddress as "i" inline asm constraint

    Summary:
    This allows passing address of labels to inline assembly "i" input
    constraints.

    Fixes pr/42502.

    Reviewers: ostannard

    Reviewed By: ostannard

    Subscribers: void, echristo, nathanchance, ostannard, javed.absar, hiraditya, llvm-commits, srhines

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D64167 (detail/ViewSVN)
    by nickdesaulniers
  15. [NFC][InstCombine] Fixup some tests in just-added "omit mask before left-shift" tests (detail/ViewSVN)
    by lebedevri
  16. ELF: Add support for R_AARCH64_ADR_PREL_PG_HI21_NC relocation.

    Differential Revision: https://reviews.llvm.org/D64456 (detail/ViewSVN)
    by pcc
  17. MC: AArch64: Add support for pg_hi21_nc relocation specifier.

    Differential Revision: https://reviews.llvm.org/D64455 (detail/ViewSVN)
    by pcc
  18. [CodeExtractor] Fix sinking of allocas with multiple bitcast uses (PR42451)

    An alloca which can be sunk into the extraction region may have more
    than one bitcast use. Move these uses along with the alloca to prevent
    use-before-def.

    Testing: check-llvm, stage2 build of clang

    Fixes llvm.org/PR42451.

    Differential Revision: https://reviews.llvm.org/D64463 (detail/ViewSVN)
    by Vedant Kumar
  19. [CodeExtractor] Simplify findAllocas, NFC

    Split getLifetimeMarkers out into its own method and have it return a
    struct.

    Differential Revision: https://reviews.llvm.org/D64467 (detail/ViewSVN)
    by Vedant Kumar
  20. GlobalISel: Legalization for G_FMINNUM/G_FMAXNUM (detail/ViewSVN)
    by arsenm
  21. GlobalISel: Define the full family of FP min/max instructions (detail/ViewSVN)
    by arsenm
  22. [X86] EltsFromConsecutiveLoads - remove duplicate check for element size. NFCI.

    We've already checked that each element is the correct contributory size for VT when we inspect the elements for Undef/Zero/Load. (detail/ViewSVN)
    by rksimon
  23. [X86] EltsFromConsecutiveLoads - ensure element reg/store sizes are the same size. NFCI.

    This renames the type so it doesn't sound like its based off the load size - as we're moving towards supporting combining loads of different sizes. (detail/ViewSVN)
    by rksimon
  24. AMDGPU: Serialize mode from MachineFunctionInfo (detail/ViewSVN)
    by arsenm
  25. [PatternMatch] Generalize m_SpecificInt_ULT() to take ICmpInst::Predicate

    As discussed in the original review, this may be useful,
    so let's just do it. (detail/ViewSVN)
    by lebedevri
  26. [Remarks] Add cl::Hidden to -remarks-yaml-string-table

    It was showing up in a lot of unrelated tools. (detail/ViewSVN)
    by thegameg
  27. docs/GithubMove.rst: Remove obsolete information

    Summary:
    Remove references to the multirepo and update the document to
    reflect the current state of the github repository.

    Reviewers: mehdi_amini, jyknight

    Subscribers: jdoerfert, llvm-commits

    Tags: #llvm

    Differential Revision: https://reviews.llvm.org/D58420 (detail/ViewSVN)
    by tstellar
  28. [FileCheck] Use bool operator to test Expected

    Use bool() consistently to get boolean value of Error, Optional and
    Expected types in EXPECT calls. While static_cast is used in all cases
    but one, bool provides more clarity and makes more sense as a new
    default. (detail/ViewSVN)
    by thopre
  29. [NFC][InstCombine] Redundant masking before left-shift (PR42563)

    alive proofs:
    a,b:     https://rise4fun.com/Alive/4zsf
    c,d,e,f: https://rise4fun.com/Alive/RC49

    Indeed, not all of these patterns are canonical.
    But since this fold will only produce a single instruction
    i'm really interested in handling even uncanonical patterns.

    Other than these 6 patterns, i can't think of any other
    reasonable variants right now, although i'm sure they exist.

    For now let's start with patterns where both shift amounts are variable,
    with trivial constant "offset" between them, since i believe this is
    both simplest to handle and i think this is most common.
    But again, there are likely other variants where we could use
    ValueTracking/ConstantRange to handle more cases.

    https://bugs.llvm.org/show_bug.cgi?id=42563 (detail/ViewSVN)
    by lebedevri

Started by upstream project SVN: Clang Stage 1: cmake, RA, using system compiler build number 57858
originally caused by:

Started by upstream project SVN: Clang Stage 1: cmake, RA, using system compiler build number 57859
originally caused by:

Started by upstream project SVN: Clang Stage 1: cmake, RA, using system compiler build number 57860
originally caused by:

Started by upstream project SVN: Clang Stage 1: cmake, RA, using system compiler build number 57861
originally caused by:

This run spent:

  • 3 hr 14 min waiting;
  • 2 hr 56 min build duration;
  • 6 hr 10 min total from scheduled to completion.

Identified problems

Assertion failure

This build failed because of an assertion failure. Below is a list of all errors in the build log:
Indication 1

Ninja target failed

Below is a link to the first failed ninja target.
Indication 2

Compile Error

This build failed because of a compile error. Below is a list of all errors in the build log:
Indication 3