Changes

Summary

DebugInfo: add CodeView register mapping for ARM NT Add the core registers and NEON registers mapping to the CodeView register ID. This is sufficient to compile a basic C program with debug info using CodeView debug info.
[Modules] Make ReadModuleMapFileBlock errors reliable This prevents a crash when an error should be emitted instead. During implicit module builds, there are cases where ReadASTCore is called with ImportedBy set to nullptr, which breaks expectations in ReadModuleMapFileBlock, leading to crashes. Fix this by improving ReadModuleMapFileBlock to handle ImportedBy correctly. This only happens non deterministically in the wild, when the underlying file system changes while concurrent compiler invocations use implicit modules, forcing rebuilds which see an inconsistent filesystem state. That said, there's no much to do w.r.t. writing tests here. rdar://problem/48828801
[CMake][Fuchsia] Enable experimental pass manager by default We plan on using experimental new pass manager for Fuchsia toolchain. Differential Revision: https://reviews.llvm.org/D58214
[clang-scan-deps] reuse the file manager across invocations of the dependency scanner on a single worker thread This behavior can be controlled using the new `-reuse-filemanager` clang-scan-deps option. By default the file manager is reused. The added test/ClangScanDeps/symlink.cpp is able to pass with the reused filemanager after the related FileEntryRef changes landed earlier. The test test/ClangScanDeps/subframework_header_dir_symlink.m still fails when the file manager is reused (I run the FileCheck with not to make it PASS). I will address this in a follow-up patch that improves the DirectoryEntry name modelling in the FileManager.
Fix silent wrong-code bugs and crashes with designated initialization. We failed to correctly handle the 'holes' left behind by designated initializers in VerifyOnly mode. This would result in us thinking that a designated initialization would be valid, only to find that it is not actually valid when we come to build it. In a +Asserts build, that would assert, and in a -Asserts build, that would silently lose some part of the initialization or crash. With this change, when an InitListExpr contains any designators, we now always build a structured list so that we can track the locations of the 'holes' that we need to go back and fill in. We could in principle do better: we only need the structured form if there is a designator that jumps backwards (and can otherwise check for the holes as we progress through the initializer list), but dealing with that turns out to be rather complicated, so it's not done as part of this patch.
Refactor InitListChecker to check only a single (explicit) initializer list, rather than recursively checking multiple lists in C. This simplification is in preparation for making InitListChecker maintain more state that's specific to the explicit initializer list, particularly when handling designated initialization.
Refactor InitListChecker to make it a bit clearer that hasError is only set to true in VerifyOnly mode in cases where it's also set to true when actually building the initializer list. Add FIXMEs for the two cases where that's not true. No functionality change intended.
[WebAssembly] Make __attribute__((used)) not imply export. Add an WASM_SYMBOL_NO_STRIP flag, so that __attribute__((used)) doesn't need to imply exporting. When targeting Emscripten, have WASM_SYMBOL_NO_STRIP imply exporting. Differential Revision: https://reviews.llvm.org/D62542
[Tests] Precommit a few cases where we're missing oppurtunities for block local simplications off assumes.
[NFC] Test commit - sorted headers.
[PowerPC] Support extended mnemonics mffprwz etc. Summary: Reported in https://github.com/opencv/opencv/issues/15413. We have serveral extended mnemonics for Move To/From Vector-Scalar Register Instructions eg: mffprd,mtfprd etc. We only support one of them, this patch add the others. Reviewers: nemanjai, steven.zhang, hfinkel, #powerpc Reviewed By: hfinkel Subscribers: wuzish, qcolombet, hiraditya, kbarton, MaskRay, shchenz, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66963
[AArch64][GlobalISel] Select arithmetic extended register patterns This teaches GISel to select patterns which fold an extend plus optional shift into the addressing mode. In particular, adds and subs. Factor out the arith extended register ComplexPatterns in AArch64InstrFormats.td and create GISel equivalents. Add some equivalent functions to the ones in AArch64ISelDAGToDAG: - `selectArithExtendedRegister` - `narrowExtendRegIfNeeded` - `getExtendTypeForInst` `getExtendTypeForInst` includes the checks for loads and stores. This will be used for WRO addressing modes in loads + stores. Teach selectCopy to properly handle subregister copies on the same bank in order to support `narrowExtendRegIfNeeded`. The extended register must be a GPR32, so we need to support same-bank subregister copies. Fix a bug in getSubRegForClass which would cause registers on things like GPR32common to end up getting ssub. Just change the check to look for FPR32 rather than GPR32. For tests: - Add select-arith-extended-reg.mir - Update addsub_ext.ll to include GlobalISel checks Differential Revision: https://reviews.llvm.org/D66835
[X86] Don't emit unreachable stack adjustments Summary: This is a minor improvement on our past attempts to do this. Fixes PR43155. Reviewers: hans Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66905
Allow '@' to appear in x86 mingw symbols Summary: There is no reason to differ in assembler behavior here between -msvc and -gnu targets. Without this setting, the text after the '@' is interpreted as a symbol variable, like foo@IMGREL. Reviewers: mstorsjo Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66974
[InstCombine] add possible bswap as widening shuffle test; NFC Goes with the proposal in D66965.
[CFG] Fix CFG for statement-expressions in return values. We're building the CFG from bottom to top, so when the return-value expression has a non-trivial CFG on its own, we need to continue building from the entry to the return-value expression CFG rather than from the block to which we've just appended the return statement. Fixes a false positive warning "control may reach end of non-void function".
Fix the build for MSVC builds using M_PI
[X86][SSE] combinePMULDQ - pmuldq(x, 0) -> zero vector (PR43159) ISD::isBuildVectorAllZeros permits undef elements to be present, which means we can't return it as a zero vector. PMULDQ/PMULUDQ is an extending multiply so a multiply by zero of the lower 32-bits should result in a zero 64-bit element.
[ASan] Version mismatch check follow-up Follow-up for: [ASan] Make insertion of version mismatch guard configurable 3ae9b9d5e40d1d9bdea1fd8e6fca322df920754a This tiny change makes sure that this test passes on our internal bots as well.
AMDGPU/GlobalISel: Legalize sin/cos
Avoid crash when dumping NULL Type as JSON. Patch by Bert Belder.
Remove `FileManager::invalidateCache` as it has no callers anymore. NFC.
[InstCombine] reduce duplicated code; NFC
Revert [MBP] Disable aggressive loop rotate in plain mode This reverts r369664 (git commit 51f48295cbe8fa3a44db263b528dd9f7bae7bf9a) It causes many benchmark regressions, internally and in llvm's benchmark suite.
Revert enabling MemorySSA. Breaks sanitizers bots. Differential Revision: https://reviews.llvm.org/D58311
[X86] Remove what little support we had for MPX -Deprecate -mmpx and -mno-mpx command line options -Remove CPUID detection of mpx for -march=native -Remove MPX from all CPUs -Remove MPX preprocessor define I've left the "mpx" string in the backend so we don't fail on old IR, but its not connected to anything. gcc has also deprecated these command line options. https://www.phoronix.com/scan.php?page=news_item&px=GCC-Patch-To-Drop-MPX Differential Revision: https://reviews.llvm.org/D66669
GlobalISel: Don't compute known bits for non-integral GEP
[LoopUnrollAndJam] Use Lazy strategy for DTU. We can also apply the earlier updates to the lazy DTU, instead of applying them directly. Reviewers: kuhar, brzycki, asbirlea, SjoerdMeijer Reviewed By: brzycki, asbirlea, SjoerdMeijer Differential Revision: https://reviews.llvm.org/D66918
[cmake] enable x86 libfuzzer on Windows - recent commit https://reviews.llvm.org/D66433 enabled libfuzzer to build on windows, this just enables the option to build as part of the the regular build.
GlobalISel: Add maskedValueIsZero and signBitIsZero to known bits I dropped the DemandedElts since it seems to be missing from some of the new interfaces, but not others.
GlobalISel: Add known bits to InstructionSelector AMDGPU uses this for some addressing mode selection patterns. The analysis run itself doesn't do anything so it seems easier to just always require this than adding a way to opt in.
[MemorySSA & LoopPassManager] Enable MemorySSA as loop dependency. Update tests. Summary: I'm not planning to check this in at the moment, but feedback is very welcome, in particular how this affects performance. The feedback obtains here will guide the next steps towards enabling this. This patch enables the use of MemorySSA in the loop pass manager. Passes that currently use MemorySSA: - EarlyCSE Passes that use MemorySSA after this patch: - EarlyCSE - LICM - SimpleLoopUnswitch Loop passes that update MemorySSA (and do not use it yet, but could use it after this patch): - LoopInstSimplify - LoopSimplifyCFG - LoopUnswitch - LoopRotate - LoopSimplify - LCSSA Loop passes that do *not* update MemorySSA: - IndVarSimplify - LoopDelete - LoopIdiom - LoopSink - LoopUnroll - LoopInterchange - LoopUnrollAndJam - LoopVectorize - LoopReroll - IRCE Reviewers: chandlerc, george.burgess.iv, davide, sanjoy, gberry Subscribers: jlebar, Prazek, dmgreen, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58311
Added 'inline' to functions defined in headers to avoid ODR violations
[GlobalISel][AArch64] Select llvm.aarch64.stxr* intrinsics. Add a GISelPredicateCode to the stxr_* PatFrags in AArch64InstrAtomics.td. This allows us to select these intrinsics. Differential Revision: https://reviews.llvm.org/D65779
[InstCombine] add tests for bswap disguised as shuffle; NFC Somewhat motivating case In PR43146: https://bugs.llvm.org/show_bug.cgi?id=43146 But that's a lot more complicated.
[GlobalISel][AArch64] Use a GISelPredicateCode to select llvm.aarch64.stlxr.* Remove manual selection code for this intrinsic and use a GISelPredicateCode instead. This allows us to fully select this intrinsic without any tricky custom C++ matching. Differential Revision: https://reviews.llvm.org/D65780
Changed FrontendActionFactory::create to return a std::unique_ptr Subscribers: jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66947
[AArch64][GlobalISel] Select @llvm.aarch64.ldxr.* intrinsics Same thing as D66897, but for ldxr.* instead. Add a GISelPredicateCode to the ldxr_* definitions, which allows us to import them. Add select-ldxr-intrin.mir, and update arm64-ldxr-stxr.ll. Differential Revision: https://reviews.llvm.org/D66898
[AArch64][GlobalISel] Select @llvm.aarch64.ldaxr.* intrinsics Add a GISelPredicateCode to ldaxr_*. This allows us to import the patterns for @llvm.aarch64.ldaxr.*, and thus select them. Add `isLoadStoreOfNumBytes` for the GISelPredicateCode, since each of these intrinsics involves the same check. Add select-ldaxr-intrin.mir, and update arm64-ldxr-stxr.ll. Differential Revision: https://reviews.llvm.org/D66897
[SimplifyCFG] Skip sinking common lifetime markers of `alloca`. Summary: - Similar to the workaround in fix of PR30188, skip sinking common lifetime markers of `alloca`. They are mostly left there after inlining functions in branches. Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66950
[PowerPC][NFC] Update fp-int-conversions-direct-moves.ll using script Also add -ppc-asm-full-reg-names,-ppc-vsr-nums-as-vr.
[Clangd] NFC: Added fixme for checking for local/anonymous types for extracted parameters
[clangd] Update out-of-date links in readme, NFC.
[NFC][SimplifyCFG] 'Safely extract low bits' pattern will also benefit from -phi-node-folding-threshold=3 This is the naive implementation of x86 BZHI/BEXTR instruction: it takes input and bit count, and extracts low nbits up to bit width. I.e. unlike shift it does not have any UB when nbits >= bitwidth. Which means we don't need a while PHI here, simple select will do. And if it's a select, it should then be trivial to fix codegen to select it to BEXTR/BZHI. See https://bugs.llvm.org/show_bug.cgi?id=34704
[clangd][NFC] Update background-index command line description Summary: We didn't change this in D64019 just in case we revert it back. Deleting it now. Reviewers: hokein, sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66943
[DAGCombine] Fix shadow variable warnings. NFCI.
DWARFDebugLoc: Make parsing and error reporting more robust Summary: While examining this class for possible use in lldb, I noticed two things: - it spits out parsing errors directly to stderr - the loclists parser can incorrectly return valid location lists when parsing malformed (truncated) data I improve the stderr situation by making the parseOneLocationList functions return Expected<T>s. The errors are still dumped to stderr by their callers, so this is only a partial fix, but it is enough for my use case, as I intend to parse the locations lists one by one. I fix the behavior in the truncated scenario by using the newly introduced DataExtractor Cursor API. I also add tests for handling the error cases, as they currently have no coverage. Reviewers: dblaikie, JDevlieghere, probinson Subscribers: lldb-commits, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63591
Removed a function declaration that doesn't have a definition
[RISCV] Fix callee-saved-gprs.ll test ABIs
Allow replaceAndRecursivelySimplify to list unsimplified visitees. This is part of D65280 and split it to avoid ABI changes on the 9.0 release branch.
[mips] Inline emitStoreWithSymOffset and emitLoadWithSymOffset methods. NFC Both methods `MipsTargetStreamer::emitStoreWithSymOffset` and `MipsTargetStreamer::emitLoadWithSymOffset` are almost the same and differ argument names only. These methods are used in the single place so it's better to inline their code and remove original methods.
[mips] Fix expanding `lw/sw $reg1, symbol($reg2)` instruction When a "base" in the `lw/sw $reg1, symbol($reg2)` instruction is a register and generated code is position independent, backend does not add the "base" value to the symbol address. ``` lw $reg1, %got(symbol)($gp) lw/sw $reg1, 0($reg1) ``` This patch fixes the bug and adds the missed `addu` instruction by passing `BaseReg` into the `loadAndAddSymbolAddress` routine and handles the case when the `BaseReg` is the zero register to escape redundant `move reg, reg` instruction: ``` lw $reg1, %got(symbol)($gp) addu $reg1, $reg1, $reg2 lw/sw $reg1, 0($reg1) ``` Differential Revision: https://reviews.llvm.org/D66894
[InstSimplify] Drop leftover "division-by-zero guard" around `@llvm.umul.with.overflow` inverted overflow bit Summary: Now that with D65143/D65144 we've produce `@llvm.umul.with.overflow`, and with D65147 we've flattened the CFG, we now can see that the guard may have been there to prevent division by zero is redundant. We can simply drop it: ``` ---------------------------------------- Name: no overflow or zero %iszero = icmp eq i4 %y, 0 %umul = smul_overflow i4 %x, %y %umul.ov = extractvalue {i4, i1} %umul, 1 %umul.ov.not = xor %umul.ov, -1 %retval.0 = or i1 %iszero, %umul.ov.not ret i1 %retval.0 => %iszero = icmp eq i4 %y, 0 %umul = smul_overflow i4 %x, %y %umul.ov = extractvalue {i4, i1} %umul, 1 %umul.ov.not = xor %umul.ov, -1 %retval.0 = or i1 %iszero, %umul.ov.not ret i1 %umul.ov.not Done: 1 Optimization is correct! ``` Note that this is inverted from what we have in a previous patch, here we are looking for the inverted overflow bit. And that inversion is kinda problematic - given this particular pattern we neither hoist that `not` closer to `ret` (then the pattern would have been identical to the one without inversion, and would have been handled by the previous patch), neither do the opposite transform. But regardless, we should handle this too. I've filled [[ https://bugs.llvm.org/show_bug.cgi?id=42720 | PR42720 ]]. Reviewers: nikic, spatel, xbolva00, RKSimon Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65151
[InstSimplify] Drop leftover "division-by-zero guard" around `@llvm.umul.with.overflow` overflow bit Summary: Now that with D65143/D65144 we've produce `@llvm.umul.with.overflow`, and with D65147 we've flattened the CFG, we now can see that the guard may have been there to prevent division by zero is redundant. We can simply drop it: ``` ---------------------------------------- Name: no overflow and not zero %iszero = icmp ne i4 %y, 0 %umul = umul_overflow i4 %x, %y %umul.ov = extractvalue {i4, i1} %umul, 1 %retval.0 = and i1 %iszero, %umul.ov ret i1 %retval.0 => %iszero = icmp ne i4 %y, 0 %umul = umul_overflow i4 %x, %y %umul.ov = extractvalue {i4, i1} %umul, 1 %retval.0 = and i1 %iszero, %umul.ov ret %umul.ov Done: 1 Optimization is correct! ``` Reviewers: nikic, spatel, xbolva00 Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65150
[SimplifyCFG] FoldTwoEntryPHINode(): don't bailout on i1 PHI's if we can hoist a 'not' from incoming values Summary: As it can be seen in the tests in D65143/D65144, even though we have formed an '@llvm.umul.with.overflow' and got rid of potential for division-by-zero, the control flow remains, we still have that branch. We have this condition: ``` // Don't fold i1 branches on PHIs which contain binary operators // These can often be turned into switches and other things. if (PN->getType()->isIntegerTy(1) && (isa<BinaryOperator>(PN->getIncomingValue(0)) || isa<BinaryOperator>(PN->getIncomingValue(1)) || isa<BinaryOperator>(IfCond))) return false; ``` which was added back in rL121764 to help with `select` formation i think? That check prevents us to flatten the CFG here, even though we know we no longer need that guard and will be able to drop everything but the '@llvm.umul.with.overflow' + `not`. As it can be seen from tests, we end here because the `not` is being sinked into the PHI's incoming values by InstCombine, so we can't workaround this by hoisting it to after PHI. Thus i suggest that we relax that check to not bailout if we'd get to hoist the `not`. Reviewers: craig.topper, spatel, fhahn, nikic Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65147
[InstCombine] Fold '((%x * %y) u/ %x) != %y' to '@llvm.umul.with.overflow' + overflow bit extraction Summary: `((%x * %y) u/ %x) != %y` is one of (3?) common ways to check that some unsigned multiplication (will not) overflow. Currently, we don't catch it. We could: ``` $ /repositories/alive2/build-Clang-unknown/alive -root-only ~/llvm-patch1.ll Processing /home/lebedevri/llvm-patch1.ll.. ---------------------------------------- Name: no overflow %o0 = mul i4 %y, %x %o1 = udiv i4 %o0, %x %r = icmp ne i4 %o1, %y ret i1 %r => %n0 = umul_overflow i4 %x, %y %o0 = extractvalue {i4, i1} %n0, 0 %o1 = udiv %o0, %x %r = extractvalue {i4, i1} %n0, 1 ret %r Done: 1 Optimization is correct! ---------------------------------------- Name: no overflow %o0 = mul i4 %y, %x %o1 = udiv i4 %o0, %x %r = icmp eq i4 %o1, %y ret i1 %r => %n0 = umul_overflow i4 %x, %y %o0 = extractvalue {i4, i1} %n0, 0 %o1 = udiv %o0, %x %n1 = extractvalue {i4, i1} %n0, 1 %r = xor %n1, -1 ret i1 %r Done: 1 Optimization is correct! ``` Reviewers: nikic, spatel, efriedma, xbolva00, RKSimon Reviewed By: nikic Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65144
[InstCombine] Fold '(-1 u/ %x) u< %y' to '@llvm.umul.with.overflow' + overflow bit extraction Summary: `(-1 u/ %x) u< %y` is one of (3?) common ways to check that some unsigned multiplication (will not) overflow. Currently, we don't catch it. We could: ``` ---------------------------------------- Name: no overflow %o0 = udiv i4 -1, %x %r = icmp ult i4 %o0, %y => %o0 = udiv i4 -1, %x %n0 = umul_overflow i4 %x, %y %r = extractvalue {i4, i1} %n0, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: no overflow, swapped %o0 = udiv i4 -1, %x %r = icmp ugt i4 %y, %o0 => %o0 = udiv i4 -1, %x %n0 = umul_overflow i4 %x, %y %r = extractvalue {i4, i1} %n0, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: overflow %o0 = udiv i4 -1, %x %r = icmp uge i4 %o0, %y => %o0 = udiv i4 -1, %x %n0 = umul_overflow i4 %x, %y %n1 = extractvalue {i4, i1} %n0, 1 %r = xor %n1, -1 Done: 1 Optimization is correct! ---------------------------------------- Name: overflow %o0 = udiv i4 -1, %x %r = icmp ule i4 %y, %o0 => %o0 = udiv i4 -1, %x %n0 = umul_overflow i4 %x, %y %n1 = extractvalue {i4, i1} %n0, 1 %r = xor %n1, -1 Done: 1 Optimization is correct! ``` As it can be observed from tests, while simply forming the `@llvm.umul.with.overflow` is easy, if we were looking for the inverted answer, then more work needs to be done to cleanup the now-pointless control-flow that was guarding against division-by-zero. This is being addressed in follow-up patches. Reviewers: nikic, spatel, efriedma, xbolva00, RKSimon Reviewed By: nikic, xbolva00 Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65143
Fix variable ‘IsInitCapturePack’ set but not used warning. NFCI.
Fix MSVC "not all control paths return a value" warning. NFCI.
Removed `AnyFunctionDecl`, it is unused.
Removed two function declarations that don't have definitions
[CostModel] Model all `extractvalue`s as free. Summary: As disscussed in https://reviews.llvm.org/D65148#1606412, `extractvalue` don't actually generate any code, so we should treat them as free. Reviewers: craig.topper, RKSimon, jnspaulsson, greened, asb, t.p.northover, jmolloy, dmgreen Reviewed By: jmolloy Subscribers: javed.absar, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66098
[Index] Added a ShouldSkipFunctionBody callback to libIndex, and refactored clients to use it instead of inventing their own solution Subscribers: jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66879
[Index] Stopped wrapping FrontendActions in libIndex and its users Exposed a new function, createIndexingASTConsumer, that creates an ASTConsumer. ASTConsumers compose well. Removed wrapping functionality from createIndexingAction.
[Index] Moved the IndexDataConsumer::finish call into the IndexASTConsumer from IndexAction Doing so removes the last reason to expose a FrontendAction from libIndex.
[CodeGen]: don't treat structures returned in registers as memory inputs Summary: The "=r" output constraint for a structure variable passed to inline asm shouldn't be converted to "=*r", as this changes the asm directive semantics and prevents DSE optimizations. Instead, preserve the constraints and return such structures as integers of corresponding size, which are converted back to structures when storing the result. Fixes PR42672. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D65234
[DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations The missing line added by this patch ensures that only spilt variable locations are candidates for being restored from the stack. Otherwise, register or constant-value information can be interpreted as a spill location, through a union. The added regression test replicates a scenario where this occurs: the stack load from [rsp] causes the register-location DBG_VALUE to be "restored" to rsi, when it should be left alone. See PR43058 for details. Un x-fail a test that was suffering from this from a previous patch. Differential Revision: https://reviews.llvm.org/D66895
Fix signed/unsigned comparison warning. NFCI.
Fix shadow variable warning. NFCI.
[yaml2obj] - Allow placing local symbols after globals. This allows us to produce broken binaries with local symbols placed after global in '.dynsym'/'.symtab' Also, simplifies the code. Differential revision: https://reviews.llvm.org/D66799
[llvm-readobj/llvm-readelf] - Report a proper warning when dumping a broken dynamic relocation. When we have a dynamic relocation with a broken symbol's st_name, tools report a useless error: "Invalid data was encountered while parsing the file". After this change we report a warning + "<corrupt>" as a symbol name. Differential revision: https://reviews.llvm.org/D66734
[ARM] MVE Masked loads and stores Masked loads and store fit naturally with MVE, the instructions being easily predicated. This adds lowering for the simple cases of masked loads and stores. It does not yet deal with widening/narrowing or pre/post inc. The llvm masked load intrinsic will accept a "passthru" value, dictating the values used for the zero masked lanes. In MVE the instructions write 0 to the zero predicated lanes, so we need to match a passthru that isn't 0 (or undef) with a select instruction to pull in the correct data after the load. We also need to do something with unaligned loads/stores. Currently this uses a similar method used in big endian, using an VLDRB.8 (and potentially a VREV in BE). This does mean that the predicate mask is converted from, for example, a v4i1 to a v16i1. The VLDR instructions are defined as using the first bit of the relevant mask lane, so this could potentially load different results if the predicate is little odd. As the input is a v4i1 however, I believe this is OK and all the bits required should be set in the predicate, making the VLDRB.8 load the same data. Differential Revision: https://reviews.llvm.org/D66534
[DebugInfo] LiveDebugValues should always revisit backedges if it skips them The "join" method in LiveDebugValues does not attempt to join unseen predecessor blocks if their out-locations aren't yet initialized, instead the block should be re-visited later to see if any locations have changed validity. However, because the set of blocks were all being "process"'d once before "join" saw them, that logic in "join" was actually ignoring legitimate out-locations on the first pass through. This meant that some invalidated locations were not removed from the head of loops, allowing illegal locations to persist. Fix this by removing the run of "process" before the main join/process loop in ExtendRanges. Now the unseen predecessors that "join" skips truly are uninitialized, and we come back to the block at a later time to re-run "join", see the @baz function added. This also fixes another fault where stack/register transfers in the entry block (or any other before-any-loop-block) had their tranfers initially ignored, and were then never revisited. The MIR test added tests for this behaviour. XFail a test that exposes another bug; a fix for this is coming in D66895. Differential Revision: https://reviews.llvm.org/D66663
[X86][CodeGen][NFC] Delay `combineIncDecVector()` from DAGCombine to X86DAGToDAGISel Summary: We were previously doing it in DAGCombine. But we also want to do `sub %x, C` -> `add %x, (sub 0, C)` for vectors in DAGCombine. So if we had `sub %x, -1`, we'll transform it to `add %x, 1`, which `combineIncDecVector()` will immediately transform back into `sub %x, -1`, and here we go again... I've marked this as NFC since not a single test changes, but since that 'changes' DAGCombine, probably this isn't fully NFC. Reviewers: RKSimon, craig.topper, spatel Reviewed By: craig.topper Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62327
[DAGCombiner] (insert_vector_elt (vector_shuffle X, Y), (extract_vector_elt X, N), IdxC) -> (vector_shuffle X, Y) Summary: This is beneficial when the shuffle is only used once and end up being generated in a few places when some node is combined into a shuffle. Reviewers: craig.topper, efriedma, RKSimon, lebedev.ri Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66718
[ARM] Masked load and store and predicate tests. NFC
[InstCombine] Shift amount reassociation in bittest: trunc-of-lshr (PR42399) Summary: Finally, the fold i was looking forward to :) The legality check is muddy, i doubt i've groked the full generalization, but it handles all the cases i care about, and can come up with: https://rise4fun.com/Alive/26j I.e. we can perform the fold if **any** of the following is true: * The shift amount is either zero or one less than widest bitwidth * Either of the values being shifted has at most lowest bit set * The value that is being shifted by `shl` (which is not truncated) should have no less leading zeros than the total shift amount; * The value that is being shifted by `lshr` (which **is** truncated) should have no less leading zeros than the widest bit width minus total shift amount minus one I strongly suspect there is some better generalization, but i'm not aware of it as of right now. For now i also avoided using actual `computeKnownBits()`, but restricted it to constants. Reviewers: spatel, nikic, xbolva00 Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66383
[Index] Create PP callbacks in the ASTConsumer Doing so removes one reason to create a custom FrontendAction. FrontendActions are not desirable because they are difficult to compose. ASTConsumers are much easier to compose.
[OpenCL] Fix diagnosing enqueue_kernel call with too few args The err_typecheck_call_too_few_args diagnostic takes arguments, but none were provided causing clang to crash when attempting to diagnose an enqueue_kernel call with too few arguments. Fixes llvm.org/PR42045 Differential Revision: https://reviews.llvm.org/D66883
[Index] Marked a bunch of classes 'final' This file defines multiple inheritance hierarchies and 'final' helps with readability.
LegalizeSetCCCondCode - Reduce scope of NeedSwap to fix cppcheck warning. NFCI. No need for this to be defined outside the only switch case its used in.
Fix variable set but no used warnings on NDEBUG builds. NFCI.
Fix variable set but no used warning on NDEBUG builds. NFCI.
[Analyzer] Iterator Checkers - Make range errors and invalidated access fatal Range errors (dereferencing or incrementing the past-the-end iterator or decrementing the iterator of the first element of the range) and access of invalidated iterators lead to undefined behavior. There is no point to continue the analysis after such an error on the same execution path, but terminate it by a sink node (fatal error). This also improves the performance and helps avoiding double reports (e.g. in case of nested iterators). Differential Revision: https://reviews.llvm.org/D62893
[COFF] Add a ResourceSectionRef method for getting the data entry, print it in llvm-readobj Differential Revision: https://reviews.llvm.org/D66819
[COFF] Add a bounds checking helper for iterating a coff_resource_dir_table Instead of blindly incrementing pointers in llvm-readobj, use this helper, which does bounds checking against the available section data. Differential Revision: https://reviews.llvm.org/D66818
[COFF] Fix error handling in ResourceSectionRef Previously, the expression (Reader.readFoo()) was expanded twice, triggering asserts as one of the Error types ends up not checked (and as it was expanded twice, the method would end up called twice if it failed first). Differential Revision: https://reviews.llvm.org/D66817
[llvm-readobj] Print the resource type textually for .res files This already is done when dumping resources from coff objects. Differential Revision: https://reviews.llvm.org/D66816
[llvm-readobj] Remove a leftover string trim operation. NFC. This became unnecessary in SVN r359153. Differential Revision: https://reviews.llvm.org/D66815
[clangd] Update themeRuleMatcher when color theme changes in vscode extension. Summary: Add event listener that listens to configuration changes and reloads the ThemeRuleMatcher when the theme changes. Right now it will not recolor the files, depends on the colorizer CL for that. Reviewers: hokein, ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66406
Reland "[clangd] Migrate last tweak tests to TweakTesting.h and remove old helpers. NFC" This reverts commit 3dcf55aa45bad800533b36b70a14ebeb2b84e219, and avoids use of multiline raw strings in macro calls.
[Test][Time profiler] Fix test for python3 Summary: Fix test checking time profiler generates correct tracing json-file. `filter` works differently for python2 and python3, so unifying this. Reviewers: mgehre, nathanchance Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66873
[X86] Remove isel patterns with X86VBroadcast+scalar_to_vector+load. The DAG should have these as X86VBroadcast+load.
Removed dead code from clang/AST/NSAPI.h Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66884
[x86] Adding support for some missing intrinsics: _mm512_cvtsi512_si32 Summary: Adding support for some missing intrinsics: _mm512_cvtsi512_si32 Reviewers: craig.topper, pengfei, LuoYuanke, spatel, RKSimon Reviewed By: craig.topper Subscribers: llvm-commits Patch by Bing Yu (yubing) Differential Revision: https://reviews.llvm.org/D66785
[X86] Remove some unneeded X86VBroadcast isel patterns that have larger than 128 bit input types. We should always be shrinking the input to 128 bits or smaller when the node is created.

Change Type	Path in Repository	Path in Workspace
Revision 370423 by Saleem Abdulrasool: DebugInfo: add CodeView register mapping for ARM NT Add the core registers and NEON registers mapping to the CodeView register ID. This is sufficient to compile a basic C program with debug info using CodeView debug info.
	/llvm/trunk/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def (diff)	llvm.src/include/llvm/DebugInfo/CodeView/CodeViewRegisters.def
Revision 370422 by Bruno Lopes: [Modules] Make ReadModuleMapFileBlock errors reliable This prevents a crash when an error should be emitted instead. During implicit module builds, there are cases where ReadASTCore is called with ImportedBy set to nullptr, which breaks expectations in ReadModuleMapFileBlock, leading to crashes. Fix this by improving ReadModuleMapFileBlock to handle ImportedBy correctly. This only happens non deterministically in the wild, when the underlying file system changes while concurrent compiler invocations use implicit modules, forcing rebuilds which see an inconsistent filesystem state. That said, there's no much to do w.r.t. writing tests here. rdar://problem/48828801
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/Basic/DiagnosticSerializationKinds.td (diff)	clang.src/include/clang/Basic/DiagnosticSerializationKinds.td
	/cfe/trunk/lib/Serialization/ASTReader.cpp (diff)	clang.src/lib/Serialization/ASTReader.cpp
Revision 370421 by phosek: [CMake][Fuchsia] Enable experimental pass manager by default We plan on using experimental new pass manager for Fuchsia toolchain. Differential Revision: https://reviews.llvm.org/D58214
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/cmake/caches/Fuchsia-stage2.cmake (diff)	clang.src/cmake/caches/Fuchsia-stage2.cmake
	/cfe/trunk/cmake/caches/Fuchsia.cmake (diff)	clang.src/cmake/caches/Fuchsia.cmake
Revision 370420 by arphaman: [clang-scan-deps] reuse the file manager across invocations of the dependency scanner on a single worker thread This behavior can be controlled using the new `-reuse-filemanager` clang-scan-deps option. By default the file manager is reused. The added test/ClangScanDeps/symlink.cpp is able to pass with the reused filemanager after the related FileEntryRef changes landed earlier. The test test/ClangScanDeps/subframework_header_dir_symlink.m still fails when the file manager is reused (I run the FileCheck with not to make it PASS). I will address this in a follow-up patch that improves the DirectoryEntry name modelling in the FileManager.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/Tooling/DependencyScanning/DependencyScanningService.h (diff)	clang.src/include/clang/Tooling/DependencyScanning/DependencyScanningService.h
	/cfe/trunk/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h (diff)	clang.src/include/clang/Tooling/DependencyScanning/DependencyScanningWorker.h
	/cfe/trunk/include/clang/Tooling/Tooling.h (diff)	clang.src/include/clang/Tooling/Tooling.h
	/cfe/trunk/lib/Tooling/DependencyScanning/DependencyScanningService.cpp (diff)	clang.src/lib/Tooling/DependencyScanning/DependencyScanningService.cpp
	/cfe/trunk/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp (diff)	clang.src/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
	/cfe/trunk/lib/Tooling/Tooling.cpp (diff)	clang.src/lib/Tooling/Tooling.cpp
	/cfe/trunk/test/ClangScanDeps/Inputs/subframework_header_dir_symlink_cdb.json	clang.src/test/ClangScanDeps/Inputs/subframework_header_dir_symlink_cdb.json
	/cfe/trunk/test/ClangScanDeps/Inputs/symlink_cdb.json	clang.src/test/ClangScanDeps/Inputs/symlink_cdb.json
	/cfe/trunk/test/ClangScanDeps/subframework_header_dir_symlink.m	clang.src/test/ClangScanDeps/subframework_header_dir_symlink.m
	/cfe/trunk/test/ClangScanDeps/symlink.cpp	clang.src/test/ClangScanDeps/symlink.cpp
	/cfe/trunk/tools/clang-scan-deps/ClangScanDeps.cpp (diff)	clang.src/tools/clang-scan-deps/ClangScanDeps.cpp
Revision 370419 by rsmith: Fix silent wrong-code bugs and crashes with designated initialization. We failed to correctly handle the 'holes' left behind by designated initializers in VerifyOnly mode. This would result in us thinking that a designated initialization would be valid, only to find that it is not actually valid when we come to build it. In a +Asserts build, that would assert, and in a -Asserts build, that would silently lose some part of the initialization or crash. With this change, when an InitListExpr contains any designators, we now always build a structured list so that we can track the locations of the 'holes' that we need to go back and fill in. We could in principle do better: we only need the structured form if there is a designator that jumps backwards (and can otherwise check for the holes as we progress through the initializer list), but dealing with that turns out to be rather complicated, so it's not done as part of this patch.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/AST/Expr.h (diff)	clang.src/include/clang/AST/Expr.h
	/cfe/trunk/lib/Sema/SemaInit.cpp (diff)	clang.src/lib/Sema/SemaInit.cpp
	/cfe/trunk/test/SemaCXX/designated-initializers.cpp (diff)	clang.src/test/SemaCXX/designated-initializers.cpp
Revision 370418 by rsmith: Refactor InitListChecker to check only a single (explicit) initializer list, rather than recursively checking multiple lists in C. This simplification is in preparation for making InitListChecker maintain more state that's specific to the explicit initializer list, particularly when handling designated initialization.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Sema/SemaInit.cpp (diff)	clang.src/lib/Sema/SemaInit.cpp
	/cfe/trunk/test/Sema/designated-initializers.c (diff)	clang.src/test/Sema/designated-initializers.c
Revision 370417 by rsmith: Refactor InitListChecker to make it a bit clearer that hasError is only set to true in VerifyOnly mode in cases where it's also set to true when actually building the initializer list. Add FIXMEs for the two cases where that's not true. No functionality change intended.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Sema/SemaInit.cpp (diff)	clang.src/lib/Sema/SemaInit.cpp
Revision 370415 by djg: [WebAssembly] Make __attribute__((used)) not imply export. Add an WASM_SYMBOL_NO_STRIP flag, so that __attribute__((used)) doesn't need to imply exporting. When targeting Emscripten, have WASM_SYMBOL_NO_STRIP imply exporting. Differential Revision: https://reviews.llvm.org/D62542
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/BinaryFormat/Wasm.h (diff)	llvm.src/include/llvm/BinaryFormat/Wasm.h
	/llvm/trunk/include/llvm/MC/MCSymbolWasm.h (diff)	llvm.src/include/llvm/MC/MCSymbolWasm.h
	/llvm/trunk/include/llvm/MC/MCWasmObjectWriter.h (diff)	llvm.src/include/llvm/MC/MCWasmObjectWriter.h
	/llvm/trunk/lib/MC/MCWasmObjectTargetWriter.cpp (diff)	llvm.src/lib/MC/MCWasmObjectTargetWriter.cpp
	/llvm/trunk/lib/MC/MCWasmStreamer.cpp (diff)	llvm.src/lib/MC/MCWasmStreamer.cpp
	/llvm/trunk/lib/MC/WasmObjectWriter.cpp (diff)	llvm.src/lib/MC/WasmObjectWriter.cpp
	/llvm/trunk/lib/ObjectYAML/WasmYAML.cpp (diff)	llvm.src/lib/ObjectYAML/WasmYAML.cpp
	/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp (diff)	llvm.src/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
	/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h (diff)	llvm.src/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
	/llvm/trunk/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp (diff)	llvm.src/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
	/llvm/trunk/test/MC/WebAssembly/no-dead-strip.ll (diff)	llvm.src/test/MC/WebAssembly/no-dead-strip.ll
	/llvm/trunk/tools/llvm-readobj/WasmDumper.cpp (diff)	llvm.src/tools/llvm-readobj/WasmDumper.cpp
Revision 370414 by reames: [Tests] Precommit a few cases where we're missing oppurtunities for block local simplications off assumes.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/Transforms/GVN/equality-assume.ll	llvm.src/test/Transforms/GVN/equality-assume.ll
Revision 370412 by nand: [NFC] Test commit - sorted headers.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/AST/ExprConstant.cpp (diff)	clang.src/lib/AST/ExprConstant.cpp
Revision 370411 by jsji: [PowerPC] Support extended mnemonics mffprwz etc. Summary: Reported in https://github.com/opencv/opencv/issues/15413. We have serveral extended mnemonics for Move To/From Vector-Scalar Register Instructions eg: mffprd,mtfprd etc. We only support one of them, this patch add the others. Reviewers: nemanjai, steven.zhang, hfinkel, #powerpc Reviewed By: hfinkel Subscribers: wuzish, qcolombet, hiraditya, kbarton, MaskRay, shchenz, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66963
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/PowerPC/P9InstrResources.td (diff)	llvm.src/lib/Target/PowerPC/P9InstrResources.td
	/llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td (diff)	llvm.src/lib/Target/PowerPC/PPCInstrVSX.td
	/llvm/trunk/test/CodeGen/PowerPC/bitcasts-direct-move.ll (diff)	llvm.src/test/CodeGen/PowerPC/bitcasts-direct-move.ll
	/llvm/trunk/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll (diff)	llvm.src/test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
	/llvm/trunk/test/CodeGen/PowerPC/direct-move-profit.ll (diff)	llvm.src/test/CodeGen/PowerPC/direct-move-profit.ll
	/llvm/trunk/test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll (diff)	llvm.src/test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll
	/llvm/trunk/test/CodeGen/PowerPC/fp64-to-int16.ll (diff)	llvm.src/test/CodeGen/PowerPC/fp64-to-int16.ll
	/llvm/trunk/test/CodeGen/PowerPC/gpr-vsr-spill.ll (diff)	llvm.src/test/CodeGen/PowerPC/gpr-vsr-spill.ll
	/llvm/trunk/test/CodeGen/PowerPC/inlineasm-extendedmne.ll	llvm.src/test/CodeGen/PowerPC/inlineasm-extendedmne.ll
	/llvm/trunk/test/CodeGen/PowerPC/ppc64-align-long-double.ll (diff)	llvm.src/test/CodeGen/PowerPC/ppc64-align-long-double.ll
	/llvm/trunk/test/CodeGen/PowerPC/pr26180.ll (diff)	llvm.src/test/CodeGen/PowerPC/pr26180.ll
	/llvm/trunk/test/CodeGen/PowerPC/pr31144.ll (diff)	llvm.src/test/CodeGen/PowerPC/pr31144.ll
	/llvm/trunk/test/CodeGen/PowerPC/select-addrRegRegOnly.ll (diff)	llvm.src/test/CodeGen/PowerPC/select-addrRegRegOnly.ll
	/llvm/trunk/test/CodeGen/PowerPC/setrnd.ll (diff)	llvm.src/test/CodeGen/PowerPC/setrnd.ll
	/llvm/trunk/test/CodeGen/PowerPC/store_fptoi.ll (diff)	llvm.src/test/CodeGen/PowerPC/store_fptoi.ll
	/llvm/trunk/test/CodeGen/PowerPC/uint-to-fp-v4i32.ll (diff)	llvm.src/test/CodeGen/PowerPC/uint-to-fp-v4i32.ll
	/llvm/trunk/test/CodeGen/PowerPC/uint-to-ppcfp128-crash.ll (diff)	llvm.src/test/CodeGen/PowerPC/uint-to-ppcfp128-crash.ll
	/llvm/trunk/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll (diff)	llvm.src/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
	/llvm/trunk/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll (diff)	llvm.src/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
	/llvm/trunk/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll (diff)	llvm.src/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
	/llvm/trunk/test/MC/Disassembler/PowerPC/vsx.txt (diff)	llvm.src/test/MC/Disassembler/PowerPC/vsx.txt
	/llvm/trunk/test/MC/PowerPC/vsx.s (diff)	llvm.src/test/MC/PowerPC/vsx.s
Revision 370410 by paquette: [AArch64][GlobalISel] Select arithmetic extended register patterns This teaches GISel to select patterns which fold an extend plus optional shift into the addressing mode. In particular, adds and subs. Factor out the arith extended register ComplexPatterns in AArch64InstrFormats.td and create GISel equivalents. Add some equivalent functions to the ones in AArch64ISelDAGToDAG: - `selectArithExtendedRegister` - `narrowExtendRegIfNeeded` - `getExtendTypeForInst` `getExtendTypeForInst` includes the checks for loads and stores. This will be used for WRO addressing modes in loads + stores. Teach selectCopy to properly handle subregister copies on the same bank in order to support `narrowExtendRegIfNeeded`. The extended register must be a GPR32, so we need to support same-bank subregister copies. Fix a bug in getSubRegForClass which would cause registers on things like GPR32common to end up getting ssub. Just change the check to look for FPR32 rather than GPR32. For tests: - Add select-arith-extended-reg.mir - Update addsub_ext.ll to include GlobalISel checks Differential Revision: https://reviews.llvm.org/D66835
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td (diff)	llvm.src/lib/Target/AArch64/AArch64InstrFormats.td
	/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td (diff)	llvm.src/lib/Target/AArch64/AArch64InstrInfo.td
	/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (diff)	llvm.src/lib/Target/AArch64/AArch64InstructionSelector.cpp
	/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-arith-extended-reg.mir	llvm.src/test/CodeGen/AArch64/GlobalISel/select-arith-extended-reg.mir
	/llvm/trunk/test/CodeGen/AArch64/addsub_ext.ll (diff)	llvm.src/test/CodeGen/AArch64/addsub_ext.ll
Revision 370409 by rnk: [X86] Don't emit unreachable stack adjustments Summary: This is a minor improvement on our past attempts to do this. Fixes PR43155. Reviewers: hans Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66905
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/X86/X86FrameLowering.cpp (diff)	llvm.src/lib/Target/X86/X86FrameLowering.cpp
	/llvm/trunk/test/CodeGen/X86/noreturn-call-linux.ll	llvm.src/test/CodeGen/X86/noreturn-call-linux.ll
	/llvm/trunk/test/CodeGen/X86/noreturn-call.ll (diff)	llvm.src/test/CodeGen/X86/noreturn-call.ll
Revision 370408 by rnk: Allow '@' to appear in x86 mingw symbols Summary: There is no reason to differ in assembler behavior here between -msvc and -gnu targets. Without this setting, the text after the '@' is interpreted as a symbol variable, like foo@IMGREL. Reviewers: mstorsjo Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66974
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp (diff)	llvm.src/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
	/llvm/trunk/test/MC/X86/stdcall.s	llvm.src/test/MC/X86/stdcall.s
Revision 370407 by spatel: [InstCombine] add possible bswap as widening shuffle test; NFC Goes with the proposal in D66965.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/Transforms/InstCombine/bswap.ll (diff)	llvm.src/test/Transforms/InstCombine/bswap.ll
Revision 370406 by dergachev: [CFG] Fix CFG for statement-expressions in return values. We're building the CFG from bottom to top, so when the return-value expression has a non-trivial CFG on its own, we need to continue building from the entry to the return-value expression CFG rather than from the block to which we've just appended the return statement. Fixes a false positive warning "control may reach end of non-void function".
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Analysis/CFG.cpp (diff)	clang.src/lib/Analysis/CFG.cpp
	/cfe/trunk/test/Analysis/cfg.cpp (diff)	clang.src/test/Analysis/cfg.cpp
	/cfe/trunk/test/Sema/return.c (diff)	clang.src/test/Sema/return.c
Revision 370405 by rnk: Fix the build for MSVC builds using M_PI
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)	llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Revision 370404 by rksimon: [X86][SSE] combinePMULDQ - pmuldq(x, 0) -> zero vector (PR43159) ISD::isBuildVectorAllZeros permits undef elements to be present, which means we can't return it as a zero vector. PMULDQ/PMULUDQ is an extending multiply so a multiply by zero of the lower 32-bits should result in a zero 64-bit element.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)	llvm.src/lib/Target/X86/X86ISelLowering.cpp
	/llvm/trunk/test/CodeGen/X86/combine-pmuldq.ll (diff)	llvm.src/test/CodeGen/X86/combine-pmuldq.ll
Revision 370403 by yln: [ASan] Version mismatch check follow-up Follow-up for: [ASan] Make insertion of version mismatch guard configurable 3ae9b9d5e40d1d9bdea1fd8e6fca322df920754a This tiny change makes sure that this test passes on our internal bots as well.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/Instrumentation/AddressSanitizer/version-mismatch-check.ll (diff)	llvm.src/test/Instrumentation/AddressSanitizer/version-mismatch-check.ll
Revision 370402 by arsenm: AMDGPU/GlobalISel: Legalize sin/cos
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)	llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
	/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)	llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
	/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir	llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
	/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir	llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
Revision 370401 by aaronballman: Avoid crash when dumping NULL Type as JSON. Patch by Bert Belder.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/AST/JSONNodeDumper.cpp (diff)	clang.src/lib/AST/JSONNodeDumper.cpp
	/cfe/trunk/test/AST/ast-dump-types-json.cpp (diff)	clang.src/test/AST/ast-dump-types-json.cpp
	/cfe/trunk/test/AST/gen_ast_dump_json_test.py (diff)	clang.src/test/AST/gen_ast_dump_json_test.py
Revision 370400 by vsapsai: Remove `FileManager::invalidateCache` as it has no callers anymore. NFC.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/Basic/FileManager.h (diff)	clang.src/include/clang/Basic/FileManager.h
	/cfe/trunk/lib/Basic/FileManager.cpp (diff)	clang.src/lib/Basic/FileManager.cpp
Revision 370399 by spatel: [InstCombine] reduce duplicated code; NFC
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/InstCombine/InstCombineCasts.cpp (diff)	llvm.src/lib/Transforms/InstCombine/InstCombineCasts.cpp
Revision 370398 by rupprecht: Revert [MBP] Disable aggressive loop rotate in plain mode This reverts r369664 (git commit 51f48295cbe8fa3a44db263b528dd9f7bae7bf9a) It causes many benchmark regressions, internally and in llvm's benchmark suite.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/MachineBlockPlacement.cpp (diff)	llvm.src/lib/CodeGen/MachineBlockPlacement.cpp
	/llvm/trunk/test/CodeGen/AArch64/cmpxchg-idioms.ll (diff)	llvm.src/test/CodeGen/AArch64/cmpxchg-idioms.ll
	/llvm/trunk/test/CodeGen/AArch64/tailmerging_in_mbp.ll (diff)	llvm.src/test/CodeGen/AArch64/tailmerging_in_mbp.ll
	/llvm/trunk/test/CodeGen/AMDGPU/collapse-endcf.ll (diff)	llvm.src/test/CodeGen/AMDGPU/collapse-endcf.ll
	/llvm/trunk/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll (diff)	llvm.src/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
	/llvm/trunk/test/CodeGen/AMDGPU/global_smrd_cfg.ll (diff)	llvm.src/test/CodeGen/AMDGPU/global_smrd_cfg.ll
	/llvm/trunk/test/CodeGen/AMDGPU/i1-copy-from-loop.ll (diff)	llvm.src/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
	/llvm/trunk/test/CodeGen/AMDGPU/indirect-addressing-si.ll (diff)	llvm.src/test/CodeGen/AMDGPU/indirect-addressing-si.ll
	/llvm/trunk/test/CodeGen/AMDGPU/loop_exit_with_xor.ll (diff)	llvm.src/test/CodeGen/AMDGPU/loop_exit_with_xor.ll
	/llvm/trunk/test/CodeGen/AMDGPU/multilevel-break.ll (diff)	llvm.src/test/CodeGen/AMDGPU/multilevel-break.ll
	/llvm/trunk/test/CodeGen/AMDGPU/optimize-negated-cond.ll (diff)	llvm.src/test/CodeGen/AMDGPU/optimize-negated-cond.ll
	/llvm/trunk/test/CodeGen/AMDGPU/si-annotate-cf.ll (diff)	llvm.src/test/CodeGen/AMDGPU/si-annotate-cf.ll
	/llvm/trunk/test/CodeGen/AMDGPU/wave32.ll (diff)	llvm.src/test/CodeGen/AMDGPU/wave32.ll
	/llvm/trunk/test/CodeGen/AMDGPU/wqm.ll (diff)	llvm.src/test/CodeGen/AMDGPU/wqm.ll
	/llvm/trunk/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll (diff)	llvm.src/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll
	/llvm/trunk/test/CodeGen/ARM/arm-and-tst-peephole.ll (diff)	llvm.src/test/CodeGen/ARM/arm-and-tst-peephole.ll
	/llvm/trunk/test/CodeGen/ARM/atomic-cmp.ll (diff)	llvm.src/test/CodeGen/ARM/atomic-cmp.ll
	/llvm/trunk/test/CodeGen/ARM/atomic-cmpxchg.ll (diff)	llvm.src/test/CodeGen/ARM/atomic-cmpxchg.ll
	/llvm/trunk/test/CodeGen/ARM/code-placement.ll (diff)	llvm.src/test/CodeGen/ARM/code-placement.ll
	/llvm/trunk/test/CodeGen/ARM/pr32578.ll (diff)	llvm.src/test/CodeGen/ARM/pr32578.ll
	/llvm/trunk/test/CodeGen/Hexagon/bug6757-endloop.ll (diff)	llvm.src/test/CodeGen/Hexagon/bug6757-endloop.ll
	/llvm/trunk/test/CodeGen/Hexagon/early-if-merge-loop.ll (diff)	llvm.src/test/CodeGen/Hexagon/early-if-merge-loop.ll
	/llvm/trunk/test/CodeGen/Hexagon/prof-early-if.ll (diff)	llvm.src/test/CodeGen/Hexagon/prof-early-if.ll
	/llvm/trunk/test/CodeGen/Hexagon/redundant-branching2.ll (diff)	llvm.src/test/CodeGen/Hexagon/redundant-branching2.ll
	/llvm/trunk/test/CodeGen/PowerPC/atomics-regression.ll (diff)	llvm.src/test/CodeGen/PowerPC/atomics-regression.ll
	/llvm/trunk/test/CodeGen/PowerPC/block-placement-1.mir (diff)	llvm.src/test/CodeGen/PowerPC/block-placement-1.mir
	/llvm/trunk/test/CodeGen/PowerPC/cmp_elimination.ll (diff)	llvm.src/test/CodeGen/PowerPC/cmp_elimination.ll
	/llvm/trunk/test/CodeGen/PowerPC/licm-remat.ll (diff)	llvm.src/test/CodeGen/PowerPC/licm-remat.ll
	/llvm/trunk/test/CodeGen/PowerPC/machine-pre.ll (diff)	llvm.src/test/CodeGen/PowerPC/machine-pre.ll
	/llvm/trunk/test/CodeGen/RISCV/atomic-rmw.ll (diff)	llvm.src/test/CodeGen/RISCV/atomic-rmw.ll
	/llvm/trunk/test/CodeGen/RISCV/remat.ll (diff)	llvm.src/test/CodeGen/RISCV/remat.ll
	/llvm/trunk/test/CodeGen/Thumb/consthoist-physical-addr.ll (diff)	llvm.src/test/CodeGen/Thumb/consthoist-physical-addr.ll
	/llvm/trunk/test/CodeGen/Thumb/pr42760.ll (diff)	llvm.src/test/CodeGen/Thumb/pr42760.ll
	/llvm/trunk/test/CodeGen/X86/block-placement.ll (diff)	llvm.src/test/CodeGen/X86/block-placement.ll
	/llvm/trunk/test/CodeGen/X86/code_placement.ll (diff)	llvm.src/test/CodeGen/X86/code_placement.ll
	/llvm/trunk/test/CodeGen/X86/code_placement_ignore_succ_in_inner_loop.ll (diff)	llvm.src/test/CodeGen/X86/code_placement_ignore_succ_in_inner_loop.ll
	/llvm/trunk/test/CodeGen/X86/code_placement_no_header_change.ll (diff)	llvm.src/test/CodeGen/X86/code_placement_no_header_change.ll
	/llvm/trunk/test/CodeGen/X86/conditional-tailcall.ll (diff)	llvm.src/test/CodeGen/X86/conditional-tailcall.ll
	/llvm/trunk/test/CodeGen/X86/loop-blocks.ll (diff)	llvm.src/test/CodeGen/X86/loop-blocks.ll
	/llvm/trunk/test/CodeGen/X86/loop-rotate.ll	llvm.src/test/CodeGen/X86/loop-rotate.ll
	/llvm/trunk/test/CodeGen/X86/lsr-loop-exit-cond.ll (diff)	llvm.src/test/CodeGen/X86/lsr-loop-exit-cond.ll
	/llvm/trunk/test/CodeGen/X86/move_latch_to_loop_top.ll (diff)	llvm.src/test/CodeGen/X86/move_latch_to_loop_top.ll
	/llvm/trunk/test/CodeGen/X86/pr38185.ll (diff)	llvm.src/test/CodeGen/X86/pr38185.ll
	/llvm/trunk/test/CodeGen/X86/ragreedy-hoist-spill.ll (diff)	llvm.src/test/CodeGen/X86/ragreedy-hoist-spill.ll
	/llvm/trunk/test/CodeGen/X86/reverse_branches.ll (diff)	llvm.src/test/CodeGen/X86/reverse_branches.ll
	/llvm/trunk/test/CodeGen/X86/speculative-load-hardening.ll (diff)	llvm.src/test/CodeGen/X86/speculative-load-hardening.ll
	/llvm/trunk/test/CodeGen/X86/tail-dup-merge-loop-headers.ll (diff)	llvm.src/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
	/llvm/trunk/test/CodeGen/X86/tail-dup-repeat.ll (diff)	llvm.src/test/CodeGen/X86/tail-dup-repeat.ll
	/llvm/trunk/test/CodeGen/X86/vector-shift-by-select-loop.ll (diff)	llvm.src/test/CodeGen/X86/vector-shift-by-select-loop.ll
	/llvm/trunk/test/CodeGen/X86/widen_arith-1.ll (diff)	llvm.src/test/CodeGen/X86/widen_arith-1.ll
	/llvm/trunk/test/CodeGen/X86/widen_arith-2.ll (diff)	llvm.src/test/CodeGen/X86/widen_arith-2.ll
	/llvm/trunk/test/CodeGen/X86/widen_arith-3.ll (diff)	llvm.src/test/CodeGen/X86/widen_arith-3.ll
	/llvm/trunk/test/CodeGen/X86/widen_arith-4.ll (diff)	llvm.src/test/CodeGen/X86/widen_arith-4.ll
	/llvm/trunk/test/CodeGen/X86/widen_arith-5.ll (diff)	llvm.src/test/CodeGen/X86/widen_arith-5.ll
	/llvm/trunk/test/CodeGen/X86/widen_arith-6.ll (diff)	llvm.src/test/CodeGen/X86/widen_arith-6.ll
	/llvm/trunk/test/CodeGen/X86/widen_cast-4.ll (diff)	llvm.src/test/CodeGen/X86/widen_cast-4.ll
	/llvm/trunk/test/DebugInfo/X86/PR37234.ll (diff)	llvm.src/test/DebugInfo/X86/PR37234.ll
	/llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll (diff)	llvm.src/test/DebugInfo/X86/dbg-value-transfer-order.ll
Revision 370397 by asbirlea: Revert enabling MemorySSA. Breaks sanitizers bots. Differential Revision: https://reviews.llvm.org/D58311
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Analysis/MemorySSA.cpp (diff)	llvm.src/lib/Analysis/MemorySSA.cpp
	/llvm/trunk/lib/Transforms/Utils/LoopUtils.cpp (diff)	llvm.src/lib/Transforms/Utils/LoopUtils.cpp
	/llvm/trunk/test/CodeGen/PowerPC/sms-grp-order.ll (diff)	llvm.src/test/CodeGen/PowerPC/sms-grp-order.ll
	/llvm/trunk/test/Other/opt-O2-pipeline.ll (diff)	llvm.src/test/Other/opt-O2-pipeline.ll
	/llvm/trunk/test/Other/opt-O3-pipeline.ll (diff)	llvm.src/test/Other/opt-O3-pipeline.ll
	/llvm/trunk/test/Other/opt-Os-pipeline.ll (diff)	llvm.src/test/Other/opt-Os-pipeline.ll
Revision 370393 by ctopper: [X86] Remove what little support we had for MPX -Deprecate -mmpx and -mno-mpx command line options -Remove CPUID detection of mpx for -march=native -Remove MPX from all CPUs -Remove MPX preprocessor define I've left the "mpx" string in the backend so we don't fail on old IR, but its not connected to anything. gcc has also deprecated these command line options. https://www.phoronix.com/scan.php?page=news_item&px=GCC-Patch-To-Drop-MPX Differential Revision: https://reviews.llvm.org/D66669
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/docs/ReleaseNotes.rst (diff)	clang.src/docs/ReleaseNotes.rst
	/cfe/trunk/include/clang/Driver/Options.td (diff)	clang.src/include/clang/Driver/Options.td
	/cfe/trunk/lib/Basic/Targets/X86.cpp (diff)	clang.src/lib/Basic/Targets/X86.cpp
	/cfe/trunk/lib/Basic/Targets/X86.h (diff)	clang.src/lib/Basic/Targets/X86.h
	/cfe/trunk/test/Driver/x86-target-features.c (diff)	clang.src/test/Driver/x86-target-features.c
	/cfe/trunk/test/Preprocessor/predefined-arch-macros.c (diff)	clang.src/test/Preprocessor/predefined-arch-macros.c
	/llvm/trunk/docs/ReleaseNotes.rst (diff)	llvm.src/docs/ReleaseNotes.rst
	/llvm/trunk/lib/Support/Host.cpp (diff)	llvm.src/lib/Support/Host.cpp
	/llvm/trunk/lib/Target/X86/X86.td (diff)	llvm.src/lib/Target/X86/X86.td
	/llvm/trunk/lib/Target/X86/X86InstrInfo.td (diff)	llvm.src/lib/Target/X86/X86InstrInfo.td
	/llvm/trunk/lib/Target/X86/X86InstrMPX.td (diff)	llvm.src/lib/Target/X86/X86InstrMPX.td
	/llvm/trunk/lib/Target/X86/X86Subtarget.h (diff)	llvm.src/lib/Target/X86/X86Subtarget.h
	/llvm/trunk/test/CodeGen/X86/ms-inline-asm-avx512.ll (diff)	llvm.src/test/CodeGen/X86/ms-inline-asm-avx512.ll
	/llvm/trunk/test/CodeGen/X86/vector-width-store-merge.ll (diff)	llvm.src/test/CodeGen/X86/vector-width-store-merge.ll
Revision 370392 by arsenm: GlobalISel: Don't compute known bits for non-integral GEP
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/GlobalISel/GISelKnownBits.cpp (diff)	llvm.src/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Revision 370391 by fhahn: [LoopUnrollAndJam] Use Lazy strategy for DTU. We can also apply the earlier updates to the lazy DTU, instead of applying them directly. Reviewers: kuhar, brzycki, asbirlea, SjoerdMeijer Reviewed By: brzycki, asbirlea, SjoerdMeijer Differential Revision: https://reviews.llvm.org/D66918
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/Utils/LoopUnrollAndJam.cpp (diff)	llvm.src/lib/Transforms/Utils/LoopUnrollAndJam.cpp
Revision 370390 by mcgov: [cmake] enable x86 libfuzzer on Windows - recent commit https://reviews.llvm.org/D66433 enabled libfuzzer to build on windows, this just enables the option to build as part of the the regular build.
Change Type	Path in Repository	Path in Workspace
	/compiler-rt/trunk/cmake/config-ix.cmake (diff)	compiler-rt.src/cmake/config-ix.cmake
Revision 370389 by arsenm: GlobalISel: Add maskedValueIsZero and signBitIsZero to known bits I dropped the DemandedElts since it seems to be missing from some of the new interfaces, but not others.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/CodeGen/GlobalISel/GISelKnownBits.h (diff)	llvm.src/include/llvm/CodeGen/GlobalISel/GISelKnownBits.h
	/llvm/trunk/lib/CodeGen/GlobalISel/GISelKnownBits.cpp (diff)	llvm.src/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
	/llvm/trunk/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp (diff)	llvm.src/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
Revision 370388 by arsenm: GlobalISel: Add known bits to InstructionSelector AMDGPU uses this for some addressing mode selection patterns. The analysis run itself doesn't do anything so it seems easier to just always require this than adding a way to opt in.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/CodeGen/GlobalISel/InstructionSelector.h (diff)	llvm.src/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
	/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (diff)	llvm.src/lib/CodeGen/GlobalISel/InstructionSelect.cpp
	/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (diff)	llvm.src/lib/Target/AArch64/AArch64InstructionSelector.cpp
	/llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll (diff)	llvm.src/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
	/llvm/trunk/test/CodeGen/AArch64/O0-pipeline.ll (diff)	llvm.src/test/CodeGen/AArch64/O0-pipeline.ll
Revision 370384 by asbirlea: [MemorySSA & LoopPassManager] Enable MemorySSA as loop dependency. Update tests. Summary: I'm not planning to check this in at the moment, but feedback is very welcome, in particular how this affects performance. The feedback obtains here will guide the next steps towards enabling this. This patch enables the use of MemorySSA in the loop pass manager. Passes that currently use MemorySSA: - EarlyCSE Passes that use MemorySSA after this patch: - EarlyCSE - LICM - SimpleLoopUnswitch Loop passes that update MemorySSA (and do not use it yet, but could use it after this patch): - LoopInstSimplify - LoopSimplifyCFG - LoopUnswitch - LoopRotate - LoopSimplify - LCSSA Loop passes that do not update MemorySSA: - IndVarSimplify - LoopDelete - LoopIdiom - LoopSink - LoopUnroll - LoopInterchange - LoopUnrollAndJam - LoopVectorize - LoopReroll - IRCE Reviewers: chandlerc, george.burgess.iv, davide, sanjoy, gberry Subscribers: jlebar, Prazek, dmgreen, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58311
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Analysis/MemorySSA.cpp (diff)	llvm.src/lib/Analysis/MemorySSA.cpp
	/llvm/trunk/lib/Transforms/Utils/LoopUtils.cpp (diff)	llvm.src/lib/Transforms/Utils/LoopUtils.cpp
	/llvm/trunk/test/CodeGen/PowerPC/sms-grp-order.ll (diff)	llvm.src/test/CodeGen/PowerPC/sms-grp-order.ll
	/llvm/trunk/test/Other/opt-O2-pipeline.ll (diff)	llvm.src/test/Other/opt-O2-pipeline.ll
	/llvm/trunk/test/Other/opt-O3-pipeline.ll (diff)	llvm.src/test/Other/opt-O3-pipeline.ll
	/llvm/trunk/test/Other/opt-Os-pipeline.ll (diff)	llvm.src/test/Other/opt-Os-pipeline.ll
Revision 370383 by gribozavr: Added 'inline' to functions defined in headers to avoid ODR violations
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/unittests/CodeGen/IRMatchers.h (diff)	clang.src/unittests/CodeGen/IRMatchers.h
Revision 370382 by paquette: [GlobalISel][AArch64] Select llvm.aarch64.stxr* intrinsics. Add a GISelPredicateCode to the stxr_* PatFrags in AArch64InstrAtomics.td. This allows us to select these intrinsics. Differential Revision: https://reviews.llvm.org/D65779
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/AArch64/AArch64InstrAtomics.td (diff)	llvm.src/lib/Target/AArch64/AArch64InstrAtomics.td
	/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-stx.mir	llvm.src/test/CodeGen/AArch64/GlobalISel/select-stx.mir
	/llvm/trunk/test/CodeGen/AArch64/arm64-ldxr-stxr.ll (diff)	llvm.src/test/CodeGen/AArch64/arm64-ldxr-stxr.ll
Revision 370381 by spatel: [InstCombine] add tests for bswap disguised as shuffle; NFC Somewhat motivating case In PR43146: https://bugs.llvm.org/show_bug.cgi?id=43146 But that's a lot more complicated.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/Transforms/InstCombine/bswap.ll (diff)	llvm.src/test/Transforms/InstCombine/bswap.ll
Revision 370380 by paquette: [GlobalISel][AArch64] Use a GISelPredicateCode to select llvm.aarch64.stlxr.* Remove manual selection code for this intrinsic and use a GISelPredicateCode instead. This allows us to fully select this intrinsic without any tricky custom C++ matching. Differential Revision: https://reviews.llvm.org/D65780
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/AArch64/AArch64InstrAtomics.td (diff)	llvm.src/lib/Target/AArch64/AArch64InstrAtomics.td
	/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (diff)	llvm.src/lib/Target/AArch64/AArch64InstructionSelector.cpp
	/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-stlxr-intrin.mir (diff)	llvm.src/test/CodeGen/AArch64/GlobalISel/select-stlxr-intrin.mir
	/llvm/trunk/test/CodeGen/AArch64/arm64-ldxr-stxr.ll (diff)	llvm.src/test/CodeGen/AArch64/arm64-ldxr-stxr.ll
Revision 370379 by gribozavr: Changed FrontendActionFactory::create to return a std::unique_ptr Subscribers: jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66947
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/Tooling/Tooling.h (diff)	clang.src/include/clang/Tooling/Tooling.h
	/cfe/trunk/lib/Tooling/Tooling.cpp (diff)	clang.src/lib/Tooling/Tooling.cpp
	/cfe/trunk/tools/clang-refactor/ClangRefactor.cpp (diff)	clang.src/tools/clang-refactor/ClangRefactor.cpp
	/cfe/trunk/unittests/Tooling/ExecutionTest.cpp (diff)	clang.src/unittests/Tooling/ExecutionTest.cpp
	/clang-tools-extra/trunk/clang-doc/ClangDoc.cpp (diff)	clang-tools-extra.src/clang-doc/ClangDoc.cpp
	/clang-tools-extra/trunk/clang-include-fixer/find-all-symbols/FindAllSymbolsAction.h (diff)	clang-tools-extra.src/clang-include-fixer/find-all-symbols/FindAllSymbolsAction.h
	/clang-tools-extra/trunk/clang-move/Move.h (diff)	clang-tools-extra.src/clang-move/Move.h
	/clang-tools-extra/trunk/clang-tidy/ClangTidy.cpp (diff)	clang-tools-extra.src/clang-tidy/ClangTidy.cpp
	/clang-tools-extra/trunk/clangd/indexer/IndexerMain.cpp (diff)	clang-tools-extra.src/clangd/indexer/IndexerMain.cpp
	/clang-tools-extra/trunk/clangd/unittests/SymbolCollectorTests.cpp (diff)	clang-tools-extra.src/clangd/unittests/SymbolCollectorTests.cpp
	/clang-tools-extra/trunk/modularize/CoverageChecker.cpp (diff)	clang-tools-extra.src/modularize/CoverageChecker.cpp
	/clang-tools-extra/trunk/modularize/Modularize.cpp (diff)	clang-tools-extra.src/modularize/Modularize.cpp
	/clang-tools-extra/trunk/pp-trace/PPTrace.cpp (diff)	clang-tools-extra.src/pp-trace/PPTrace.cpp
Revision 370378 by paquette: [AArch64][GlobalISel] Select @llvm.aarch64.ldxr.* intrinsics Same thing as D66897, but for ldxr.* instead. Add a GISelPredicateCode to the ldxr_* definitions, which allows us to import them. Add select-ldxr-intrin.mir, and update arm64-ldxr-stxr.ll. Differential Revision: https://reviews.llvm.org/D66898
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/AArch64/AArch64InstrAtomics.td (diff)	llvm.src/lib/Target/AArch64/AArch64InstrAtomics.td
	/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-ldxr-intrin.mir	llvm.src/test/CodeGen/AArch64/GlobalISel/select-ldxr-intrin.mir
	/llvm/trunk/test/CodeGen/AArch64/arm64-ldxr-stxr.ll (diff)	llvm.src/test/CodeGen/AArch64/arm64-ldxr-stxr.ll
Revision 370377 by paquette: [AArch64][GlobalISel] Select @llvm.aarch64.ldaxr.* intrinsics Add a GISelPredicateCode to ldaxr_. This allows us to import the patterns for @llvm.aarch64.ldaxr., and thus select them. Add `isLoadStoreOfNumBytes` for the GISelPredicateCode, since each of these intrinsics involves the same check. Add select-ldaxr-intrin.mir, and update arm64-ldxr-stxr.ll. Differential Revision: https://reviews.llvm.org/D66897
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/AArch64/AArch64InstrAtomics.td (diff)	llvm.src/lib/Target/AArch64/AArch64InstrAtomics.td
	/llvm/trunk/lib/Target/AArch64/AArch64InstructionSelector.cpp (diff)	llvm.src/lib/Target/AArch64/AArch64InstructionSelector.cpp
	/llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-ldaxr-intrin.mir	llvm.src/test/CodeGen/AArch64/GlobalISel/select-ldaxr-intrin.mir
	/llvm/trunk/test/CodeGen/AArch64/arm64-ldxr-stxr.ll (diff)	llvm.src/test/CodeGen/AArch64/arm64-ldxr-stxr.ll
Revision 370376 by hliao: [SimplifyCFG] Skip sinking common lifetime markers of `alloca`. Summary: - Similar to the workaround in fix of PR30188, skip sinking common lifetime markers of `alloca`. They are mostly left there after inlining functions in branches. Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66950
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (diff)	llvm.src/lib/Transforms/Utils/SimplifyCFG.cpp
	/llvm/trunk/test/Transforms/SimplifyCFG/sink-common-code.ll (diff)	llvm.src/test/Transforms/SimplifyCFG/sink-common-code.ll
Revision 370375 by jsji: [PowerPC][NFC] Update fp-int-conversions-direct-moves.ll using script Also add -ppc-asm-full-reg-names,-ppc-vsr-nums-as-vr.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll (diff)	llvm.src/test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll
Revision 370372 by sureyeaah: [Clangd] NFC: Added fixme for checking for local/anonymous types for extracted parameters
Change Type	Path in Repository	Path in Workspace
	/clang-tools-extra/trunk/clangd/refactor/tweaks/ExtractFunction.cpp (diff)	clang-tools-extra.src/clangd/refactor/tweaks/ExtractFunction.cpp
Revision 370371 by hokein: [clangd] Update out-of-date links in readme, NFC.
Change Type	Path in Repository	Path in Workspace
	/clang-tools-extra/trunk/clangd/clients/clangd-vscode/README.md (diff)	clang-tools-extra.src/clangd/clients/clangd-vscode/README.md
Revision 370369 by lebedevri: [NFC][SimplifyCFG] 'Safely extract low bits' pattern will also benefit from -phi-node-folding-threshold=3 This is the naive implementation of x86 BZHI/BEXTR instruction: it takes input and bit count, and extracts low nbits up to bit width. I.e. unlike shift it does not have any UB when nbits >= bitwidth. Which means we don't need a while PHI here, simple select will do. And if it's a select, it should then be trivial to fix codegen to select it to BEXTR/BZHI. See https://bugs.llvm.org/show_bug.cgi?id=34704
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/Transforms/SimplifyCFG/safe-low-bit-extract.ll	llvm.src/test/Transforms/SimplifyCFG/safe-low-bit-extract.ll
Revision 370367 by kadircet: [clangd][NFC] Update background-index command line description Summary: We didn't change this in D64019 just in case we revert it back. Deleting it now. Reviewers: hokein, sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66943
Change Type	Path in Repository	Path in Workspace
	/clang-tools-extra/trunk/clangd/tool/ClangdMain.cpp (diff)	clang-tools-extra.src/clangd/tool/ClangdMain.cpp
Revision 370365 by rksimon: [DAGCombine] Fix shadow variable warnings. NFCI.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)	llvm.src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Revision 370363 by labath: DWARFDebugLoc: Make parsing and error reporting more robust Summary: While examining this class for possible use in lldb, I noticed two things: - it spits out parsing errors directly to stderr - the loclists parser can incorrectly return valid location lists when parsing malformed (truncated) data I improve the stderr situation by making the parseOneLocationList functions return Expected<T>s. The errors are still dumped to stderr by their callers, so this is only a partial fix, but it is enough for my use case, as I intend to parse the locations lists one by one. I fix the behavior in the truncated scenario by using the newly introduced DataExtractor Cursor API. I also add tests for handling the error cases, as they currently have no coverage. Reviewers: dblaikie, JDevlieghere, probinson Subscribers: lldb-commits, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63591
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/DebugInfo/DWARF/DWARFDebugLoc.h (diff)	llvm.src/include/llvm/DebugInfo/DWARF/DWARFDebugLoc.h
	/llvm/trunk/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp (diff)	llvm.src/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp
	/llvm/trunk/lib/DebugInfo/DWARF/DWARFVerifier.cpp (diff)	llvm.src/lib/DebugInfo/DWARF/DWARFVerifier.cpp
	/llvm/trunk/test/DebugInfo/X86/dwarfdump-debug-loc-error-cases.s	llvm.src/test/DebugInfo/X86/dwarfdump-debug-loc-error-cases.s
	/llvm/trunk/test/DebugInfo/X86/dwarfdump-debug-loclists-error-cases.s	llvm.src/test/DebugInfo/X86/dwarfdump-debug-loclists-error-cases.s
Revision 370361 by gribozavr: Removed a function declaration that doesn't have a definition
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/AST/ExprCXX.h (diff)	clang.src/include/clang/AST/ExprCXX.h
Revision 370359 by luismarques: [RISCV] Fix callee-saved-gprs.ll test ABIs
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/CodeGen/RISCV/callee-saved-gprs.ll (diff)	llvm.src/test/CodeGen/RISCV/callee-saved-gprs.ll
Revision 370355 by joerg: Allow replaceAndRecursivelySimplify to list unsimplified visitees. This is part of D65280 and split it to avoid ABI changes on the 9.0 release branch.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/Analysis/InstructionSimplify.h (diff)	llvm.src/include/llvm/Analysis/InstructionSimplify.h
	/llvm/trunk/lib/Analysis/InstructionSimplify.cpp (diff)	llvm.src/lib/Analysis/InstructionSimplify.cpp
Revision 370354 by atanasyan: [mips] Inline emitStoreWithSymOffset and emitLoadWithSymOffset methods. NFC Both methods `MipsTargetStreamer::emitStoreWithSymOffset` and `MipsTargetStreamer::emitLoadWithSymOffset` are almost the same and differ argument names only. These methods are used in the single place so it's better to inline their code and remove original methods.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (diff)	llvm.src/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
	/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp (diff)	llvm.src/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
	/llvm/trunk/lib/Target/Mips/MipsTargetStreamer.h (diff)	llvm.src/lib/Target/Mips/MipsTargetStreamer.h
Revision 370353 by atanasyan: [mips] Fix expanding `lw/sw $reg1, symbol($reg2)` instruction When a "base" in the `lw/sw $reg1, symbol($reg2)` instruction is a register and generated code is position independent, backend does not add the "base" value to the symbol address. ``` lw $reg1, %got(symbol)($gp) lw/sw $reg1, 0($reg1) ``` This patch fixes the bug and adds the missed `addu` instruction by passing `BaseReg` into the `loadAndAddSymbolAddress` routine and handles the case when the `BaseReg` is the zero register to escape redundant `move reg, reg` instruction: ``` lw $reg1, %got(symbol)($gp) addu $reg1, $reg1, $reg2 lw/sw $reg1, 0($reg1) ``` Differential Revision: https://reviews.llvm.org/D66894
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (diff)	llvm.src/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
	/llvm/trunk/test/MC/Mips/mips-expansions.s (diff)	llvm.src/test/MC/Mips/mips-expansions.s
	/llvm/trunk/test/MC/Mips/mips64-expansions.s (diff)	llvm.src/test/MC/Mips/mips64-expansions.s
Revision 370351 by lebedevri: [InstSimplify] Drop leftover "division-by-zero guard" around `@llvm.umul.with.overflow` inverted overflow bit Summary: Now that with D65143/D65144 we've produce `@llvm.umul.with.overflow`, and with D65147 we've flattened the CFG, we now can see that the guard may have been there to prevent division by zero is redundant. We can simply drop it: ``` ---------------------------------------- Name: no overflow or zero %iszero = icmp eq i4 %y, 0 %umul = smul_overflow i4 %x, %y %umul.ov = extractvalue {i4, i1} %umul, 1 %umul.ov.not = xor %umul.ov, -1 %retval.0 = or i1 %iszero, %umul.ov.not ret i1 %retval.0 => %iszero = icmp eq i4 %y, 0 %umul = smul_overflow i4 %x, %y %umul.ov = extractvalue {i4, i1} %umul, 1 %umul.ov.not = xor %umul.ov, -1 %retval.0 = or i1 %iszero, %umul.ov.not ret i1 %umul.ov.not Done: 1 Optimization is correct! ``` Note that this is inverted from what we have in a previous patch, here we are looking for the inverted overflow bit. And that inversion is kinda problematic - given this particular pattern we neither hoist that `not` closer to `ret` (then the pattern would have been identical to the one without inversion, and would have been handled by the previous patch), neither do the opposite transform. But regardless, we should handle this too. I've filled [[ https://bugs.llvm.org/show_bug.cgi?id=42720 \| PR42720 ]]. Reviewers: nikic, spatel, xbolva00, RKSimon Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65151
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Analysis/InstructionSimplify.cpp (diff)	llvm.src/lib/Analysis/InstructionSimplify.cpp
	/llvm/trunk/test/Transforms/InstSimplify/div-by-0-guard-before-smul_ov-not.ll (diff)	llvm.src/test/Transforms/InstSimplify/div-by-0-guard-before-smul_ov-not.ll
	/llvm/trunk/test/Transforms/InstSimplify/div-by-0-guard-before-umul_ov-not.ll (diff)	llvm.src/test/Transforms/InstSimplify/div-by-0-guard-before-umul_ov-not.ll
	/llvm/trunk/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll (diff)	llvm.src/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll
Revision 370350 by lebedevri: [InstSimplify] Drop leftover "division-by-zero guard" around `@llvm.umul.with.overflow` overflow bit Summary: Now that with D65143/D65144 we've produce `@llvm.umul.with.overflow`, and with D65147 we've flattened the CFG, we now can see that the guard may have been there to prevent division by zero is redundant. We can simply drop it: ``` ---------------------------------------- Name: no overflow and not zero %iszero = icmp ne i4 %y, 0 %umul = umul_overflow i4 %x, %y %umul.ov = extractvalue {i4, i1} %umul, 1 %retval.0 = and i1 %iszero, %umul.ov ret i1 %retval.0 => %iszero = icmp ne i4 %y, 0 %umul = umul_overflow i4 %x, %y %umul.ov = extractvalue {i4, i1} %umul, 1 %retval.0 = and i1 %iszero, %umul.ov ret %umul.ov Done: 1 Optimization is correct! ``` Reviewers: nikic, spatel, xbolva00 Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65150
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Analysis/InstructionSimplify.cpp (diff)	llvm.src/lib/Analysis/InstructionSimplify.cpp
	/llvm/trunk/test/Transforms/InstSimplify/div-by-0-guard-before-smul_ov.ll (diff)	llvm.src/test/Transforms/InstSimplify/div-by-0-guard-before-smul_ov.ll
	/llvm/trunk/test/Transforms/InstSimplify/div-by-0-guard-before-umul_ov.ll (diff)	llvm.src/test/Transforms/InstSimplify/div-by-0-guard-before-umul_ov.ll
	/llvm/trunk/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll (diff)	llvm.src/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll
Revision 370349 by lebedevri: [SimplifyCFG] FoldTwoEntryPHINode(): don't bailout on i1 PHI's if we can hoist a 'not' from incoming values Summary: As it can be seen in the tests in D65143/D65144, even though we have formed an '@llvm.umul.with.overflow' and got rid of potential for division-by-zero, the control flow remains, we still have that branch. We have this condition: ``` // Don't fold i1 branches on PHIs which contain binary operators // These can often be turned into switches and other things. if (PN->getType()->isIntegerTy(1) && (isa<BinaryOperator>(PN->getIncomingValue(0)) \|\| isa<BinaryOperator>(PN->getIncomingValue(1)) \|\| isa<BinaryOperator>(IfCond))) return false; ``` which was added back in rL121764 to help with `select` formation i think? That check prevents us to flatten the CFG here, even though we know we no longer need that guard and will be able to drop everything but the '@llvm.umul.with.overflow' + `not`. As it can be seen from tests, we end here because the `not` is being sinked into the PHI's incoming values by InstCombine, so we can't workaround this by hoisting it to after PHI. Thus i suggest that we relax that check to not bailout if we'd get to hoist the `not`. Reviewers: craig.topper, spatel, fhahn, nikic Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65147
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/Utils/SimplifyCFG.cpp (diff)	llvm.src/lib/Transforms/Utils/SimplifyCFG.cpp
	/llvm/trunk/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll (diff)	llvm.src/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll
	/llvm/trunk/test/Transforms/SimplifyCFG/unsigned-multiplication-will-overflow.ll (diff)	llvm.src/test/Transforms/SimplifyCFG/unsigned-multiplication-will-overflow.ll
Revision 370348 by lebedevri: [InstCombine] Fold '((%x * %y) u/ %x) != %y' to '@llvm.umul.with.overflow' + overflow bit extraction Summary: `((%x * %y) u/ %x) != %y` is one of (3?) common ways to check that some unsigned multiplication (will not) overflow. Currently, we don't catch it. We could: ``` $ /repositories/alive2/build-Clang-unknown/alive -root-only ~/llvm-patch1.ll Processing /home/lebedevri/llvm-patch1.ll.. ---------------------------------------- Name: no overflow %o0 = mul i4 %y, %x %o1 = udiv i4 %o0, %x %r = icmp ne i4 %o1, %y ret i1 %r => %n0 = umul_overflow i4 %x, %y %o0 = extractvalue {i4, i1} %n0, 0 %o1 = udiv %o0, %x %r = extractvalue {i4, i1} %n0, 1 ret %r Done: 1 Optimization is correct! ---------------------------------------- Name: no overflow %o0 = mul i4 %y, %x %o1 = udiv i4 %o0, %x %r = icmp eq i4 %o1, %y ret i1 %r => %n0 = umul_overflow i4 %x, %y %o0 = extractvalue {i4, i1} %n0, 0 %o1 = udiv %o0, %x %n1 = extractvalue {i4, i1} %n0, 1 %r = xor %n1, -1 ret i1 %r Done: 1 Optimization is correct! ``` Reviewers: nikic, spatel, efriedma, xbolva00, RKSimon Reviewed By: nikic Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65144
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)	llvm.src/lib/Transforms/InstCombine/InstCombineCompares.cpp
	/llvm/trunk/lib/Transforms/InstCombine/InstCombineInternal.h (diff)	llvm.src/lib/Transforms/InstCombine/InstCombineInternal.h
	/llvm/trunk/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-mul-udiv.ll (diff)	llvm.src/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-mul-udiv.ll
	/llvm/trunk/test/Transforms/InstCombine/unsigned-mul-overflow-check-via-mul-udiv.ll (diff)	llvm.src/test/Transforms/InstCombine/unsigned-mul-overflow-check-via-mul-udiv.ll
Revision 370347 by lebedevri: [InstCombine] Fold '(-1 u/ %x) u< %y' to '@llvm.umul.with.overflow' + overflow bit extraction Summary: `(-1 u/ %x) u< %y` is one of (3?) common ways to check that some unsigned multiplication (will not) overflow. Currently, we don't catch it. We could: ``` ---------------------------------------- Name: no overflow %o0 = udiv i4 -1, %x %r = icmp ult i4 %o0, %y => %o0 = udiv i4 -1, %x %n0 = umul_overflow i4 %x, %y %r = extractvalue {i4, i1} %n0, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: no overflow, swapped %o0 = udiv i4 -1, %x %r = icmp ugt i4 %y, %o0 => %o0 = udiv i4 -1, %x %n0 = umul_overflow i4 %x, %y %r = extractvalue {i4, i1} %n0, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: overflow %o0 = udiv i4 -1, %x %r = icmp uge i4 %o0, %y => %o0 = udiv i4 -1, %x %n0 = umul_overflow i4 %x, %y %n1 = extractvalue {i4, i1} %n0, 1 %r = xor %n1, -1 Done: 1 Optimization is correct! ---------------------------------------- Name: overflow %o0 = udiv i4 -1, %x %r = icmp ule i4 %y, %o0 => %o0 = udiv i4 -1, %x %n0 = umul_overflow i4 %x, %y %n1 = extractvalue {i4, i1} %n0, 1 %r = xor %n1, -1 Done: 1 Optimization is correct! ``` As it can be observed from tests, while simply forming the `@llvm.umul.with.overflow` is easy, if we were looking for the inverted answer, then more work needs to be done to cleanup the now-pointless control-flow that was guarding against division-by-zero. This is being addressed in follow-up patches. Reviewers: nikic, spatel, efriedma, xbolva00, RKSimon Reviewed By: nikic, xbolva00 Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D65143
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)	llvm.src/lib/Transforms/InstCombine/InstCombineCompares.cpp
	/llvm/trunk/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll (diff)	llvm.src/test/Transforms/InstCombine/unsigned-mul-lack-of-overflow-check-via-udiv-of-allones.ll
	/llvm/trunk/test/Transforms/InstCombine/unsigned-mul-overflow-check-via-udiv-of-allones.ll (diff)	llvm.src/test/Transforms/InstCombine/unsigned-mul-overflow-check-via-udiv-of-allones.ll
	/llvm/trunk/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll (diff)	llvm.src/test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll
Revision 370345 by rksimon: Fix variable ‘IsInitCapturePack’ set but not used warning. NFCI.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Sema/SemaLambda.cpp (diff)	clang.src/lib/Sema/SemaLambda.cpp
Revision 370343 by rksimon: Fix MSVC "not all control paths return a value" warning. NFCI.
Change Type	Path in Repository	Path in Workspace
	/clang-tools-extra/trunk/clangd/refactor/tweaks/ExtractFunction.cpp (diff)	clang-tools-extra.src/clangd/refactor/tweaks/ExtractFunction.cpp
Revision 370341 by gribozavr: Removed `AnyFunctionDecl`, it is unused.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/AST/DeclCXX.h (diff)	clang.src/include/clang/AST/DeclCXX.h
	/cfe/trunk/include/clang/AST/DeclTemplate.h (diff)	clang.src/include/clang/AST/DeclTemplate.h
Revision 370340 by gribozavr: Removed two function declarations that don't have definitions
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/AST/DeclCXX.h (diff)	clang.src/include/clang/AST/DeclCXX.h
Revision 370339 by lebedevri: [CostModel] Model all `extractvalue`s as free. Summary: As disscussed in https://reviews.llvm.org/D65148#1606412, `extractvalue` don't actually generate any code, so we should treat them as free. Reviewers: craig.topper, RKSimon, jnspaulsson, greened, asb, t.p.northover, jmolloy, dmgreen Reviewed By: jmolloy Subscribers: javed.absar, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66098
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)	llvm.src/include/llvm/Analysis/TargetTransformInfoImpl.h
	/llvm/trunk/lib/Analysis/TargetTransformInfo.cpp (diff)	llvm.src/lib/Analysis/TargetTransformInfo.cpp
	/llvm/trunk/test/Analysis/CostModel/AArch64/aggregates.ll (diff)	llvm.src/test/Analysis/CostModel/AArch64/aggregates.ll
	/llvm/trunk/test/Analysis/CostModel/X86/aggregates.ll (diff)	llvm.src/test/Analysis/CostModel/X86/aggregates.ll
Revision 370338 by gribozavr: [Index] Added a ShouldSkipFunctionBody callback to libIndex, and refactored clients to use it instead of inventing their own solution Subscribers: jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66879
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/Index/IndexingAction.h (diff)	clang.src/include/clang/Index/IndexingAction.h
	/cfe/trunk/lib/Index/IndexingAction.cpp (diff)	clang.src/lib/Index/IndexingAction.cpp
	/cfe/trunk/tools/libclang/Indexing.cpp (diff)	clang.src/tools/libclang/Indexing.cpp
	/clang-tools-extra/trunk/clangd/index/IndexAction.cpp (diff)	clang-tools-extra.src/clangd/index/IndexAction.cpp
Revision 370337 by gribozavr: [Index] Stopped wrapping FrontendActions in libIndex and its users Exposed a new function, createIndexingASTConsumer, that creates an ASTConsumer. ASTConsumers compose well. Removed wrapping functionality from createIndexingAction.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/Index/IndexingAction.h (diff)	clang.src/include/clang/Index/IndexingAction.h
	/cfe/trunk/lib/Index/IndexingAction.cpp (diff)	clang.src/lib/Index/IndexingAction.cpp
	/cfe/trunk/tools/c-index-test/core_main.cpp (diff)	clang.src/tools/c-index-test/core_main.cpp
	/cfe/trunk/tools/libclang/Indexing.cpp (diff)	clang.src/tools/libclang/Indexing.cpp
	/clang-tools-extra/trunk/clangd/index/IndexAction.cpp (diff)	clang-tools-extra.src/clangd/index/IndexAction.cpp
	/clang-tools-extra/trunk/clangd/unittests/SymbolCollectorTests.cpp (diff)	clang-tools-extra.src/clangd/unittests/SymbolCollectorTests.cpp
Revision 370336 by gribozavr: [Index] Moved the IndexDataConsumer::finish call into the IndexASTConsumer from IndexAction Doing so removes the last reason to expose a FrontendAction from libIndex.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Index/IndexingAction.cpp (diff)	clang.src/lib/Index/IndexingAction.cpp
Revision 370335 by glider: [CodeGen]: don't treat structures returned in registers as memory inputs Summary: The "=r" output constraint for a structure variable passed to inline asm shouldn't be converted to "=*r", as this changes the asm directive semantics and prevents DSE optimizations. Instead, preserve the constraints and return such structures as integers of corresponding size, which are converted back to structures when storing the result. Fixes PR42672. Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D65234
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/CodeGen/CGStmt.cpp (diff)	clang.src/lib/CodeGen/CGStmt.cpp
	/cfe/trunk/test/CodeGen/asm-attrs.c (diff)	clang.src/test/CodeGen/asm-attrs.c
	/cfe/trunk/test/CodeGen/x86_64-PR42672.c	clang.src/test/CodeGen/x86_64-PR42672.c
Revision 370334 by jmorse: [DebugInfo] LiveDebugValues: correctly discriminate kinds of variable locations The missing line added by this patch ensures that only spilt variable locations are candidates for being restored from the stack. Otherwise, register or constant-value information can be interpreted as a spill location, through a union. The added regression test replicates a scenario where this occurs: the stack load from [rsp] causes the register-location DBG_VALUE to be "restored" to rsi, when it should be left alone. See PR43058 for details. Un x-fail a test that was suffering from this from a previous patch. Differential Revision: https://reviews.llvm.org/D66895
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/LiveDebugValues.cpp (diff)	llvm.src/lib/CodeGen/LiveDebugValues.cpp
	/llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll (diff)	llvm.src/test/CodeGen/ARM/debug-info-blocks.ll
	/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir	llvm.src/test/DebugInfo/MIR/X86/live-debug-values-restore-collide.mir
Revision 370333 by rksimon: Fix signed/unsigned comparison warning. NFCI.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)	llvm.src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Revision 370332 by rksimon: Fix shadow variable warning. NFCI.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (diff)	llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Revision 370331 by grimar: [yaml2obj] - Allow placing local symbols after globals. This allows us to produce broken binaries with local symbols placed after global in '.dynsym'/'.symtab' Also, simplifies the code. Differential revision: https://reviews.llvm.org/D66799
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/ObjectYAML/ELFEmitter.cpp (diff)	llvm.src/lib/ObjectYAML/ELFEmitter.cpp
	/llvm/trunk/test/tools/yaml2obj/elf-symbols-binding-order.yaml (diff)	llvm.src/test/tools/yaml2obj/elf-symbols-binding-order.yaml
Revision 370330 by grimar: [llvm-readobj/llvm-readelf] - Report a proper warning when dumping a broken dynamic relocation. When we have a dynamic relocation with a broken symbol's st_name, tools report a useless error: "Invalid data was encountered while parsing the file". After this change we report a warning + "<corrupt>" as a symbol name. Differential revision: https://reviews.llvm.org/D66734
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/Object/ELFTypes.h (diff)	llvm.src/include/llvm/Object/ELFTypes.h
	/llvm/trunk/test/Object/invalid.test (diff)	llvm.src/test/Object/invalid.test
	/llvm/trunk/test/tools/llvm-readobj/elf-broken-dynamic-reloc-name.test	llvm.src/test/tools/llvm-readobj/elf-broken-dynamic-reloc-name.test
	/llvm/trunk/tools/llvm-readobj/ELFDumper.cpp (diff)	llvm.src/tools/llvm-readobj/ELFDumper.cpp
Revision 370329 by dmgreen: [ARM] MVE Masked loads and stores Masked loads and store fit naturally with MVE, the instructions being easily predicated. This adds lowering for the simple cases of masked loads and stores. It does not yet deal with widening/narrowing or pre/post inc. The llvm masked load intrinsic will accept a "passthru" value, dictating the values used for the zero masked lanes. In MVE the instructions write 0 to the zero predicated lanes, so we need to match a passthru that isn't 0 (or undef) with a select instruction to pull in the correct data after the load. We also need to do something with unaligned loads/stores. Currently this uses a similar method used in big endian, using an VLDRB.8 (and potentially a VREV in BE). This does mean that the predicate mask is converted from, for example, a v4i1 to a v16i1. The VLDR instructions are defined as using the first bit of the relevant mask lane, so this could potentially load different results if the predicate is little odd. As the input is a v4i1 however, I believe this is OK and all the bits required should be set in the predicate, making the VLDRB.8 load the same data. Differential Revision: https://reviews.llvm.org/D66534
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (diff)	llvm.src/lib/Target/ARM/ARMISelLowering.cpp
	/llvm/trunk/lib/Target/ARM/ARMInstrMVE.td (diff)	llvm.src/lib/Target/ARM/ARMInstrMVE.td
	/llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.h (diff)	llvm.src/lib/Target/ARM/ARMTargetTransformInfo.h
	/llvm/trunk/test/CodeGen/Thumb2/mve-masked-ldst.ll (diff)	llvm.src/test/CodeGen/Thumb2/mve-masked-ldst.ll
	/llvm/trunk/test/CodeGen/Thumb2/mve-masked-load.ll (diff)	llvm.src/test/CodeGen/Thumb2/mve-masked-load.ll
	/llvm/trunk/test/CodeGen/Thumb2/mve-masked-store.ll (diff)	llvm.src/test/CodeGen/Thumb2/mve-masked-store.ll
Revision 370328 by jmorse: [DebugInfo] LiveDebugValues should always revisit backedges if it skips them The "join" method in LiveDebugValues does not attempt to join unseen predecessor blocks if their out-locations aren't yet initialized, instead the block should be re-visited later to see if any locations have changed validity. However, because the set of blocks were all being "process"'d once before "join" saw them, that logic in "join" was actually ignoring legitimate out-locations on the first pass through. This meant that some invalidated locations were not removed from the head of loops, allowing illegal locations to persist. Fix this by removing the run of "process" before the main join/process loop in ExtendRanges. Now the unseen predecessors that "join" skips truly are uninitialized, and we come back to the block at a later time to re-run "join", see the @baz function added. This also fixes another fault where stack/register transfers in the entry block (or any other before-any-loop-block) had their tranfers initially ignored, and were then never revisited. The MIR test added tests for this behaviour. XFail a test that exposes another bug; a fix for this is coming in D66895. Differential Revision: https://reviews.llvm.org/D66663
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/LiveDebugValues.cpp (diff)	llvm.src/lib/CodeGen/LiveDebugValues.cpp
	/llvm/trunk/test/CodeGen/ARM/debug-info-blocks.ll (diff)	llvm.src/test/CodeGen/ARM/debug-info-blocks.ll
	/llvm/trunk/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir (diff)	llvm.src/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
	/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir	llvm.src/test/DebugInfo/MIR/X86/live-debug-values-entry-transfer.mir
	/llvm/trunk/test/DebugInfo/X86/DW_AT_location-reference.ll (diff)	llvm.src/test/DebugInfo/X86/DW_AT_location-reference.ll
	/llvm/trunk/test/DebugInfo/X86/live-debug-values-remove-range.ll (diff)	llvm.src/test/DebugInfo/X86/live-debug-values-remove-range.ll
Revision 370327 by lebedevri: [X86][CodeGen][NFC] Delay `combineIncDecVector()` from DAGCombine to X86DAGToDAGISel Summary: We were previously doing it in DAGCombine. But we also want to do `sub %x, C` -> `add %x, (sub 0, C)` for vectors in DAGCombine. So if we had `sub %x, -1`, we'll transform it to `add %x, 1`, which `combineIncDecVector()` will immediately transform back into `sub %x, -1`, and here we go again... I've marked this as NFC since not a single test changes, but since that 'changes' DAGCombine, probably this isn't fully NFC. Reviewers: RKSimon, craig.topper, spatel Reviewed By: craig.topper Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62327
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (diff)	llvm.src/lib/Target/X86/X86ISelDAGToDAG.cpp
	/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff)	llvm.src/lib/Target/X86/X86ISelLowering.cpp
	/llvm/trunk/lib/Target/X86/X86ISelLowering.h (diff)	llvm.src/lib/Target/X86/X86ISelLowering.h
	/llvm/trunk/test/CodeGen/X86/stack-folding-int-avx1.ll (diff)	llvm.src/test/CodeGen/X86/stack-folding-int-avx1.ll
	/llvm/trunk/test/CodeGen/X86/stack-folding-int-sse42.ll (diff)	llvm.src/test/CodeGen/X86/stack-folding-int-sse42.ll
Revision 370326 by deadalnix: [DAGCombiner] (insert_vector_elt (vector_shuffle X, Y), (extract_vector_elt X, N), IdxC) -> (vector_shuffle X, Y) Summary: This is beneficial when the shuffle is only used once and end up being generated in a few places when some node is combined into a shuffle. Reviewers: craig.topper, efriedma, RKSimon, lebedev.ri Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66718
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)	llvm.src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
	/llvm/trunk/test/CodeGen/X86/madd.ll (diff)	llvm.src/test/CodeGen/X86/madd.ll
	/llvm/trunk/test/CodeGen/X86/vector-shuffle-combining.ll (diff)	llvm.src/test/CodeGen/X86/vector-shuffle-combining.ll
Revision 370325 by dmgreen: [ARM] Masked load and store and predicate tests. NFC
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/CodeGen/Thumb2/mve-masked-ldst.ll	llvm.src/test/CodeGen/Thumb2/mve-masked-ldst.ll
	/llvm/trunk/test/CodeGen/Thumb2/mve-masked-load.ll	llvm.src/test/CodeGen/Thumb2/mve-masked-load.ll
	/llvm/trunk/test/CodeGen/Thumb2/mve-masked-store.ll	llvm.src/test/CodeGen/Thumb2/mve-masked-store.ll
	/llvm/trunk/test/CodeGen/Thumb2/mve-pred-not.ll (diff)	llvm.src/test/CodeGen/Thumb2/mve-pred-not.ll
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block.mir (diff)	llvm.src/test/CodeGen/Thumb2/mve-vpt-block.mir
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir (diff)	llvm.src/test/CodeGen/Thumb2/mve-vpt-block2.mir
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir (diff)	llvm.src/test/CodeGen/Thumb2/mve-vpt-block3.mir
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir (diff)	llvm.src/test/CodeGen/Thumb2/mve-vpt-block4.mir
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir (diff)	llvm.src/test/CodeGen/Thumb2/mve-vpt-block5.mir
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block6.mir (diff)	llvm.src/test/CodeGen/Thumb2/mve-vpt-block6.mir
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block7.mir	llvm.src/test/CodeGen/Thumb2/mve-vpt-block7.mir
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block8.mir	llvm.src/test/CodeGen/Thumb2/mve-vpt-block8.mir
	/llvm/trunk/test/CodeGen/Thumb2/mve-vpt-nots.mir	llvm.src/test/CodeGen/Thumb2/mve-vpt-nots.mir
Revision 370324 by lebedevri: [InstCombine] Shift amount reassociation in bittest: trunc-of-lshr (PR42399) Summary: Finally, the fold i was looking forward to :) The legality check is muddy, i doubt i've groked the full generalization, but it handles all the cases i care about, and can come up with: https://rise4fun.com/Alive/26j I.e. we can perform the fold if any of the following is true: * The shift amount is either zero or one less than widest bitwidth * Either of the values being shifted has at most lowest bit set * The value that is being shifted by `shl` (which is not truncated) should have no less leading zeros than the total shift amount; * The value that is being shifted by `lshr` (which is truncated) should have no less leading zeros than the widest bit width minus total shift amount minus one I strongly suspect there is some better generalization, but i'm not aware of it as of right now. For now i also avoided using actual `computeKnownBits()`, but restricted it to constants. Reviewers: spatel, nikic, xbolva00 Reviewed By: spatel Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D66383
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)	llvm.src/lib/Transforms/InstCombine/InstCombineCompares.cpp
	/llvm/trunk/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-lshr.ll (diff)	llvm.src/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-lshr.ll
	/llvm/trunk/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-shl.ll (diff)	llvm.src/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest-with-truncation-shl.ll
Revision 370323 by gribozavr: [Index] Create PP callbacks in the ASTConsumer Doing so removes one reason to create a custom FrontendAction. FrontendActions are not desirable because they are difficult to compose. ASTConsumers are much easier to compose.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Index/IndexingAction.cpp (diff)	clang.src/lib/Index/IndexingAction.cpp
Revision 370322 by svenvh: [OpenCL] Fix diagnosing enqueue_kernel call with too few args The err_typecheck_call_too_few_args diagnostic takes arguments, but none were provided causing clang to crash when attempting to diagnose an enqueue_kernel call with too few arguments. Fixes llvm.org/PR42045 Differential Revision: https://reviews.llvm.org/D66883
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Sema/SemaChecking.cpp (diff)	clang.src/lib/Sema/SemaChecking.cpp
	/cfe/trunk/test/SemaOpenCL/cl20-device-side-enqueue.cl (diff)	clang.src/test/SemaOpenCL/cl20-device-side-enqueue.cl
Revision 370321 by gribozavr: [Index] Marked a bunch of classes 'final' This file defines multiple inheritance hierarchies and 'final' helps with readability.
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Index/IndexingAction.cpp (diff)	clang.src/lib/Index/IndexingAction.cpp
Revision 370320 by rksimon: LegalizeSetCCCondCode - Reduce scope of NeedSwap to fix cppcheck warning. NFCI. No need for this to be defined outside the only switch case its used in.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (diff)	llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Revision 370319 by rksimon: Fix variable set but no used warnings on NDEBUG builds. NFCI.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/IPO/Attributor.cpp (diff)	llvm.src/lib/Transforms/IPO/Attributor.cpp
Revision 370317 by rksimon: Fix variable set but no used warning on NDEBUG builds. NFCI.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)	llvm.src/lib/Transforms/InstCombine/InstCombineCompares.cpp
Revision 370314 by baloghadamsoftware: [Analyzer] Iterator Checkers - Make range errors and invalidated access fatal Range errors (dereferencing or incrementing the past-the-end iterator or decrementing the iterator of the first element of the range) and access of invalidated iterators lead to undefined behavior. There is no point to continue the analysis after such an error on the same execution path, but terminate it by a sink node (fatal error). This also improves the performance and helps avoiding double reports (e.g. in case of nested iterators). Differential Revision: https://reviews.llvm.org/D62893
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/StaticAnalyzer/Checkers/IteratorChecker.cpp (diff)	clang.src/lib/StaticAnalyzer/Checkers/IteratorChecker.cpp
	/cfe/trunk/test/Analysis/Inputs/system-header-simulator-cxx.h (diff)	clang.src/test/Analysis/Inputs/system-header-simulator-cxx.h
	/cfe/trunk/test/Analysis/diagnostics/explicit-suppression.cpp (diff)	clang.src/test/Analysis/diagnostics/explicit-suppression.cpp
	/cfe/trunk/test/Analysis/invalidated-iterator.cpp (diff)	clang.src/test/Analysis/invalidated-iterator.cpp
	/cfe/trunk/test/Analysis/iterator-range.cpp (diff)	clang.src/test/Analysis/iterator-range.cpp
Revision 370311 by mstorsjo: [COFF] Add a ResourceSectionRef method for getting the data entry, print it in llvm-readobj Differential Revision: https://reviews.llvm.org/D66819
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/Object/COFF.h (diff)	llvm.src/include/llvm/Object/COFF.h
	/llvm/trunk/lib/Object/COFFObjectFile.cpp (diff)	llvm.src/lib/Object/COFFObjectFile.cpp
	/llvm/trunk/test/tools/llvm-cvtres/combined.test (diff)	llvm.src/test/tools/llvm-cvtres/combined.test
	/llvm/trunk/test/tools/llvm-cvtres/object.test (diff)	llvm.src/test/tools/llvm-cvtres/object.test
	/llvm/trunk/test/tools/llvm-readobj/coff-resources.test (diff)	llvm.src/test/tools/llvm-readobj/coff-resources.test
	/llvm/trunk/tools/llvm-readobj/COFFDumper.cpp (diff)	llvm.src/tools/llvm-readobj/COFFDumper.cpp
Revision 370310 by mstorsjo: [COFF] Add a bounds checking helper for iterating a coff_resource_dir_table Instead of blindly incrementing pointers in llvm-readobj, use this helper, which does bounds checking against the available section data. Differential Revision: https://reviews.llvm.org/D66818
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/include/llvm/Object/COFF.h (diff)	llvm.src/include/llvm/Object/COFF.h
	/llvm/trunk/lib/Object/COFFObjectFile.cpp (diff)	llvm.src/lib/Object/COFFObjectFile.cpp
	/llvm/trunk/tools/llvm-readobj/COFFDumper.cpp (diff)	llvm.src/tools/llvm-readobj/COFFDumper.cpp
Revision 370309 by mstorsjo: [COFF] Fix error handling in ResourceSectionRef Previously, the expression (Reader.readFoo()) was expanded twice, triggering asserts as one of the Error types ends up not checked (and as it was expanded twice, the method would end up called twice if it failed first). Differential Revision: https://reviews.llvm.org/D66817
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Object/COFFObjectFile.cpp (diff)	llvm.src/lib/Object/COFFObjectFile.cpp
Revision 370308 by mstorsjo: [llvm-readobj] Print the resource type textually for .res files This already is done when dumping resources from coff objects. Differential Revision: https://reviews.llvm.org/D66816
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/test/tools/llvm-rc/codepage.test (diff)	llvm.src/test/tools/llvm-rc/codepage.test
	/llvm/trunk/test/tools/llvm-rc/cpp-output.test (diff)	llvm.src/test/tools/llvm-rc/cpp-output.test
	/llvm/trunk/test/tools/llvm-rc/include-paths.test (diff)	llvm.src/test/tools/llvm-rc/include-paths.test
	/llvm/trunk/test/tools/llvm-rc/memoryflags-stringtable.test (diff)	llvm.src/test/tools/llvm-rc/memoryflags-stringtable.test
	/llvm/trunk/test/tools/llvm-rc/memoryflags.test (diff)	llvm.src/test/tools/llvm-rc/memoryflags.test
	/llvm/trunk/test/tools/llvm-rc/not-expr.test (diff)	llvm.src/test/tools/llvm-rc/not-expr.test
	/llvm/trunk/test/tools/llvm-rc/tag-accelerators.test (diff)	llvm.src/test/tools/llvm-rc/tag-accelerators.test
	/llvm/trunk/test/tools/llvm-rc/tag-dialog.test (diff)	llvm.src/test/tools/llvm-rc/tag-dialog.test
	/llvm/trunk/test/tools/llvm-rc/tag-escape.test (diff)	llvm.src/test/tools/llvm-rc/tag-escape.test
	/llvm/trunk/test/tools/llvm-rc/tag-html.test (diff)	llvm.src/test/tools/llvm-rc/tag-html.test
	/llvm/trunk/test/tools/llvm-rc/tag-icon-cursor.test (diff)	llvm.src/test/tools/llvm-rc/tag-icon-cursor.test
	/llvm/trunk/test/tools/llvm-rc/tag-menu.test (diff)	llvm.src/test/tools/llvm-rc/tag-menu.test
	/llvm/trunk/test/tools/llvm-rc/tag-stringtable.test (diff)	llvm.src/test/tools/llvm-rc/tag-stringtable.test
	/llvm/trunk/test/tools/llvm-rc/tag-user.test (diff)	llvm.src/test/tools/llvm-rc/tag-user.test
	/llvm/trunk/test/tools/llvm-rc/tag-versioninfo.test (diff)	llvm.src/test/tools/llvm-rc/tag-versioninfo.test
	/llvm/trunk/test/tools/llvm-rc/versioninfo-padding.test (diff)	llvm.src/test/tools/llvm-rc/versioninfo-padding.test
	/llvm/trunk/test/tools/llvm-readobj/res-resources.test (diff)	llvm.src/test/tools/llvm-readobj/res-resources.test
	/llvm/trunk/tools/llvm-readobj/WindowsResourceDumper.cpp (diff)	llvm.src/tools/llvm-readobj/WindowsResourceDumper.cpp
Revision 370307 by mstorsjo: [llvm-readobj] Remove a leftover string trim operation. NFC. This became unnecessary in SVN r359153. Differential Revision: https://reviews.llvm.org/D66815
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/tools/llvm-readobj/COFFDumper.cpp (diff)	llvm.src/tools/llvm-readobj/COFFDumper.cpp
Revision 370305 by jvikstrom: [clangd] Update themeRuleMatcher when color theme changes in vscode extension. Summary: Add event listener that listens to configuration changes and reloads the ThemeRuleMatcher when the theme changes. Right now it will not recolor the files, depends on the colorizer CL for that. Reviewers: hokein, ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66406
Change Type	Path in Repository	Path in Workspace
	/clang-tools-extra/trunk/clangd/clients/clangd-vscode/src/semantic-highlighting.ts (diff)	clang-tools-extra.src/clangd/clients/clangd-vscode/src/semantic-highlighting.ts
Revision 370304 by sammccall: Reland "[clangd] Migrate last tweak tests to TweakTesting.h and remove old helpers. NFC" This reverts commit 3dcf55aa45bad800533b36b70a14ebeb2b84e219, and avoids use of multiline raw strings in macro calls.
Change Type	Path in Repository	Path in Workspace
	/clang-tools-extra/trunk/clangd/unittests/TweakTests.cpp (diff)	clang-tools-extra.src/clangd/unittests/TweakTests.cpp
Revision 370300 by anton-afanasyev: [Test][Time profiler] Fix test for python3 Summary: Fix test checking time profiler generates correct tracing json-file. `filter` works differently for python2 and python3, so unifying this. Reviewers: mgehre, nathanchance Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66873
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/test/Driver/check-time-trace-sections.py (diff)	clang.src/test/Driver/check-time-trace-sections.py
Revision 370299 by ctopper: [X86] Remove isel patterns with X86VBroadcast+scalar_to_vector+load. The DAG should have these as X86VBroadcast+load.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/X86/X86InstrAVX512.td (diff)	llvm.src/lib/Target/X86/X86InstrAVX512.td
	/llvm/trunk/lib/Target/X86/X86InstrSSE.td (diff)	llvm.src/lib/Target/X86/X86InstrSSE.td
Revision 370298 by gribozavr: Removed dead code from clang/AST/NSAPI.h Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66884
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/include/clang/AST/NSAPI.h (diff)	clang.src/include/clang/AST/NSAPI.h
	/cfe/trunk/lib/AST/NSAPI.cpp (diff)	clang.src/lib/AST/NSAPI.cpp
Revision 370297 by pengfei: [x86] Adding support for some missing intrinsics: _mm512_cvtsi512_si32 Summary: Adding support for some missing intrinsics: _mm512_cvtsi512_si32 Reviewers: craig.topper, pengfei, LuoYuanke, spatel, RKSimon Reviewed By: craig.topper Subscribers: llvm-commits Patch by Bing Yu (yubing) Differential Revision: https://reviews.llvm.org/D66785
Change Type	Path in Repository	Path in Workspace
	/cfe/trunk/lib/Headers/avx512fintrin.h (diff)	clang.src/lib/Headers/avx512fintrin.h
	/cfe/trunk/test/CodeGen/avx512f-builtins.c (diff)	clang.src/test/CodeGen/avx512f-builtins.c
Revision 370296 by ctopper: [X86] Remove some unneeded X86VBroadcast isel patterns that have larger than 128 bit input types. We should always be shrinking the input to 128 bits or smaller when the node is created.
Change Type	Path in Repository	Path in Workspace
	/llvm/trunk/lib/Target/X86/X86InstrAVX512.td (diff)	llvm.src/lib/Target/X86/X86InstrAVX512.td
	/llvm/trunk/lib/Target/X86/X86InstrSSE.td (diff)	llvm.src/lib/Target/X86/X86InstrSSE.td