SuccessChanges

Summary

  1. Remove -DLLVM_USE_LINKER from Windows self host bots. (details)
Commit 061123f05ff0813c36287d2105cb5344d494592b by russell.gallop
Remove -DLLVM_USE_LINKER from Windows self host bots.
LLVM_USE_LINKER sets the -fuse-ld. This is redundant as the linker is
set to lld-link.
Differential Revision: https://reviews.llvm.org/D69098
llvm-svn: 375212
The file was modifiedzorg/buildbot/builders/annotated/sanitizer-windows.py (diff)
The file was modifiedzorg/buildbot/builders/annotated/clang-windows.py (diff)

Summary

  1. [AArch64][SVE] Implement unpack intrinsics (details)
  2. [Codegen] Alter the default promotion for saturating adds and subs (details)
  3. Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" (details)
  4. Fix MSVC "not all control paths return a value" warning. NFCI. (details)
  5. [X86] Regenerate memcmp tests and add X64-AVX512 common prefix (details)
  6. [AArch64] Don't combine callee-save and local stack adjustment when (details)
  7. [LLD] [COFF] Try to report source locations for duplicate symbols (details)
  8. [ThinLTOCodeGenerator] Add support for index-based WPD (details)
  9. [Arm][libsanitizer] Fix arm libsanitizer failure with bleeding edge (details)
  10. SystemInitializerCommon fix compilation on linux (details)
  11. [AArch64][SVE] Add SPLAT_VECTOR ISD Node (details)
  12. [ThinLTOCodeGenerator] Add support for index-based WPD (details)
  13. [clangd] Report declaration references in findExplicitReferences. (details)
  14. [AArch64] Adding support for PMMIR_EL1 register (details)
  15. [NFC][CVP] Count all the no-wraps we proved (details)
  16. [AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa (details)
  17. [SCEV] Removing deprecated comment in ScalarEvolutionExpander (details)
  18. Revert r375152 as it is causing failures on EXPENSIVE_CHECKS bot (details)
Commit 0c7cc383e5b846bc9e9fcc599d3f342333f5c963 by kerry.mclaughlin
[AArch64][SVE] Implement unpack intrinsics
Summary: Implements the following intrinsics:
- int_aarch64_sve_sunpkhi
- int_aarch64_sve_sunpklo
- int_aarch64_sve_uunpkhi
- int_aarch64_sve_uunpklo
This patch also adds AArch64ISD nodes for UNPK instead of implementing
the intrinsics directly, as they are required for a future patch which
implements the sign/zero extension of legal vectors.
This patch includes tests for the Subdivide2Argument type added by
D67549
Reviewers: sdesmalen, SjoerdMeijer, greened, rengolin, rovka
Reviewed By: greened
Subscribers: tschuett, kristof.beyls, rkruppe, psnobl, cfe-commits,
llvm-commits
Differential Revision: https://reviews.llvm.org/D67550
llvm-svn: 375210
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
Commit e6f313b3807d23017d188aa7060b8cad09b3d095 by david.green
[Codegen] Alter the default promotion for saturating adds and subs
The default promotion for the add_sat/sub_sat nodes currently does:
   ANY_EXTEND iN to iM
   SHL by M-N
   [US][ADD|SUB]SAT
   L/ASHR by M-N
If the promoted add_sat or sub_sat node is not legal, this can produce
code that effectively does a lot of shifting (and requiring large
constants to be materialised) just to use the overflow flag. It is
simpler to just do the saturation manually, using the higher bitwidth
addition and a min/max against the saturating bounds. That is what this
patch attempts to do.
Differential Revision: https://reviews.llvm.org/D68926
llvm-svn: 375211
The file was modifiedllvm/test/CodeGen/AArch64/usub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/usub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/AArch64/uadd_sat.ll
The file was modifiedllvm/test/CodeGen/AArch64/usub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/AArch64/uadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/sadd_sat_plus.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/test/CodeGen/AArch64/ssub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/sadd_sat.ll
The file was modifiedllvm/test/CodeGen/X86/ssub_sat.ll
The file was modifiedllvm/test/CodeGen/AArch64/sadd_sat.ll
The file was modifiedllvm/test/CodeGen/X86/usub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/X86/usub_sat.ll
The file was modifiedllvm/test/CodeGen/X86/uadd_sat.ll
The file was modifiedllvm/test/CodeGen/AArch64/ssub_sat.ll
The file was modifiedllvm/test/CodeGen/X86/ssub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/usub_sat.ll
The file was modifiedllvm/test/CodeGen/AArch64/usub_sat.ll
The file was modifiedllvm/test/CodeGen/X86/sadd_sat.ll
The file was modifiedllvm/test/CodeGen/ARM/ssub_sat.ll
The file was modifiedllvm/test/CodeGen/X86/uadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/AArch64/sadd_sat_vec.ll
The file was modifiedllvm/test/CodeGen/AArch64/ssub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/ARM/ssub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/uadd_sat.ll
The file was modifiedllvm/test/CodeGen/AArch64/sadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/ARM/uadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/X86/sadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/AArch64/uadd_sat_vec.ll
Commit da40d4e4e1bfa705dbf59ebce097ed34b0e46dfc by llvm-dev
Fix MSVC "result of 32-bit shift implicitly converted to 64 bits"
warnings. NFCI.
llvm-svn: 375213
The file was modifiedllvm/tools/llvm-objdump/MachODump.cpp
The file was modifiedllvm/lib/Object/MachOUniversal.cpp
Commit 3bd61b26556027a23b0d161d403f07fd7387ac77 by llvm-dev
Fix MSVC "not all control paths return a value" warning. NFCI.
llvm-svn: 375214
The file was modifiedllvm/tools/llvm-objcopy/CopyConfig.cpp
Commit ef04598e147396e7225964ae8438ecbf6554b095 by llvm-dev
[X86] Regenerate memcmp tests and add X64-AVX512 common prefix
Should help make the changes in D69157 clearer
llvm-svn: 375215
The file was modifiedllvm/test/CodeGen/X86/memcmp.ll
Commit 651f07908a149b8eb861a1b109f98eeb3d4f1517 by david.green
[AArch64] Don't combine callee-save and local stack adjustment when
optimizing for size
For arm64, D18619 introduced the ability to combine bumping the stack
pointer upfront in case it needs to be bumped for both the callee-save
area as well as the local stack area.
That diff already remarks that "This change can cause an increase in
instructions", but argues that even when that happens, it should be
still be a performance benefit because the number of micro-ops is
reduced.
We have observed that this code-size increase can be significant in
practice. This diff disables combining stack bumping for methods that
are marked as optimize-for-size.
Example of a prologue with the behavior before this diff (combining
stack bumping when possible):
sub        sp, sp, #0x40
stp        d9, d8, [sp, #0x10]
stp        x20, x19, [sp, #0x20]
stp        x29, x30, [sp, #0x30]
add        x29, sp, #0x30
[... compute x8 somehow ...]
stp        x0, x8, [sp]
And after this  diff, if the method is marked as optimize-for-size:
stp        d9, d8, [sp, #-0x30]!
stp        x20, x19, [sp, #0x10]
stp        x29, x30, [sp, #0x20]
add        x29, sp, #0x20
[... compute x8 somehow ...]
stp        x0, x8, [sp, #-0x10]!
Note that without combining the stack bump there are two
auto-decrements, nicely folded into the stp instructions, whereas
otherwise there is a single sub sp, ... instruction, but not folded.
Patch by Nikolai Tillmann!
Differential Revision: https://reviews.llvm.org/D68530
llvm-svn: 375217
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/arm64-never-combine-csr-local-stack-bump-for-size.ll
Commit b38f577c015c210605c2e463e9ac6a03249225a2 by martin
[LLD] [COFF] Try to report source locations for duplicate symbols
This fixes the second part of PR42407.
For files with dwarf debug info, it manually loads and iterates
.debug_info to find the declared location of variables, to allow
reporting them. (This matches the corresponding code in the ELF linker.)
For functions, it uses the existing getFileLineDwarf which uses
LLVMSymbolizer for translating addresses to file lines.
In object files with codeview debug info, only the source location of
duplicate functions is printed. (And even there, only for the first
input file. The getFileLineCodeView function requires the object file to
be fully loaded and initialized to properly resolve source locations,
but duplicate symbols are reported at a stage when the second object
file isn't fully loaded yet.)
Differential Revision: https://reviews.llvm.org/D68975
llvm-svn: 375218
The file was modifiedlld/COFF/InputFiles.cpp
The file was addedlld/test/COFF/duplicate-cv.s
The file was addedlld/test/COFF/duplicate-dwarf.s
The file was modifiedlld/COFF/SymbolTable.cpp
The file was modifiedlld/test/COFF/duplicate.test
The file was modifiedlld/COFF/SymbolTable.h
The file was modifiedlld/test/COFF/conflict.test
The file was modifiedlld/COFF/InputFiles.h
The file was modifiedlld/test/COFF/conflict-mangled.test
Commit eb34c3e8a4a8311a4df5f13b217275e7c1985dc8 by eleviant
[ThinLTOCodeGenerator] Add support for index-based WPD
Differential revision: https://reviews.llvm.org/D68950
llvm-svn: 375219
The file was addedllvm/test/ThinLTO/X86/devirt_promote_legacy.ll
The file was modifiedllvm/lib/LTO/ThinLTOCodeGenerator.cpp
Commit 9c155985f17fd369bbba311b714fb6c01c17d66e by sjoerd.meijer
[Arm][libsanitizer] Fix arm libsanitizer failure with bleeding edge
glibc
Glibc has recently introduced changed to the mode field in ipc_perm in
commit 2f959dfe849e0646e27403f2e4091536496ac0f0. For Arm this means that
the mode field no longer has the same size.
This causes an assert failure against libsanitizer's internal copy of
ipc_perm. Since this change can't be easily detected I am adding arm to
the list of targets that are excluded from this check.
Patch by: Tamar Christina
Differential Revision: https://reviews.llvm.org/D69104
llvm-svn: 375220
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Commit 0c304917740228968d2daf1a414e7ec3f94cd171 by pavel
SystemInitializerCommon fix compilation on linux
C++ defines two overloads of std::iscntrl. One in <cctype> and one in
<locale>. On linux we seem to include both which makes the std::erase_if
call ambiguous.
Wrap std::iscntrl call in a lambda to ensure regular overload
resolution.
llvm-svn: 375221
The file was modifiedlldb/source/Initialization/SystemInitializerCommon.cpp
Commit 84da2596f96d388e9cd21d16e64687bca68f436a by graham.hunter
[AArch64][SVE] Add SPLAT_VECTOR ISD Node
Adds a new ISD node to replicate a scalar value across all elements of a
vector. This is needed for scalable vectors, since BUILD_VECTOR cannot
be used.
Fixes up default type legalization for scalable vectors after the new
MVT type ranges were introduced.
At present I only use this node for scalable vectors. A DAGCombine has
been added to transform a BUILD_VECTOR into a SPLAT_VECTOR if all
elements are the same, but only if the default operation action of
Expand has been overridden by the target.
I've only added result promotion legalization for scalable vector
i8/i16/i32/i64 types in AArch64 for now.
Reviewers: t.p.northover, javed.absar, greened, cameron.mcinally,
jmolloy
Reviewed By: jmolloy
Differential Revision: https://reviews.llvm.org/D47775
llvm-svn: 375222
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-vector-splat.ll
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
Commit bc887a8d4a379625f9abf3d53cfa56fb1d26e78d by eleviant
[ThinLTOCodeGenerator] Add support for index-based WPD
This is clang part of the patch. It adds -flto-unit flag for thin LTO
builds on Mac and PS4
Differential revision: https://reviews.llvm.org/D68950
llvm-svn: 375224
The file was modifiedclang/test/Driver/lto-unit.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 65f61c0030c5c375852f27ff6dd21e6a078e2420 by hokein
[clangd] Report declaration references in findExplicitReferences.
Reviewers: ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, kadircet, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D68977
llvm-svn: 375226
The file was modifiedclang-tools-extra/clangd/AST.cpp
The file was modifiedclang-tools-extra/clangd/FindTarget.cpp
The file was modifiedclang-tools-extra/clangd/FindTarget.h
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
The file was modifiedclang-tools-extra/clangd/AST.h
The file was modifiedclang-tools-extra/clangd/unittests/FindTargetTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
Commit ffcd7698aea7bcbb2b4edffc484793e1ff47b85d by victor.campos
[AArch64] Adding support for PMMIR_EL1 register
Summary: The PMMIR_EL1 register is present in Armv8.4 with PMU
extension. This patch adds support for it.
Reviewers: t.p.northover, dnsampaio
Reviewed By: dnsampaio
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68940
llvm-svn: 375228
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was addedllvm/test/MC/Disassembler/AArch64/armv8.4a-pmu.txt
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was addedllvm/test/MC/AArch64/armv8.4a-pmu.s
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64SystemOperands.td
Commit fa0ac2558eaf3860c377744e4fef71d6b730d358 by lebedev.ri
[NFC][CVP] Count all the no-wraps we proved
Summary: It looks like this is the only missing statistic in the CVP
pass. Since we prove NSW and NUW separately i'd think we should count
them separately too.
Reviewers: nikic, spatel, reames
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68740
llvm-svn: 375230
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Commit 7d325fe57b422116c910f3dba66f6266b2f9409b by dmitry.preobrazhensky
[AMDGPU][MC][GFX9] Corrected parsing of v_cndmask_b32_sdwa
See https://bugs.llvm.org/show_bug.cgi?id=43607
Reviewers: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D69095
llvm-svn: 375231
The file was modifiedllvm/test/MC/AMDGPU/vop_sdwa.s
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Commit e64863d19242c12187ce15768d4a65ad9725e2ce by victor.campos
[SCEV] Removing deprecated comment in ScalarEvolutionExpander
Removing a comment in the ScalarEvolutionExpander.cpp file that was
about the class SCEVSDivExpr, which has been long gone from LLVM.
llvm-svn: 375232
The file was modifiedllvm/lib/Analysis/ScalarEvolutionExpander.cpp
Commit dd7021d466d175525c6d8e35f0cd20338b008540 by nemanja.i.ibm
Revert r375152 as it is causing failures on EXPENSIVE_CHECKS bot
llvm-svn: 375233
The file was modifiedllvm/test/CodeGen/PowerPC/tocSaveInPrologue.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pr42492.ll
The file was modifiedllvm/test/CodeGen/PowerPC/brcond.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec-min-max.ll

Summary

  1. Remove -DLLVM_USE_LINKER from Windows self host bots. (details)
Commit 061123f05ff0813c36287d2105cb5344d494592b by russell.gallop
Remove -DLLVM_USE_LINKER from Windows self host bots.
LLVM_USE_LINKER sets the -fuse-ld. This is redundant as the linker is
set to lld-link.
Differential Revision: https://reviews.llvm.org/D69098
llvm-svn: 375212
The file was modifiedzorg/buildbot/builders/annotated/clang-windows.py
The file was modifiedzorg/buildbot/builders/annotated/sanitizer-windows.py